| Patent application number | Description | Published |
|---|
| 20080256301 | PROTECTION OF THE EXECUTION OF A PROGRAM - A method for controlling the execution of at least one program in an electronic circuit and a processor for executing a program, in which at least one volatile memory area of the circuit is, prior to the execution of the program to be controlled, filled with first instructions resulting in an exception processing; the program contains instructions for replacing all or part of the first instructions with second valid instructions; and the area is called for execution of all or part of the instruction that it contains at the end of the execution of the instruction program. | 10-16-2008 |
| 20080285745 | Processor for Executing an Aes-Type Algorithm - A processor for executing a Rijndeal algorithm which applies a plurality of encryption rounds to a data block array in order to obtain an array of identical size, each round involving a key block array and a data block substitution table, wherein said processor comprises: a first input register ( | 11-20-2008 |
| 20090034724 | MASKING OF DATA IN A CALCULATION - A method and a circuit for ciphering or deciphering data with a key by using at least one variable stored in a storage element and updated by the successive operations, the variable being masked by at least one first random mask applied before use of the key, then unmasked by at least one second mask applied after use of the key, at least one of the masks being dividable into several portions successively applied to the variable and which, when combined, represent the other mask. | 02-05-2009 |
| 20090285398 | VERIFICATION OF THE INTEGRITY OF A CIPHERING KEY - A method for verifying the integrity of a key implemented in a symmetrical ciphering or deciphering algorithm, including the steps of complementing to one at least the key; and verifying the coherence between two executions of the algorithm, respectively with the key and with the key complemented to one. | 11-19-2009 |
| 20100208883 | PROTECTION OF A MODULAR EXPONENTIATION CALCULATION PERFORMED BY AN INTEGRATED CIRCUIT - The invention concerns a method and a circuit for protecting a numerical quantity (d) contained in an integrated circuit ( | 08-19-2010 |
| 20100306295 | PROTECTION OF A PRIME NUMBER GENERATION FOR AN RSA ALGORITHM - A method for protecting a generation, by an electronic circuit, of at least one prime number by testing the prime character of successive candidate numbers, including: for each candidate number: the calculation of a reference number involving at least one first random number, and at least one primality test based on modular exponentiation calculations; and for a candidate number having successfully passed the primality test: a test of consistency between the candidate number and its reference number. | 12-02-2010 |
| 20100325183 | CHECKING OF THE SKEW CONSTANCY OF A BIT FLOW - A method and a circuit for detecting a loss in the equiprobable character of a first output bit flow originating from at least one first element of normalization of an initial bit flow, including analyzing the flow rate of the normalization element. | 12-23-2010 |
| 20110103584 | PROTECTION OF A CIPHERING KEY - A method for protecting a key used, by an electronic circuit, in a symmetrical algorithm for ciphering or deciphering a message, including the steps of complementing to one the key and the message; executing the algorithm twice, respectively with the key and the message and with the key and the message complemented to one, the selection between that of the executions which processes the key and the message and that which processes the key and the message complemented to one being random; and checking the consistency between the two executions. | 05-05-2011 |
