Patent application number | Description | Published |
20080219039 | Nonvolatile memory elements with metal-deficient resistive-switching metal oxides - Nonvolatile memory elements are provided that have resistive switching metal oxides. The nonvolatile memory elements may be formed by depositing a metal-containing material on a silicon-containing material. The metal-containing material may be oxidized to form a resistive-switching metal oxide. The silicon in the silicon-containing material reacts with the metal in the metal-containing material when heat is applied. This forms a metal silicide lower electrode for the nonvolatile memory element. An upper electrode may be deposited on top of the metal oxide. Because the silicon in the silicon-containing layer reacts with some of the metal in the metal-containing layer, the resistive-switching metal oxide that is formed is metal deficient when compared to a stoichiometric metal oxide formed from the same metal. | 09-11-2008 |
20080220601 | Methods for forming nonvolatile memory elements with resistive-switching metal oxides - Nonvolatile memory elements are provided that have resistive switching metal oxides. The nonvolatile memory elements may be formed by depositing a metal-containing material on a silicon-containing material. The metal-containing material may be oxidized to form a resistive-switching metal oxide. The silicon in the silicon-containing material reacts with the metal in the metal-containing material when heat is applied. This forms a metal silicide lower electrode for the nonvolatile memory element. An upper electrode may be deposited on top of the metal oxide. Because the silicon in the silicon-containing layer reacts with some of the metal in the metal-containing layer, the resistive-switching metal oxide that is formed is metal deficient when compared to a stoichiometric metal oxide formed from the same metal. | 09-11-2008 |
20090026434 | NONVOLATILE MEMORY ELEMENTS - Nonvolatile memory elements that are based on resistive switching memory element layers are provided. A nonvolatile memory element may have a resistive switching metal oxide layer. The resistive switching metal oxide layer may have one or more layers of oxide. A resistive switching metal oxide may be doped with a dopant that increases its melting temperature and enhances its thermal stability. Layers may be formed to enhance the thermal stability of the nonvolatile memory element. An electrode for a nonvolatile memory element may contain a conductive layer and a buffer layer. | 01-29-2009 |
20120035878 | Combinatorial Process Optimization Methodology and System - A method for obtaining an optimized process solution from a set of design of experiments in a cost effective manner is provided. An actual experiment is performed and data from the experiments is obtained. Through statistical analysis of the data, coefficients are obtained. These coefficients are input into an experiment simulator where input parameters and conditions are combined with the coefficients to predict an output for the input parameters and conditions. From simulated results, conclusions can be drawn as to sets of input parameters and conditions providing desired results. Thereafter, physical experiments utilizing the input parameters and conditions may be performed to verify the simulated results. | 02-09-2012 |
20120074376 | NONVOLATILE MEMORY ELEMENTS WITH METAL DEFICIENT RESISTIVE SWITCHING METAL OXIDES - Nonvolatile memory elements are provided that have resistive switching metal oxides. The nonvolatile memory elements may be formed by depositing a metal-containing material on a silicon-containing material. The metal-containing material may be oxidized to form a resistive-switching metal oxide. The silicon in the silicon-containing material reacts with the metal in the metal-containing material when heat is applied. This forms a metal silicide lower electrode for the nonvolatile memory element. An upper electrode may be deposited on top of the metal oxide. Because the silicon in the silicon-containing layer reacts with some of the metal in the metal-containing layer, the resistive-switching metal oxide that is formed is metal deficient when compared to a stoichiometric metal oxide formed from the same metal. | 03-29-2012 |
20120122291 | Nonvolatile Memory Elements - Nonvolatile memory elements that are based on resistive switching memory element layers are provided. A nonvolatile memory element may have a resistive switching metal oxide layer. The resistive switching metal oxide layer may have one or more layers of oxide. A resistive switching metal oxide may be doped with a dopant that increases its melting temperature and enhances its thermal stability. Layers may be formed to enhance the thermal stability of the nonvolatile memory element. An electrode for a nonvolatile memory element may contain a conductive layer and a buffer layer. | 05-17-2012 |
20130043454 | Non-volatile resistive switching memories formed using anodization - Non-volatile resistive-switching memories formed using anodization are described. A method for forming a resistive-switching memory element using anodization includes forming a metal containing layer, anodizing the metal containing layer at least partially to form a resistive switching metal oxide, and forming a first electrode over the resistive switching metal oxide. In some examples, an unanodized portion of the metal containing layer may be a second electrode of the memory element. | 02-21-2013 |
20130044404 | Titanium-Based High-K Dielectric Films - This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on titanium oxide, to suppress the formation of anatase-phase titanium oxide and (b) related devices and structures. A metal-insulator-metal (“MIM”) stack is formed using an ozone pretreatment process of a bottom electrode (or other substrate) followed by an ALD process to form a TiO | 02-21-2013 |
20130046404 | Combinatorial process optimization methodology and system - A method for obtaining an optimized process solution from a set of design of experiments in a cost effective manner is provided. An actual experiment is performed and data from the experiments is obtained. Through statistical analysis of the data, coefficients are obtained. These coefficients are input into an experiment simulator where input parameters and conditions are combined with the coefficients to predict an output for the input parameters and conditions. From simulated results, conclusions can be drawn as to sets of input parameters and conditions providing desired results. Thereafter, physical experiments utilizing the input parameters and conditions may be performed to verify the simulated results. | 02-21-2013 |
20130059427 | Nonvolatile Memory Elements - Nonvolatile memory elements that are based on resistive switching memory element layers are provided. A nonvolatile memory element may have a resistive switching metal oxide layer. The resistive switching metal oxide layer may have one or more layers of oxide. A resistive switching metal oxide may be doped with a dopant that increases its melting temperature and enhances its thermal stability. Layers may be formed to enhance the thermal stability of the nonvolatile memory element. An electrode for a nonvolatile memory element may contain a conductive layer and a buffer layer. | 03-07-2013 |
20130071982 | Nonvolatile Memory Elements with Metal-Deficient Resistive-Switching Metal Oxides - Nonvolatile memory elements are provided that have resistive switching metal oxides. The nonvolatile memory elements may be formed by depositing a metal-containing material on a silicon-containing material. The metal-containing material may be oxidized to form a resistive-switching metal oxide. The silicon in the silicon-containing material reacts with the metal in the metal-containing material when heat is applied. This forms a metal silicide lower electrode for the nonvolatile memory element. An upper electrode may be deposited on top of the metal oxide. Because the silicon in the silicon-containing layer reacts with some of the metal in the metal-containing layer, the resistive-switching metal oxide that is formed is metal deficient when compared to a stoichiometric metal oxide formed from the same metal. | 03-21-2013 |
20130089949 | Method for Reducing Forming Voltage in Resistive Random Access Memory - Methods for producing RRAM resistive switching elements having reduced forming voltage include preventing formation of interfacial layers, and creating electronic defects in a dielectric film. Suppressing interfacial layers in an electrode reduces forming voltage. Electronic defects in a dielectric film foster formation of conductive pathways. | 04-11-2013 |
20130093049 | High Productivity Combinatorial Dual Shadow Mask Design - Dual shadow mask design can overcome the size and resolution limitations of shadow masks to provide capacitor structures with small effective areas. The capacitor structures have bottom and top electrode layers patterned using shadow masks, sandwiching a dielectric layer. The effective areas of the capacitors are the overlapping areas of the top and bottom electrodes, thus allowing small area sizes without subjected to the size limitation of the electrodes. The dual shadow mask design can be used in conjunction with high productivity combinatorial processes for screening and optimizing dielectric materials and fabrication processes. | 04-18-2013 |
20130107607 | Bipolar Resistive-Switching Memory with a Single Diode Per Memory Cell | 05-02-2013 |
20130138380 | Methods of Combinatorial Processing for Screening Multiple Samples on a Semiconductor Substrate - In embodiments of the current invention, methods of combinatorial processing and a test chip for use in these methods are described. These methods and test chips enable the efficient development of materials, processes, and process sequence integration schemes for semiconductor manufacturing processes. In general, the methods simplify the processing sequence of forming devices or partially formed devices on a test chip such that the devices can be tested immediately after formation. The immediate testing allows for the high throughput testing of varied materials, processes, or process sequences on the test chip. The test chip has multiple site isolated regions where each of the regions is varied from one another and the test chip is designed to enable high throughput testing of the different regions. | 05-30-2013 |
20130207105 | Controlled Localized Defect Paths for Resistive Memories - Controlled localized defect paths for resistive memories are described, including a method for forming controlled localized defect paths including forming a first electrode forming a metal oxide layer on the first electrode, masking the metal oxide to create exposed regions and concealed regions of a surface of the metal oxide, and altering the exposed regions of the metal oxide to create localized defect paths beneath the exposed regions. | 08-15-2013 |
20130273707 | ALD processing techniques for forming non-volatile resistive switching memories - ALD processing techniques for forming non-volatile resistive-switching memories are described. In one embodiment, a method includes forming a first electrode on a substrate, maintaining a pedestal temperature for an atomic layer deposition (ALD) process of less than 100° Celsius, forming at least one metal oxide layer over the first electrode, wherein the forming the at least one metal oxide layer is performed using the ALD process using a purge duration of less than 20 seconds, and forming a second electrode over the at least one metal oxide layer. | 10-17-2013 |
20130285695 | Methods of Combinatorial Processing for Screening Multiple Samples on a Semiconductor Substrate - In embodiments of the current invention, methods of combinatorial processing and a test chip for use in these methods are described. These methods and test chips enable the efficient development of materials, processes, and process sequence integration schemes for semiconductor manufacturing processes. In general, the methods simplify the processing sequence of forming devices or partially formed devices on a test chip such that the devices can be tested immediately after formation. The immediate testing allows for the high throughput testing of varied materials, processes, or process sequences on the test chip. The test chip has multiple site isolated regions where each of the regions is varied from one another and the test chip is designed to enable high throughput testing of the different regions. | 10-31-2013 |
20130292632 | Resistive Switching Memory Element Including Doped Silicon Electrode - A resistive switching memory is described, including a first electrode comprising doped silicon having a first work function, a second electrode having a second work function that is different from the first work function by between 0.1 and 1.0 electron volts (eV), a metal oxide layer between the first electrode and the second electrode, the metal oxide layer switches using bulk-mediated switching using unipolar or bipolar switching voltages for switching from a low resistance state to a high resistance state and vice versa. | 11-07-2013 |
20130314974 | Bipolar Resistive-Switching Memory with a Single Diode Per Memory Cell - According to various embodiments, a resistive-switching memory element and memory element array that uses a bipolar switching includes a select element comprising only a single diode that is not a Zener diode. The resistive-switching memory elements described herein can switch even when a switching voltage less than the breakdown voltage of the diode is applied in the reverse-bias direction of the diode. The memory elements are able to switch during the very brief period when a transient pulse voltage is visible to the memory element, and therefore can use a single diode per memory cell. | 11-28-2013 |
20140001430 | Surface Treatment to Improve Resistive-Switching Characteristics | 01-02-2014 |
20140001431 | Reduction of forming voltage in semiconductor devices | 01-02-2014 |
20140014892 | Resistive-Switching Memory Element - A resistive-switching memory element is described. The memory element includes a first electrode, a porous layer over the first electrode including a point defect embedded in a plurality of pores of the porous layer, and a second electrode over the porous layer, wherein the nonvolatile memory element is configured to switch between a high resistive state and a low resistive state. | 01-16-2014 |
20140038352 | Non-volatile Resistive-Switching Memories - Non-volatile resistive-switching memories are described, including a memory element having a first electrode, a second electrode, a metal oxide between the first electrode and the second electrode. The metal oxide switches using bulk-mediated switching, has a bandgap greater than 4 electron volts (eV), has a set voltage for a set operation of at least one volt per one hundred angstroms of a thickness of the metal oxide, and has a leakage current density less than 40 amps per square centimeter (A/cm | 02-06-2014 |
20140051210 | Nonvolatile Memory Elements - Nonvolatile memory elements that are based on resistive switching memory element layers are provided. A nonvolatile memory element may have a resistive switching metal oxide layer. The resistive switching metal oxide layer may have one or more layers of oxide. A resistive switching metal oxide may be doped with a dopant that increases its melting temperature and enhances its thermal stability. Layers may be formed to enhance the thermal stability of the nonvolatile memory element. An electrode for a nonvolatile memory element may contain a conductive layer and a buffer layer. | 02-20-2014 |
20140084236 | ALD processing techniques for forming non-volatile resistive switching memories - ALD processing techniques for forming non-volatile resistive-switching memories are described. In one embodiment, a method includes forming a first electrode on a substrate, maintaining a pedestal temperature for an atomic layer deposition (ALD) process of less than 100° Celsius, forming at least one metal oxide layer over the first electrode, wherein the forming the at least one metal oxide layer is performed using the ALD process using a purge duration of less than 20 seconds, and forming a second electrode over the at least one metal oxide layer. | 03-27-2014 |
20140090596 | Methods of Combinatorial Processing for Screening Multiple Samples on a Semiconductor Substrate - In embodiments of the current invention, methods of combinatorial processing and a test chip for use in these methods are described. These methods and test chips enable the efficient development of materials, processes, and process sequence integration schemes for semiconductor manufacturing processes. In general, the methods simplify the processing sequence of forming devices or partially formed devices on a test chip such that the devices can be tested immediately after formation. The immediate testing allows for the high throughput testing of varied materials, processes, or process sequences on the test chip. The test chip has multiple site isolated regions where each of the regions is varied from one another and the test chip is designed to enable high throughput testing of the different regions. | 04-03-2014 |
20140138602 | Controlled Localized Defect Paths for Resistive Memories - Controlled localized defect paths for resistive memories are described, including a method for forming controlled localized defect paths including forming a first electrode forming a metal oxide layer on the first electrode, masking the metal oxide to create exposed regions and concealed regions of a surface of the metal oxide, and altering the exposed regions of the metal oxide to create localized defect paths beneath the exposed regions. | 05-22-2014 |
20140141534 | dielectric doping using high productivity combinatorial methods - A combination of deposition processes can be used to evaluate layer properties using a combinatorial workflow. The processes can include a base ALD process and another process, such as a PVD process. The high productivity combinatorial technique can provide an evaluation of the material properties for given ALD base layer and PVD additional elements. An ALD process can then be developed to provide the desired layers, replacing the ALD and PVD combination. | 05-22-2014 |
20140151626 | Selector Device Using Low Leakage Dielectric Mimcap Diode - MIMCAP diodes are provided that can be suitable for memory device applications, such as current selector devices for cross point memory array. The MIMCAP diodes can have lower thermal budget as compared to Schottky diodes and controllable lower barrier height and lower series resistance as compared to MIMCAP tunneling diodes. The MIMCAP diode can include a barrier height modification layer, a low leakage dielectric layer and a high leakage dielectric layer. The layers can be sandwiched between two electrodes. | 06-05-2014 |
20140175603 | Method of Forming an Asymmetric MIMCAP or a Schottky Device as a Selector Element for a Cross-Bar Memory Array - MIMCAP devices are provided that can be suitable for memory device applications, such as current selector devices for cross point memory array. The MIMCAP devices can have lower thermal budget as compared to Schottky diodes and controllable lower barrier height and lower series resistance as compared to MIMCAP tunneling diodes. The MIMCAP diode can include a low defect dielectric layer, a high defect dielectric layer, sandwiched between two electrodes having different work function values. | 06-26-2014 |
20140179033 | Methods for Forming Templated Materials - Methods of forming layers can comprise defining a plurality of discrete site-isolated regions (SIRs) on a substrate, forming a first layer on one of the discrete SIRs, forming a second layer on the first layer, measuring a lattice parameter or an electrical property of the second layer, The process parameters for the formation of the first layer are varied in a combinatorial manner between different discrete SIRs to explore the possible layers that can result in suitable lattice matching for second layer of a desired crystalline structure. | 06-26-2014 |
20140183439 | CURRENT SELECTOR FOR NON-VOLATILE MEMORY IN A CROSS BAR ARRAY BASED ON DEFECT AND BAND ENGINEERING METAL-DIELECTRIC-METAL STACKS - Selector devices that can be suitable for memory device applications can have low leakage currents at low voltages to reduce sneak current paths for non selected devices, and high leakage currents at high voltages to minimize voltage drops during device switching. In some embodiments, the selector device can include a first electrode, a tri-layer dielectric layer, and a second electrode. The tri-layer dielectric layer can include a high leakage dielectric layer sandwiched between two lower leakage dielectric layers. The low leakage layers can function to restrict the current flow across the selector device at low voltages. The high leakage dielectric layer can function to enhance the current flow across the selector device at high voltages. | 07-03-2014 |
20140247649 | Bipolar Resistive-Switching Memory with a Single Diode Per Memory Cell - According to various embodiments, a resistive-switching memory element and memory element array that uses a bipolar switching includes a select element comprising only a single diode that is not a Zener diode. The resistive-switching memory elements described herein can switch even when a switching voltage less than the breakdown voltage of the diode is applied in the reverse-bias direction of the diode. The memory elements are able to switch during the very brief period when a transient pulse voltage is visible to the memory element, and therefore can use a single diode per memory cell. | 09-04-2014 |
20140256111 | Nonvolatile Memory Elements - Nonvolatile memory elements that are based on resistive switching memory element layers are provided. A nonvolatile memory element may have a resistive switching metal oxide layer. The resistive switching metal oxide layer may have one or more layers of oxide. A resistive switching metal oxide may be doped with a dopant that increases its melting temperature and enhances its thermal stability. Layers may be formed to enhance the thermal stability of the nonvolatile memory element. An electrode for a nonvolatile memory element may contain a conductive layer and a buffer layer. | 09-11-2014 |
20140264239 | Using multi-layer MIMCAPs in the tunneling regime as selector element for a cross-bar memory array - Selector devices that can be suitable for memory device applications can have low leakage currents at low voltages to reduce sneak current paths for non selected devices, and high leakage currents at high voltages to minimize voltage drops during device switching. The selector device can include a first electrode, a tri-layer dielectric layer, and a second electrode. The tri-layer dielectric layer can include a low band gap dielectric layer disposed between two higher band gap dielectric layers. The high band gap dielectric layers can be doped with doping materials to form traps at energy levels higher than the operating voltage of the memory device. | 09-18-2014 |
20140264241 | ZnTe on TiN or Pt Electrodes as a Resistive Switching Element for ReRAM Applications - Resistive random access memory (ReRAM) cells can include a ZnTe switching layer and TiN or Pt electrodes. The combination of the switching layer of ZnTe and the electrodes of TiN or Pt is designed to achieve desirable performance characteristics, such as low current leakage as well as low and consistent switching currents. High temperature anneal of the ZnTe switching layer can further improve the performance of the ReRAM cells. The switching layer may be deposited using various techniques, such as sputtering or atomic layer deposition (ALD). | 09-18-2014 |
20140264252 | Current Selector for Non-Volatile Memory in a Cross Bar Array Based on Defect and Band Engineering Metal-Dielectric-Metal Stacks - Selector devices that can be suitable for memory device applications can have low leakage currents at low voltages to reduce sneak current paths for non selected devices, and high leakage currents at high voltages to minimize voltage drops during device switching. In some embodiments, the selector device can include a first electrode, a tri-layer dielectric layer, and a second electrode. The tri-layer dielectric layer can include a high leakage dielectric layer sandwiched between two lower leakage dielectric layers. The low leakage layers can function to restrict the current flow across the selector device at low voltages. The high leakage dielectric layer can function to enhance the current flow across the selector device at high voltages. | 09-18-2014 |
20140273525 | Atomic Layer Deposition of Reduced-Leakage Post-Transition Metal Oxide Films - Metal-oxide films (e.g., aluminum oxide) with low leakage current suitable for high-k gate dielectrics are deposited by atomic layer deposition (ALD). The purge time after the metal-deposition phase is 5-15 seconds, and the purge time after the oxidation phase is prolonged beyond 60 seconds. Prolonging the post-oxidation purge produced an order-of-magnitude reduction of leakage current in 30 Å-thick Al | 09-18-2014 |
20140302659 | Method for Reducing Forming Voltage in Resistive Random Access Memory - Methods for producing RRAM resistive switching elements having reduced forming voltage include preventing formation of interfacial layers, and creating electronic defects in a dielectric film. Suppressing interfacial layers in an electrode reduces forming voltage. Electronic defects in a dielectric film foster formation of conductive pathways. | 10-09-2014 |
20140322887 | Surface Treatment to Improve Resistive-Switching Characteristics - This disclosure provides a method of fabricating a semiconductor device layer and associated memory cell structures. By performing a surface treatment process (such as ion bombardment) of a semiconductor device layer to create defects having a deliberate depth profile, one may create multistable memory cells having more consistent electrical parameters. For example, in a resistive-switching memory cell, one may obtain a tighter distribution of set and reset voltages and lower forming voltage, leading to improved device yield and reliability. In at least one embodiment, the depth profile is selected to modulate the type of defects and their influence on electrical properties of a bombarded metal oxide layer and to enhance uniform defect distribution. | 10-30-2014 |
20140361236 | ALD processing techniques for forming non-volatile resistive switching memories - ALD processing techniques for forming non-volatile resistive-switching memories are described. In one embodiment, a method includes forming a first electrode on a substrate, maintaining a pedestal temperature for an atomic layer deposition (ALD) process of less than 100° Celsius, forming at least one metal oxide layer over the first electrode, wherein the forming the at least one metal oxide layer is performed using the ALD process using a purge duration of less than 20 seconds, and forming a second electrode over the at least one metal oxide layer. | 12-11-2014 |
20150097153 | Non-volatile Resistive-Switching Memories - Non-volatile resistive-switching memories are described, including a memory element having a first electrode, a second electrode, a metal oxide between the first electrode and the second electrode. The metal oxide switches using bulk-mediated switching, has a bandgap greater than 4 electron volts (eV), has a set voltage for a set operation of at least one volt per one hundred angstroms of a thickness of the metal oxide, and has a leakage current density less than 40 amps per square centimeter (A/cm | 04-09-2015 |
20150137062 | Mimcaps with quantum wells as selector elements for crossbar memory arrays - Selector devices suitable for memory arrays have low leakage currents at low voltages, reducing sneak current paths for non-selected devices, and high leakage currents at high voltages, reducing voltage drops during switching. The selector device may include a non-conductive tri-layer between two electrodes. The non-conductive tri-layer may include a low-bandgap dielectric layer between two higher-bandgap dielectric layers. The high-bandgap dielectric layers may be doped to form traps at energy levels higher than the write voltage of the memory device. With a thin low-bandgap layer and a large bandgap difference from the high-bandgap layers, the selector may operate as a quantum well, conductive when the electrode Fermi level matches the lowest energy level of the quantum well and insulating at lower voltages. | 05-21-2015 |
20150137064 | Reduction of forming voltage in semiconductor devices - This disclosure provides a nonvolatile memory device and related methods of manufacture and operation. The device may include one or more resistive random access memory (ReRAM) approaches to provide a memory device with more predictable operation. In particular, the forming voltage required by particular designs may be reduced through the use of a barrier layer, a reverse polarity forming voltage pulse, a forming voltage pulse where electrons are injected from a lower work function electrode, or an anneal in a reducing environment. One or more of these techniques may be applied, depending on the desired application and results. | 05-21-2015 |
20150140772 | USING MULTI-LAYER MIMCAPS WITH DEFECTIVE BARRIER LAYERS ASSELECTOR ELEMENT FOR A CROSS BAR MEMORY ARRAY - Selector devices that can be suitable for memory device applications can have low leakage currents at low voltages to reduce sneak current paths for non selected devices, and high leakage currents at high voltages to minimize voltage drops during device switching. The selector device can include a first electrode, a tri-layer dielectric layer, and a second electrode. The tri-layer dielectric layer can include a low band gap dielectric layer disposed between two higher band gap dielectric layers. The high band gap dielectric layers can be doped with doping materials to form traps at energy levels higher than the operating voltage of the memory device. | 05-21-2015 |
20150140779 | Selector Device Using Low Leakage Dielectric MIMCAP Diode - MIMCAP diodes are provided that can be suitable for memory device applications, such as current selector devices for cross point memory array. The MIMCAP diodes can have lower thermal budget as compared to Schottky diodes and controllable lower barrier height and lower series resistance as compared to MIMCAP tunneling diodes. The MIMCAP diode can include a barrier height modification layer, a low leakage dielectric layer and a high leakage dielectric layer. The layers can be sandwiched between two electrodes. | 05-21-2015 |
20150147866 | Resistive-Switching Memory Element - A resistive-switching memory element is described. The memory element includes a first electrode, a porous layer over the first electrode including a point defect embedded in a plurality of pores of the porous layer, and a second electrode over the porous layer, wherein the nonvolatile memory element is configured to switch between a high resistive state and a low resistive state. | 05-28-2015 |
20150179933 | TiOx Based Selector Element - Control elements that can be suitable for nonvolatile memory device applications are disclosed. The control element can have low leakage currents at low voltages to reduce sneak current paths for non selected devices, and high leakage currents at high voltages to minimize voltage drops during device switching. The control element can be based on a single dielectric layer or on a multilayer dielectric stack. | 06-25-2015 |
20150179934 | ZrOx/STO/ZrOx Based Selector Element - Control elements that can be suitable for nonvolatile memory device applications are disclosed. The control element can have low leakage currents at low voltages to reduce sneak current paths for non selected devices, and high leakage currents at high voltages to minimize voltage drops during device switching. The control element can be based on multilayer dielectric stacks. The control element can include a zirconium oxide-strontium-titanium oxide-zirconium oxide multilayer stack. The zirconium oxide can be replaced by at least one of hafnium oxide, aluminum oxide, magnesium oxide, or one of the lanthanide oxides. | 06-25-2015 |
20150255716 | Non-volatile Resistive-Switching Memories - Non-volatile resistive-switching memories are described, including a memory element having a first electrode, a second electrode, a metal oxide between the first electrode and the second electrode. The metal oxide switches using bulk-mediated switching, has a bandgap greater than 4 electron volts (eV), has a set voltage for a set operation of at least one volt per one hundred angstroms of a thickness of the metal oxide, and has a leakage current density less than 40 amps per square centimeter (A/cm | 09-10-2015 |