Patent application number | Description | Published |
20080289528 | INSPECTION SYSTEM FOR INSPECTING AN IMPRINTED SUBSTRATE ON A PRINTING PRESS - An inspection system for inspecting an imprinted substrate on a printing press has a light source, a contact image sensor, and a processor. The light source is configured to illuminate a portion of the substrate which has been imprinted with different colors at a plurality of printing units of the printing press. The contact image sensor has a plurality of sensing elements. Each sensing element senses light reflected by a corresponding region on the substrate to produce data representative of the corresponding region printed on the substrate. The processor is configured to receive the data representative of the imprinted substrate and to compare the data representative of the corresponding region printed on the substrate with stored reference data. | 11-27-2008 |
20100264338 | INSPECTING AN IMPRINTED SUBSTRATE ON A PRINTING PRESS - A method of inspecting an imprinted substrate on a printing press comprises illuminating a portion of the substrate which has been imprinted with different colors at a plurality of printing units of the printing press. The method further comprises sensing light reflected by the substrate using a contact image sensor to produce data representative of the imprinted substrate, and comparing the data representative of the printed substrate with stored reference data. | 10-21-2010 |
20110255137 | IMAGING AN IMPRINTED SUBSTRATE ON A PRINTING PRESS - A method of imaging an imprinted substrate on a printing press is provided. The method comprises sensing light reflected by the substrate using a contact image sensor to produce data representative of the imprinted substrate. The substrate has been imprinted with different colors at a plurality of printing units of the printing press. Each printing unit comprises a plate cylinder. The method further comprises storing the data representative of the imprinted substrate in a memory. | 10-20-2011 |
20130021600 | IMAGING AN IMPRINTED SUBSTRATE ON A PRINTING PRESS - Systems and methods for imaging an imprinted substrate on a printing press is provided. One method comprises sensing light reflected by the substrate using a contact image sensor to produce data representative of the imprinted substrate. The substrate has been imprinted with different colors at a plurality of printing units of the printing press. Each printing unit comprises a plate cylinder. The data representative of the imprinted substrate is output by the contact image sensor as analog voltage signals. The method further comprises receiving the analog voltage signals from the contact image sensor at a sensor interface circuit and converting the analog voltage signals to digital signals using an analog-to-digital converter of the sensor interface circuit. The method further comprises processing the digital signals using the sensor interface circuit to produce corrected digital signals and storing data based on the corrected digital signals in a memory. | 01-24-2013 |
Patent application number | Description | Published |
20090022223 | HIGH QUALITY, LOW MEMORY BANDWIDTH MOTION ESTIMATION PROCESSOR - An apparatus generally having a first circuit and a second circuit is disclosed. The first circuit may be configured to (i) copy a plurality of first reference samples of a first reference image from an external memory, the first reference samples being proximate a first position within the first reference image and (ii) generate a first motion vector corresponding to a first current block of a current image by searching among the first reference samples. The second circuit may be configured to (i) copy a plurality of second reference samples of the first reference image from the external memory, the second reference samples being (a) proximate a second position within the first reference image and (b) non-adjacent the first reference samples and (ii) generate a second motion vector corresponding to the first current block by searching among the second reference samples. | 01-22-2009 |
20090034611 | CAVLC run before encode with zero cycle costs - An apparatus including a control circuit and an encoder circuit. The control circuit may configured to generate a first control signal and a second control signal. The encoder circuit may be configured to (i) receive a plurality of coefficients, the first control signal and the second control signal and (ii) generate an encoded signal in response to the plurality of coefficients, the first control signal and the second control signal. The encoder circuit may be further configured to simultaneously encode run before syntax elements with the plurality of coefficients. | 02-05-2009 |
20090037133 | DEVICE FOR THOROUGH TESTING OF SECURE ELECTRONIC COMPONENTS - An apparatus including a test circuit, an output circuit and a control circuit. The test circuit may be configured to generate test data in response to one or more test vectors. The output circuit may be configured to present data in a first mode and prevent presentation of data in a second mode. The output circuit may be configured to switch between the first mode and the second mode in response to a control signal. The control circuit may be configured to generate the control signal according to predetermined criteria for protecting secure data within the apparatus while allowing the test data to be presented. | 02-05-2009 |
20110150075 | CONTEXT ADAPTIVE BINARY ARITHMETIC DECODING FOR HIGH DEFINITION VIDEO - An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to present a video signal and macroblock data in response to decoding one or more bins on a binary signal. The second circuit may be configured to, in parallel (i) generate the binary signal in response to a bitstream signal and an initial context information and (ii) calculate subsequent context information. | 06-23-2011 |
20130259119 | APPARATUSES AND METHODS FOR PROVIDING QUANTIZED COEFFICIENTS FOR VIDEO ENCODING - Apparatuses and methods for optimizing rate-distortion costs in a signal are disclosed. An apparatus may comprise a quantization block that may be configured to generate a plurality of candidates for each of a plurality of coefficients. The quantization block may further generate a respective plurality of arcs based, at least in part, on the plurality of candidates. The quantization block may be configured to determine which of the plurality of arcs has a lowest cost using a trellis optimization technique. Fractional bit estimations may be used to calculate rate, and inverse lambda may be used to calculate candidate coefficients. | 10-03-2013 |
20130279597 | APPARATUSES AND METHODS FOR BITSTREAM BITSTUFFING - Examples of methods and apparatuses for inserting and removing stuffing data in a bitstream described. An encoding system may include an encoder configured to receive a video signal and stuffing data. The encoder may be configured encode the video signal in accordance with an encoding methodology and provide a bitstream based on the encoded video signal and the stuffing data. The stuffing data may include random and/or encrypted data. A decoder may receive a bitstream and remove stuffing data from the bitstream. The decoder may include a padding removal apparatus that may include a slice detection block and a bitstream editor. The slice detection block may be configured to determine locations of stuffing data in a bitstream and provide the locations to the bitstream editor using control signals. The bitstream editor may be configured to remove the stuffing data based on the control signals. | 10-24-2013 |
20130301699 | APPARATUSES AND METHODS FOR ESTIMATING BITSTREAM BIT COUNTS - Examples of methods and apparatuses for estimating bit counts of a bitstream are described herein. An entropy encoder may include a bitstream encoding module and a bit count estimation module. The bitstream encoding module may be configured to encode a plurality of syntax elements according to a first encoding technique. The bit count estimation module may be configured to provide estimated bit counts for encoding the plurality of syntax elements according to a second encoding technique. In at least one embodiment, the bitstream encoding module may be further configured to encode the plurality of syntax elements based on the estimated bit counts. | 11-14-2013 |
20140086314 | APPARATUSES AND METHODS FOR OPTIMIZING RATE-DISTORTION OF SYNTAX ELEMENTS - Methods and apparatuses for optimizing rate-distortion of syntax elements are disclosed herein. An optimization block may be used in a video encoder and may include a candidate generation block and a best cost block. The optimization block may be configured to generate a plurality of candidates corresponding to respective differential levels. Each of the plurality of candidates may be based, at least in part, on a DC coefficient and provide a respective rate-distortion cost. The best cost block may be coupled to the candidate generation block and may be configured to select a candidate of the plurality of candidates according to a criteria. | 03-27-2014 |
20140269902 | APPARATUSES AND METHODS FOR PROVIDING QUANTIZED COEFFICIENTS FOR VIDEO ENCODING - Apparatuses and methods for optimizing rate-distortion costs in a signal are disclosed herein. An apparatus may comprise a quantization block that may be configured to serially receive a plurality of coefficients and to generate a plurality of candidates for each of a plurality of coefficients. The quantization block may further be configured to generate a respective arc for each of the candidates having a respective rate and in accordance with the MPEG-2 coding standard. The quantization block may further be configured to identify which of the plurality of arcs has a minimum cost and provide a modified plurality of coefficients associated with the minimum cost arc. | 09-18-2014 |
20140334532 | SYSTEMS, APPARATUSES, AND METHODS FOR TRANSCODING A BITSTREAM - Examples of systems, apparatuses, and methods for to transcoding a bitstream are described herein. An example content distribution system may include an interconnect configured to provide encoded video data from an encoder to a decoder. The interconnect is configured to receive a bitstream including the encoded video data from the encoder. The bitstream is encoded using a first lossless coding methodology. The interconnect including a transcoder configured to transcode the bitstream using a second lossless coding methodology to provide a transcoded bitstream. | 11-13-2014 |
20150063449 | APPARATUSES AND METHODS FOR CABAC INITIALIZATION - Apparatuses and methods for initializing a CABAC state are disclosed herein. An example apparatus may include an encoder configured to receive a macroblock dependent on at least one unencoded macroblock. The encoder may further be configured to receive a plurality of CABAC states and initialize CABAC in accordance with one of the plurality of CABAC states to encode the macroblock prior to the at least one unencoded macroblock being encoded. | 03-05-2015 |
20150256832 | APPARATUSES AND METHODS FOR PERFORMING VIDEO QUANTIZATION RATE DISTORTION CALCULATIONS - Examples of methods and apparatuses for performing video quantization rate distortion calculations are described herein. An example apparatus may include an encoder configured to encode a macroblock of a frame. The encoder including a rate-distortion (RD) calculator configured to individually quantize a set of coefficient blocks using each of a subset of a plurality of quantization parameter (QP) values to provide individual sets of quantized coefficient blocks. Each of the individual sets of coefficient blocks is based on data of the macroblock. The RD calculator is further configured to determine individual accumulated rate and accumulated distortion value pairs for each of the plurality of QP values based on the individual sets of quantized coefficient blocks. The RD calculator further including a mode decision block configured to receive the individual accumulated rate and accumulated distortion value pairs and to generate a RD cost-QP curve based on the individual accumulated rate and accumulated distortion value pairs. The mode decision block further configured to select a QP value during encoding of the macroblock based on the RD cost-QP curve. | 09-10-2015 |
Patent application number | Description | Published |
20080226221 | INTEGRATED REFLECTOR FOR PLANAR LIGHTWAVE CIRCUITS - A reflector chip of the present invention integrates a planar lightwave circuit (PLC) waveguide wafer and an active component, such as a photo-detector or laser, e.g. vertical cavity surface emitting laser. Typically, the PLC waveguide wafer includes a waveguide core region bound by upper and lower cladding layers. An end of the waveguide core region is mounted within a channel, trench, notch or recess within the bottom surface of the body of the reflector chip. A V-notch is also formed in the bottom surface of the body of the reflector, including a reflective surface, which redirects the light between the active component and the waveguide core region. | 09-18-2008 |
20080240654 | HYBRID PLANAR LIGHTWAVE CIRCUIT WITH REFLECTIVE GRATINGS - The present invention relates to a hybrid planar lightwave circuit in which a silicon reflective diffraction grating etched with a highly accurate deep reactive ion etching process is mounted in a trench formed in a high optical performance silica on silicon waveguide device. | 10-02-2008 |
20090310912 | INTEGRATED WAVELENGTH LOCKER AND MULTIPLEXER - An etched grating based chip provides a portion of each of a plurality of input optical signals from a plurality of laser diodes as optical feedback to the plurality of laser diodes, and couples the remaining light from the laser diodes onto an optical fiber, all the while maintaining a small form-factor, and meeting strict conditions regarding laser beat frequency. The present invention is applicable for both a single laser diode at a single wavelength and for an array of diodes at multiple wavelengths, which are multiplexed together in accordance with the present invention. The economics of laser diodes is much improved by decoupling the wavelength locking segment from the gain segment of the diode. Furthermore, the additional wavelength stability of such a locked diode will improve the performance and the economics of the network. | 12-17-2009 |
20090310913 | SEGMENTED WAVEGUIDE STRUCTURE - Segmented waveguide structures provide mode matching in planar lightwave circuits between waveguides and other waveguiding structures, e.g. slab waveguides and optical fibers. The present invention eliminates back reflections from the core segments by etching the leading and trailing faces of the core segments with a plurality of parallel facet sections, which are rearwardly offset in the transmission direction by an odd number of quarter wavelengths. | 12-17-2009 |
Patent application number | Description | Published |
20110143296 | METHOD AND APPARATUS FOR TEMPERATURE CONTROL IN A REACTOR VESSEL - A method and apparatus are disclosed for controlling a temperature within a reactor vessel such as an autoclave operating at elevated temperature and pressure. The apparatus includes a preheating vessel for preheating a feed material such as an aqueous slurry. The preheating vessel forms part of a preheating control system which provides the primary means of temperature control within the reactor vessel, and the reactor temperature is used as the setpoint for the preheating control system. The apparatus also comprises secondary means for heating and cooling the reactor. The feed material temperature is increased or decreased by the preheating control system, based on the reactor temperature. This is sufficient to heat or cool the reactor under most process conditions. Where the preheating control system is at or near its capacity for heating or cooling, the secondary heating or cooling means is activated to bring the reactor temperature within an optimum range. | 06-16-2011 |
20120271597 | FLASH TUBE AND FLASH VESSEL CONFIGURATION FOR PRESSURE LETDOWN - By appropriately designing a flash tube, spraying of abrasive slurry on the vessel walls and impinging the multiphase jet on bottom of the vessel are minimized. By appropriately designing a flash vessel, once the flash tube has been designed, a slurry pool is provided having a volume that is sufficient to dissipate the flash tube exit jet momentum and the mass of entrained carry-over products exiting from the vapor outlet is minimized. | 10-25-2012 |
20150050188 | MULTI-COMPARTMENT REACTOR AND METHOD FOR CONTROLLING RETENTION TIME IN A MULTI-COMPARTMENT REACTOR - A method is disclosed for controlling retention time in a reactor, such as an autoclave, having a plurality of compartments separated by dividers with underflow openings. A retention time of the reaction mixture is calculated and compared with an optimal retention time, and the volumes of the reaction mixture in the compartments are adjusted while maintaining the flow rate of the reaction mixture, so as to change the retention time to a value which is closer to the optimal retention time. The reactor may include a level sensor in the last compartment for generating volume data; a control valve for controlling the liquid level in the last compartment; and a controller which receives volume data from the level sensor and controls operation of the control valve. | 02-19-2015 |