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| 20090043527 | COMPUTER-IMPLEMENTED METHODS, CARRIER MEDIA, AND SYSTEMS FOR GENERATING A METROLOGY SAMPLING PLAN - Various computer-implemented methods, carrier media, and systems for generating a metrology sampling plan are provided. One computer-implemented method for generating a metrology sampling plan includes identifying one or more individual defects that have one or more attributes that are abnormal from one or more attributes of a population of defects in which the individual defects are included. The population of defects is located in a predetermined pattern on a wafer. The method also includes generating the metrology sampling plan based on results of the identifying step such that one or more areas on the wafer in which the one or more identified individual defects are located are sampled during metrology. | 02-12-2009 |
| 20090055783 | COMPUTER-IMPLEMENTED METHODS FOR DETERMINING IF ACTUAL DEFECTS ARE POTENTIALLY SYSTEMATIC DEFECTS OR POTENTIALLY RANDOM DEFECTS - Various computer-implemented methods for determining if actual defects are potentially systematic defects or potentially random defects are provided. One computer-implemented method for determining if actual defects are potentially systematic defects or potentially random defects includes comparing a number of actual defects in a group to a number of randomly generated defects in a group. The actual defects are detected on a wafer. A portion of a design on the wafer proximate a location of each of the actual defects in the group and each of the randomly generated defects in the group is substantially the same. The method also includes determining if the actual defects in the group are potentially systematic defects or potentially random defects based on results of the comparing step. | 02-26-2009 |
| 20090297019 | METHODS AND SYSTEMS FOR UTILIZING DESIGN DATA IN COMBINATION WITH INSPECTION DATA - Various methods and systems for utilizing design data in combination with inspection data are provided. One computer-implemented method for binning defects detected on a wafer includes comparing portions of design data proximate positions of the defects in design data space. The method also includes determining if the design data in the portions is at least similar based on results of the comparing step. In addition, the method includes binning the defects in groups such that the portions of the design data proximate the positions of the defects in each of the groups are at least similar. The method further includes storing results of the binning step in a storage medium. | 12-03-2009 |
| 20110170091 | INSPECTION GUIDED OVERLAY METROLOGY - Inspection guided overlay metrology may include performing a pattern search in order to identify a predetermined pattern on a semiconductor wafer, generating a care area for all instances of the predetermined pattern on the semiconductor wafer, identifying defects within generated care areas by performing an inspection scan of each of the generated care areas, wherein the inspection scan includes a low-threshold or a high sensitivity inspection scan, identifying overlay sites of the predetermined pattern of the semiconductor wafer having a measured overlay error larger than a selected overlay specification utilizing a defect inspection technique, comparing location data of the identified defects of a generated care area to location data of the identified overlay sites within the generated care area in order to identify one or more locations wherein the defects are proximate to the identified overlay sites, and generating a metrology sampling plan based on the identified locations. | 07-14-2011 |
| 20110172804 | Scanner Performance Comparison And Matching Using Design And Defect Data - A system and method of matching multiple scanners using design and defect data are described. A golden wafer is processed using a golden tool. A second wafer is processed using a second tool. Both tools provide focus/exposure modulation. Wafer-level spatial signatures of critical structures for both wafers can be compared to evaluate the behavior of the scanners. Critical structures can be identified by binning defects on the golden wafer having similar patterns. In one embodiment, the signatures must match within a certain percentage or the second tool is characterized as a “no match”. Reticles can be compared in a similar manner, wherein the golden and second wafers are processed using a golden reticle and a second reticle, respectively. | 07-14-2011 |
| 20120141013 | REGION BASED VIRTUAL FOURIER FILTER - The present invention includes searching imagery data in order to identify one or more patterned regions on a semiconductor wafer, generating one or more virtual Fourier filter (VFF) working areas, acquiring an initial set of imagery data from the VFF working areas, defining VFF training blocks within the identified patterned regions of the VFF working areas utilizing the initial set of imagery data, wherein each VFF training block is defined to encompass a portion of the identified patterned region displaying a selected repeating pattern, calculating an initial spectrum for each VFF training block utilizing the initial set of imagery data from the VFF training blocks, and generating a VFF for each training block by identifying frequencies of the initial spectrum having maxima in the frequency domain, wherein the VFF is configured to null the magnitude of the initial spectrum at the frequencies identified to display spectral maxima. | 06-07-2012 |
| 20120216169 | DESIGN BASED DEVICE RISK ASSESSMENT - The present invention includes defining a multiple patterns of interest utilizing design data of the device; generating a design based classification database, the DBC database including design data associated with each of the POIs; receiving one or more inspection results; comparing the inspection results to each of the plurality of POIs in order to identify an occurrence of at least one of the POIs in the inspection results; determining yield impact of each POI utilizing process yield data; monitoring a frequency of occurrence of each of the POIs and the criticality of the POIs in order to identify process excursions of the device; and determining a device risk level by calculating a normalized polygon frequency for the device utilizing a frequency of occurrence for each of the critical polygons and a criticality for each of the critical polygons, the critical polygons defined utilizing design data of the device. | 08-23-2012 |
| 20120316855 | Using Three-Dimensional Representations for Defect-Related Applications - Various embodiments for using three-dimensional representations for defect-related applications are provided. | 12-13-2012 |
| 20130064442 | Determining Design Coordinates for Wafer Defects - Methods and systems for determining design coordinates for defects detected on a wafer are provided. One method includes aligning a design for a wafer to defect review tool images for defects detected in multiple swaths on the wafer by an inspection tool, determining a position of each of the defects in design coordinates based on results of the aligning, separately determining a defect position offset for each of the multiple swaths based on the swath in which each of the defects was detected (swath correction factor), the design coordinates for each of the defects, and a position for each of the defects determined by the inspection tool, and determining design coordinates for the other defects detected in the multiple swaths by the inspection tool by applying the appropriate swath correction factor to those defects. | 03-14-2013 |
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| 20110016225 | DIGITAL CONTENT DISTRIBUTION SYSTEM AND METHOD - One embodiment of the present invention sets forth a technique for selecting a content distribution network (CDN) comprising at least one content server, from a plurality of CDNs, and a playing digital content file from the CDN on a content player. Selecting the CDN is based on a rank order of CDNs, an assigned weight value for each CDN, and a bandwidth measured between the content player and each CDN. Advantageously, a given content player may select a CDN based on prevailing network and CDN loading conditions, thereby increasing overall robustness and reliability when downloading digital content file from a CDN. | 01-20-2011 |
| 20110019976 | ADAPTIVE STREAMING FOR DIGITAL CONTENT DISTRIBUTION - One embodiment of the present invention sets forth a technique for adapting playback bit rate to available delivery bandwidth in a content delivery system comprising a content server and a content player. A content player periodically estimates whether a given playback bit rate can feasibly provide complete playback for a given title assuming currently available bandwidth. If playback becomes unfeasible at a current bit rate assuming currently available bandwidth, then the content player adapts the bit rate downward until a feasible bit rate is achieved. If playback is feasible using a higher bit rate, then the content player may adapt the bit rate upward. | 01-27-2011 |
| 20110023076 | ADAPTIVE STREAMING FOR DIGITAL CONTENT DISTRIBUTION - One embodiment of the present invention sets forth a technique for adapting playback bit rate to available delivery bandwidth in a content delivery system comprising a content server and a content player. A content player periodically estimates whether a given playback bit rate can feasibly provide complete playback for a given title assuming currently available bandwidth. If playback becomes unfeasible at a current bit rate assuming currently available bandwidth, then the content player adapts the bit rate downward until a feasible bit rate is achieved. If playback is feasible using a higher bit rate, then the content player may adapt the bit rate upward. | 01-27-2011 |
| 20110268178 | ENCODING VIDEO STREAMS FOR ADAPTIVE VIDEO STREAMING - One embodiment of the invention sets forth an encoding server including components configured to encode a video stream associated with a content title for adaptive streaming. The video stream is first processed by a VC1 encoder to generate an encoded video stream comprising a multiple GOPs, each GOP including a key frame and having a different playback offset. The encoded video stream is then packaged such that the GOPs are stored in data packets of the packaged encoded stream. An SHI generator generates an SHI associated with the packaged encoded stream that includes a switch point associated with each GOP. Each switch point includes the playback offset associated with the corresponding GOP and the data packet storing the key frame of the corresponding GOP. The SHI associated with multiple packaged encoded video streams associated with the same content title and encoded to different playback bit rates have corresponding switch points. | 11-03-2011 |
| 20120226915 | Content Playback APIS Using Encrypted Streams - One embodiment of the present invention sets forth a technique for decrypting digital content in a secure environment. The technique includes the steps of receiving a digital rights management (DRM) license associated with a first frame of encrypted data from a DRM server, where the DRM license includes a decryption key for decrypting the first frame of encrypted data, transmitting the DRM license to a secure content playback pipeline for storage, and transmitting the first frame of encrypted data to the secure content playback pipeline for decryption, where, in response to receiving the first frame of encrypted data, a trusted processing entity within the secure content playback pipeline decrypts the first frame of encrypted data based on the decryption key included in the DRM license to generate a first set of decrypted data and store the first set of decrypted data in a secure memory space. | 09-06-2012 |
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| 20090213641 | MEMORY WITH ACTIVE MODE BACK-BIAS VOLTAGE CONTROL AND METHOD OF OPERATING SAME - Data storage cells of a static random access memory array are selectively provided with back-bias voltages to reduce current leakage during an active mode of operation. Circuitry electrically connected with the array receives control signals and provides the back-bias voltages to certain idle data storage cells of the array based on the control signals. | 08-27-2009 |
| 20090303819 | WRITE AND READ ASSIST CIRCUIT FOR SRAM WITH POWER RECYCLING - A memory circuit for reading and writing data into a SRAM memory array using charge recycling is presented. The write and read circuit includes a cell voltage level switch, a recycle charge storage, a precharge switch, a write enable switch, and column decoder. The cell voltage level switch is connected to a low power supply and a high power supply and has two states of operation: a write operation state and a read operation state. For each state of operation, the voltage level switch selectively provides a power supply if a column has been selected or if the operation is a read or write. The recycle charge storage stores excess charge from SRAM cells after a read operation or after a write operation in unselected columns. After the read or write operation, the recycle charge storage discharges excess charge to the bitlines during bitline precharging. | 12-10-2009 |
| 20100008171 | READ ASSIST CIRCUIT OF SRAM WITH LOW STANDBY CURRENT - A SRAM memory with a read assist circuit is presented. The read assist circuit uses bitline voltage level switches, which are connected to a low power supply and a high power supply. The bitline voltage level switches have a write operation state, a read operation state, and a standby operation state. The write operation state selectively provides the high power supply to bitlines in columns selected for a write operation, and provides the low power supply to bitlines in the remaining columns. The read operation state selectively provides the low power supply to bitlines in columns selected for the read operation, and provides the low power supply to bitlines in the other columns. The standby operation state selectively provides the low power supply to bitlines in all columns when not in the read operation state or the write operation state. | 01-14-2010 |
| 20100045249 | VOLTAGE REGULATOR FOR WRITE/READ ASSIST CIRCUIT - A push-pull voltage regulator configured to selectively provide power to used portions of a memory array is presented. The push-pull voltage regulator includes a voltage-up regulator, which provides a reference voltage to an SRAM array, and a voltage-down regulator, which controls removal of excess charge from the SRAM array. The voltage-down regulator consists of a plurality of amplifier stages with a plurality of inputs, a plurality of inverters, a gain amplifier, a biasing transistor, and a NMOS drainage transistor. The gate terminal of the NMOS drainage transistor is coupled to an output of the voltage-down regulator. A first output terminal of the NMOS drainage transistor coupled to an output node of the push-pull voltage regulator and a second output terminal of the NMOS drainage transistor coupled to ground. When activated, the NMOS drainage transistor transfers excess charge from the SRAM array to ground. | 02-25-2010 |
| 20100157706 | METHODS AND APPARATUSES FOR IMPROVING REDUCED POWER OPERATIONS IN EMBEDDED MEMORY ARRAYS - Methods and apparatuses are presented for improving reduced power operations in embedded memory arrays. Some embodiments may include a microprocessor, the microprocessor including at least one execution unit, a memory coupled to the execution unit, the memory including, a memory cell comprising a memory cell bus, a power circuit selectively coupling the memory cell bus to a first power plane and a second power plane, where the memory cell bus is coupled to the second power plane when the power circuit is substantially off, and a bit line pre-charge circuit coupled to the power circuit, where the power circuit selectively couples the first power plane to the pre-charge circuit for a predetermined period of time. | 06-24-2010 |
| 20100329063 | DYNAMICALLY CONTROLLED VOLTAGE REGULATOR FOR A MEMORY - A memory device that includes multiple blocks of static random access memory (SRAM), which each have a standby mode and an active operating mode, is described. During the active operating mode, a selection circuit couples a higher voltage from a first power-signal line and a power-supply circuit to a given block of SRAM, and during the standby mode the selection circuit couples a lower voltage from a second power-signal line to the given block of SRAM. Note that a regulator circuit regulates the lower voltage on the second power-signal line by selectively opening or closing a first switch between the first power-signal line and the second power-signal line. Furthermore, a recycling circuit selectively opens a second switch between the first switch and the first power-signal line when the block of SRAM transitions from the active operating mode to the standby mode, thereby transferring charge from the block of SRAM to other blocks of SRAM. | 12-30-2010 |
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| 20080275891 | METHOD TO CREATE A PARTITION-BY TIME/TUPLE-BASED WINDOW IN AN EVENT PROCESSING SERVICE - A method to create a partition by time/tuple based window in an event processing service is provided. When continuous data streams are received, tuples are stored in a data structure with partitions based upon partition keys. Only a specified amount of tuples may be stored in each partition. When a partition exceeds the specified number of tuples, the oldest tuples are removed from the data structure. Tuples stored beyond a specified time period are also removed from the data structure. Two data structures may also be used to implement a time/tuple based window. Tuples are stored in both a data structure with a partition by window and a data structure with a range window. Tuples are removed in the partition by window when tuples exceed the amount in the partition. Tuples are removed in the range window when tuples exceed a specified time period. The two data structures are synchronized. | 11-06-2008 |
| 20100223305 | INFRASTRUCTURE FOR SPILLING PAGES TO A PERSISTENT STORE - Techniques for managing memory usage in a processing system are provided. This may be achieved by receiving a data stream including multiple tuples and determining a query plan that was generated for a continuous query applied to the multiple tuples in the data stream. The query plan may include one or more operators. Before scheduling an operator in the query plan, it is determined when an eviction is to be performed based a level of free memory of the processing system. An eviction candidate is determined and a page associated with the eviction candidate is evicted from the memory to a persistent storage. | 09-02-2010 |
| 20100223437 | METHOD AND SYSTEM FOR SPILLING FROM A QUEUE TO A PERSISTENT STORE - Techniques for managing memory usage of a processing system by spilling data from a memory to a persistent store based upon an evict policy are provided. A triggering event is detected. In response to the triggering event and based on the evict policy, it is determined whether data from the memory of the processing system is to be spilled to the persistent storage. The determination is made by comparing a level of free memory of the processing system with a threshold specified by the evict policy. The data is evicted from the memory. | 09-02-2010 |
| 20100223606 | FRAMEWORK FOR DYNAMICALLY GENERATING TUPLE AND PAGE CLASSES - Techniques for reducing the memory used for processing events received in a data stream are provided. This may be achieved by reducing the memory required for storing tuples. A method for processing a data stream includes receiving a tuple and determining a tuple specification that defines a layout of the tuple. The layout identifies one or more data types that are included in the tuple. A tuple class corresponding to the tuple specification may be determined. A tuple object based on the tuple class is instantiated, and during runtime of the processing system. The tuple object is stored in a memory. | 09-02-2010 |
| 20110029484 | LOGGING FRAMEWORK FOR A DATA STREAM PROCESSING SERVER - Techniques for logging data pertaining to the operation of a data stream processing server. In one set of embodiments, logging configuration information can be received specifying a functional area of a data stream processing server to be logged. Based on the logging configuration information, logging can be dynamically enabled for objects associated with the functional area that are instantiated by the data stream processing server, and logging can be dynamically disabled for objects associated with the functional area that are discarded (or no longer used) by the data stream processing server. In another set of embodiments, a tool can be provided for visualizing the data logged by the data stream processing server. | 02-03-2011 |
| 20110029485 | LOG VISUALIZATION TOOL FOR A DATA STREAM PROCESSING SERVER - Techniques for logging data pertaining to the operation of a data stream processing server. In one set of embodiments, logging configuration information can be received specifying a functional area of a data stream processing server to be logged. Based on the logging configuration information, logging can be dynamically enabled for objects associated with the functional area that are instantiated by the data stream processing server, and logging can be dynamically disabled for objects associated with the functional area that are discarded (or no longer used) by the data stream processing server. In another set of embodiments, a tool can be provided for visualizing the data logged by the data stream processing server. | 02-03-2011 |
| 20110161321 | EXTENSIBILITY PLATFORM USING DATA CARTRIDGES - A framework for extending the capabilities of an event processing system using one or more plug-in components referred to herein as data cartridges. Generally speaking, a data cartridge is a self-contained unit of data that can be registered with an event processing system and can store information pertaining to one or more objects (referred to herein as extensible objects) that are not natively supported by the system. Examples of such extensible objects can include data types, functions, indexes, data sources, and others. By interacting with a data cartridge, an event processing system can compile and execute queries that reference extensible objects defined in the data cartridge, thereby extending the system beyond its native capabilities. | 06-30-2011 |
| 20110161328 | SPATIAL DATA CARTRIDGE FOR EVENT PROCESSING SYSTEMS - Techniques for extending the capabilities of an event processing system to support the processing of spatial data. In one set of embodiments, this extensibility can be provided via a plug-in extension component referred to herein as a spatial data cartridge. The spatial data cartridge can enable the event processing system to support spatial data types (e.g., point, polygon, etc.) and various operations related to such data types (e.g., proximity determinations, overlap determinations, etc.). The spatial data cartridge can also define an indexing scheme that can be integrated with the capabilities of the event processing system to support the indexing of spatial data. Using the spatial data cartridge, the event processing system can operate on spatial data even if spatial data formats are not natively supported by the system. | 06-30-2011 |
| 20110161352 | EXTENSIBLE INDEXING FRAMEWORK USING DATA CARTRIDGES - A framework or infrastructure (extensibility framework/infrastructure) for extending the indexing capabilities of an event processing system. The capabilities of an event processing system may be extended to support indexing schemes, including related data types and operations, which are not natively supported by the event processing system. The extensibility is enabled by one or more plug-in extension components called data cartridges. | 06-30-2011 |
| 20110161356 | EXTENSIBLE LANGUAGE FRAMEWORK USING DATA CARTRIDGES - A framework for extending the capabilities of an event processing system using one or more plug-in components referred to herein as data cartridges. In one set of embodiments, the data cartridge framework described herein can enable an event processing system to support one or more extension languages that are distinct from the native event processing language supported by the system. For example, certain “extension language” data cartridges can be provided that enable an event processing system to support complex data types and associated methods/operations that are common in object-oriented languages, but are not common in event processing languages. In these embodiments, an event processing system can access an extension language data cartridge to compile and execute queries that are written using a combination of the system's native event processing language and the extension language. | 06-30-2011 |
| 20120291049 | TRACKING LARGE NUMBERS OF MOVING OBJECTS IN AN EVENT PROCESSING SYSTEM - Techniques for tracking large numbers of moving objects in an event processing system. In one set of embodiments, an input event stream can be received, where the events in the input event stream represent the movement of a plurality of geometries or objects. The input event stream can then be partitioned among a number of processing nodes of the event processing system, thereby enabling parallel processing of one or more continuous queries for tracking the objects. In a particular embodiment, the partitioning can be performed such that (1) each processing node is configured to track objects in a predefined spatial region, and (2) the spatial regions for at least two nodes overlap. This overlapping window enables a single node to find, e.g., all of the objects within a particular distance of a target object, even if the target object is in the process of moving from the region of that node to the overlapping region of another node. | 11-15-2012 |
| 20130014088 | CONTINUOUS QUERY LANGUAGE (CQL) DEBUGGER IN COMPLEX EVENT PROCESSING (CEP) - A method including receiving, at a computer system, debugging configuration information specifying a functional area of a data stream processing server to be debugged, is described. Furthermore, the method includes identifying, by the computer system, an object associated with the functional area that has been instantiated by the data stream processing server, determining, by the computer system, that tracing for the object is enabled to perform the debugging, and instantiating, by the computer system, a tracelet associated with the object. Further, the method includes stepping, by the computer system, through the tracelet associated with the object to debug the object, and displaying, by the computer system, a visual representation of debugging results associated with the object. | 01-10-2013 |
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| 20110285475 | RF Front-End with Integrated T/R Switch - Disclosed is a transmit/receive circuit arrangement wherein a transceiver circuit including a transmit/receive switch is fabricated on an integrated circuit chip. A matching network is wholly disposed off-chip relative to the integrated circuit chip. In embodiments, at least a portion of the matching network is formed off-chip and a portion of the matching network is formed on-chip. | 11-24-2011 |
| 20120098600 | GAIN CONTROL IN A SHARED RF FRONT-END PATH FOR DIFFERENT STANDARDS THAT USE THE SAME FREQUENCY BAND - Disclosed is a radio frequency (RF) communication circuit having an input for receiving an RF signal and providing independently gain controlled signal paths from the input. In a first signal path, the signal is amplified by a constant gain. In a second signal path, the signal is amplified by a constant gain and by a variable gain amplifier. | 04-26-2012 |
| 20120142298 | RF PEAK DETECTION SCHEME USING BASEBAND CIRCUITS - A receiver includes an antenna configured to receive a set of RF signals, and a low-noise amplifier (LNA) coupled to the antenna and amplify the set of RF signals to generate a set of amplified signals. The receiver further includes a down-conversion mixer configured to down convert the set of amplified signals to baseband frequencies. The receiver further includes a low-pass filter configured to filter from the set of amplified signals to baseband frequencies an out-of-band signal. The receiver further includes a high-pass filter configured to reverse the filtering of the low-pass filter. The receiver further includes a peak detector configured to determine whether the LNA is operating at saturation; and an automatic-gain controller configured to decrease a gain of the LNA based on the determination of the peak detector. | 06-07-2012 |
| 20120182072 | Self-Biasing Radio Frequency Circuitry - The present disclosure describes self-biasing radio frequency circuitry. In some aspects a radio frequency (RF) signal is amplified via a circuit having a first transistor configured to source current to an output of the circuit and a second transistor configured to sink current from the output of the circuit, and another signal is provided, without active circuitry, from the output of the circuit to a gate of the first transistor effective to bias a voltage at the output of the circuit. By so doing, the output of the circuit can be biased without active circuitry which can reduce design complexity of and substrate area consumed by the circuit. | 07-19-2012 |
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| 20100046265 | Separate CAM Core Power Supply For Power Saving - A CAM system includes an integrated circuit chip having: logic & control circuitry, a CAM cell array, read/write access circuitry that performs read and write accesses to the CAM cell array, comparison access circuitry that performs comparison operations to the CAM cell array, a first voltage supply pad coupled to the read/write access circuitry; and a second voltage supply pad coupled to the comparison access circuitry. A first voltage supply, external to the integrated circuit chip, provides a first supply voltage to the first voltage supply pad, wherein the logic & control circuitry is powered by the first supply voltage. A second voltage supply, external to the integrated circuit chip, provides a second supply voltage to the second voltage supply pad, wherein at least a portion of the comparison access circuitry is powered by the second supply voltage, wherein the second supply voltage is less than the first supply voltage. | 02-25-2010 |
| 20100232195 | Content Addressable Memory (CAM) Array Capable Of Implementing Read Or Write Operations During Search Operations - A read operation and a search operation are performed during the same cycle within a CAM system including a CAM array by: (1) forcing a non-matching condition to exist in the row of the CAM array selected for the read operation, (2) comparing the read data value with the search data value outside of the CAM array to determine whether a match exists, and (3) prioritizing the results of the search operation performed within the CAM array and the results of the comparison performed outside of the CAM array to provide a final search result. | 09-16-2010 |
| 20110255322 | Encoding Data for Storage in a Content Addressable Memory - An encoding scheme is disclosed that allows a CAM device to selectively store, within each cell of a row of the CAM device, either a single bit of a binary value or two bits of an encoded data word encoded from the binary value. By storing two bits of the encoded data word in each CAM cell, data may be stored more efficiently and CAM systems may consume less power. The encoded data words can be balanced data words that have equal number of logic high and logic low values. | 10-20-2011 |
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| 20110300716 | METHOD OF IMPROVING FILM NON-UNIFORMITY AND THROUGHPUT - Methods, apparatus, and systems for depositing materials with gaseous precursors are provided. In certain implementations, the methods involve providing a wafer substrate to a chamber of an apparatus. The apparatus includes a showerhead to deliver a gas to the chamber, a volume, and an isolation valve between the volume and the showerhead. A gas is delivered the volume when the isolation valve is closed, pressurizing the volume. The isolation valve is opened to allow the gas to flow to the showerhead when the gas is being delivered to the volume. A material is formed on the wafer substrate using the gas. In some implementations, releasing the pressurized gas from the volume reduces the duration of time to develop a spatially uniform gas flow across the showerhead. | 12-08-2011 |
| 20120070589 | CREATION OF MAGNETIC FIELD (VECTOR POTENTIAL) WELL FOR IMPROVED PLASMA DEPOSITION AND RESPUTTERING UNIFORMITY - A physical vapor deposition (PVD) system includes a chamber and a target arranged in a target region of the chamber. A pedestal has a surface for supporting a substrate and is arranged in a substrate region of the chamber. A transfer region is located between the target region and the substrate region. N coaxial coils are arranged in a first plane parallel to the surface of the pedestal and below the pedestal. M coaxial coils are arranged adjacent to the pedestal. N currents flow in a first direction in the N coaxial coils, respectively, and M currents flow in a second direction in the M coaxial coils that is opposite to the first direction, respectively. | 03-22-2012 |
| 20120083134 | METHOD OF MITIGATING SUBSTRATE DAMAGE DURING DEPOSITION PROCESSES - Systems, methods, and apparatus for depositing a protective layer on a wafer substrate are disclosed. In one aspect, a protective layer is deposited over a surface of a wafer substrate using a process configured to produce substantially less damage in the wafer substrate than a first plasma-assisted deposition process. The protective layer is less than about 100 Angstroms thick. A barrier layer is deposited over the protective layer using the first plasma-assisted deposition process. | 04-05-2012 |
| 20120115325 | ION-INDUCED ATOMIC LAYER DEPOSITION OF TANTALUM - Systems, methods, and apparatus for depositing a tantalum layer on a wafer substrate are disclosed. In one aspect, a tantalum layer may be deposited on a surface of a wafer substrate using an ion-induced atomic layer deposition process with a tantalum precursor. A copper layer may be deposited on the tantalum layer. | 05-10-2012 |
| 20120228125 | CREATION OF MAGNETIC FIELD (VECTOR POTENTIAL) WELL FOR IMPROVED PLASMA DEPOSITION AND RESPUTTERING UNIFORMITY - A physical vapor deposition (PVD) system includes N coaxial coils arranged in a first plane parallel to a substrate-supporting surface of a pedestal in a chamber of a PVD system and below the pedestal. M coaxial coils are arranged adjacent to the pedestal. Plasma is created in the chamber. A magnetic field well is created above a substrate by supplying N currents to the N coaxial coils, respectively, and M currents to the M coaxial coils, respectively. The N currents flow in a first direction in the N coaxial coils and the M second currents flow in a second direction in the M coaxial coils that is opposite to the first direction. A recessed feature on the substrate arranged on the pedestal is filled with a metal-containing material by PVD using at least one operation with high density plasma having a fractional ionization of metal greater than 30%. | 09-13-2012 |
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| 20100120252 | Method of Positioning Patterns from Block Copolymer Self-Assembly - A method of controlling both alignment and registration (lateral position) of lamellae formed from self-assembly of block copolymers, the method comprising the steps of obtaining a substrate having an energetically neutral surface layer comprising a first topographic “phase pinning” pattern and a second topographic “guiding” pattern; obtaining a self-assembling di-block copolymer; coating the self-assembling di-block copolymer on the energetically neutral surface to obtain a coated substrate; and annealing the coated substrate to obtain micro-domains of the di-block copolymer. | 05-13-2010 |
| 20110059299 | Method of Forming Self-Assembled Patterns Using Block Copolymers, and Articles Thereof - A method of forming a block copolymer pattern comprises providing a substrate comprising a topographic pre-pattern comprising a ridge surface separated by a height, h, greater than 0 nanometers from a trench surface; disposing a block copolymer comprising two or more block components on the topographic pre-pattern to form a layer having a thickness of more than 0 nanometers over the ridge surface and the trench surface; and annealing the layer to form a block copolymer pattern having a periodicity of the topographic pre-pattern, the block copolymer pattern comprising microdomains of self-assembled block copolymer disposed on the ridge surface and the trench surface, wherein the microdomains disposed on the ridge surface have a different orientation compared to the microdomains disposed on the trench surface. | 03-10-2011 |
| 20110227059 | GLASSY CARBON NANOSTRUCTURES - Glassy carbon nanostructures are disclosed that can be used as electrode materials in batteries and electrochemical capacitors, or as photoelectrodes in photocatalysis and photoelectrochemistry devices. In some embodiments channels (e.g., substantially cylindrically-shaped pores) are formed in a glassy carbon substrate, whereas in other embodiments, ridges are formed that extend along and over a glassy carbon substrate. In either case, a semiconductor and/or metal oxide may be deposited over the glassy carbon to form a composite material. | 09-22-2011 |
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| 20100274314 | SELECTIVE HIGH FREQUENCY SPINAL CORD MODULATION FOR INHIBITING PAIN WITH REDUCED SIDE EFFECTS, AND ASSOCIATED SYSTEMS AND METHODS - Selective high-frequency spinal chord modulation for inhibiting pain with reduced side affects and associated systems and methods are disclosed. In particular embodiments, high-frequency modulation in the range of from about 1.5 KHz to about 50 KHz may be applied to the patient's spinal chord region to address low back pain without creating unwanted sensory and/or motor side affects. In other embodiments, modulation in accordance with similar parameters can be applied to other spinal or peripheral locations to address other indications. | 10-28-2010 |
| 20100274315 | SELECTIVE HIGH FREQUENCY SPINAL CORD MODULATION FOR INHIBITING PAIN WITH REDUCED SIDE EFFECTS, AND ASSOCIATED SYSTEMS AND METHODS, INCLUDING PRACTITIONER PROCESSES - Selective high-frequency spinal chord modulation for inhibiting pain with reduced side affects and associated systems and methods are disclosed. In particular embodiments, high-frequency modulation in the range of from about 1.5 KHz to about 50 KHz may be applied to the patient's spinal chord region to address low back pain without creating unwanted sensory and/or motor side affects. In other embodiments, modulation in accordance with similar parameters can be applied to other spinal or peripheral locations to address other indications. | 10-28-2010 |
| 20120016437 | SELECTIVE HIGH FREQUENCY SPINAL CORD MODULATION FOR INHIBITING PAIN WITH REDUCED SIDE EFFECTS, AND ASSOCIATED SYSTEMS AND METHODS - Selective high-frequency spinal chord modulation for inhibiting pain with reduced side affects and associated systems and methods are disclosed. In particular embodiments, high-frequency modulation in the range of from about 1.5 KHz to about 50 KHz may be applied to the patient's spinal chord region to address low back pain without creating unwanted sensory and/or motor side affects. In other embodiments, modulation in accordance with similar parameters can be applied to other spinal or peripheral locations to address other indications. | 01-19-2012 |
| 20120016438 | SELECTIVE HIGH FREQUENCY SPINAL CORD MODULATION FOR INHIBITING PAIN WITH REDUCED SIDE EFFECTS, AND ASSOCIATED SYSTEMS AND METHODS - Selective high-frequency spinal chord modulation for inhibiting pain with reduced side affects and associated systems and methods are disclosed. In particular embodiments, high-frequency modulation in the range of from about 1.5 KHz to about 50 KHz may be applied to the patient's spinal chord region to address low back pain without creating unwanted sensory and/or motor side affects. In other embodiments, modulation in accordance with similar parameters can be applied to other spinal or peripheral locations to address other indications. | 01-19-2012 |
| 20120158093 | SELECTIVE HIGH FREQUENCY SPINAL CORD MODULATION FOR INHIBITING PAIN WITH REDUCED SIDE EFFECTS, AND ASSOCIATED SYSTEMS AND METHODS - Selective high-frequency spinal chord modulation for inhibiting pain with reduced side affects and associated systems and methods are disclosed. In particular embodiments, high-frequency modulation in the range of from about 1.5 KHz to about 50 KHz may be applied to the patient's spinal chord region to address low back pain without creating unwanted sensory and/or motor side affects. In other embodiments, modulation in accordance with similar parameters can be applied to other spinal or peripheral locations to address other indications. | 06-21-2012 |
| 20120197369 | SELECTIVE HIGH FREQUENCY SPINAL CORD MODULATION FOR INHIBITING PAIN WITH REDUCED SIDE EFFECTS, AND ASSOCIATED SYSTEMS AND METHODS - Selective high-frequency spinal chord modulation for inhibiting pain with reduced side affects and associated systems and methods are disclosed. In particular embodiments, high-frequency modulation in the range of from about 1.5 KHz to about 50 KHz may be applied to the patient's spinal chord region to address low back pain without creating unwanted sensory and/or motor side affects. In other embodiments, modulation in accordance with similar parameters can be applied to other spinal or peripheral locations to address other indications. | 08-02-2012 |
| 20120203303 | SELECTIVE HIGH FREQUENCY SPINAL CORD MODULATION FOR INHIBITING PAIN WITH REDUCED SIDE EFFECTS, AND ASSOCIATED SYSTEMS AND METHODS - Selective high-frequency spinal chord modulation for inhibiting pain with reduced side affects and associated systems and methods are disclosed. In particular embodiments, high-frequency modulation in the range of from about 1.5 KHz to about 50 KHz may be applied to the patient's spinal chord region to address low back pain without creating unwanted sensory and/or motor side affects. In other embodiments, modulation in accordance with similar parameters can be applied to other spinal or peripheral locations to address other indications. | 08-09-2012 |
| 20120203304 | SELECTIVE HIGH FREQUENCY SPINAL CORD MODULATION FOR INHIBITING PAIN WITH REDUCED SIDE EFFECTS, AND ASSOCIATED SYSTEMS AND METHODS - Selective high-frequency spinal chord modulation for inhibiting pain with reduced side affects and associated systems and methods are disclosed. In particular embodiments, high-frequency modulation in the range of from about 1.5 KHz to about 50 KHz may be applied to the patient's spinal chord region to address low back pain without creating unwanted sensory and/or motor side affects. In other embodiments, modulation in accordance with similar parameters can be applied to other spinal or peripheral locations to address other indications. | 08-09-2012 |
| 20120203319 | SELECTIVE HIGH FREQUENCY SPINAL CORD MODULATION FOR INHIBITING PAIN WITH REDUCED SIDE EFFECTS, AND ASSOCIATED SYSTEMS AND METHODS - Selective high-frequency spinal chord modulation for inhibiting pain with reduced side affects and associated systems and methods are disclosed. In particular embodiments, high-frequency modulation in the range of from about 1.5 KHz to about 50 KHz may be applied to the patient's spinal chord region to address low back pain without creating unwanted sensory and/or motor side affects. In other embodiments, modulation in accordance with similar parameters can be applied to other spinal or peripheral locations to address other indications. | 08-09-2012 |
| 20120209349 | SELECTIVE HIGH FREQUENCY SPINAL CORD MODULATION FOR INHIBITING PAIN WITH REDUCED SIDE EFFECTS, AND ASSOCIATED SYSTEMS AND METHODS - Selective high-frequency spinal chord modulation for inhibiting pain with reduced side affects and associated systems and methods are disclosed. In particular embodiments, high-frequency modulation in the range of from about 1.5 KHz to about 50 KHz may be applied to the patient's spinal chord region to address low back pain without creating unwanted sensory and/or motor side affects. In other embodiments, modulation in accordance with similar parameters can be applied to other spinal or peripheral locations to address other indications. | 08-16-2012 |
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| 20090001591 | REDUCING RESISTIVITY IN METAL INTERCONNECTS BY COMPRESSIVE STRAINING - Techniques for reducing resistivity in metal interconnects by compressive straining are generally described. In one example, an apparatus includes a dielectric substrate, a thin film of metal coupled with the dielectric substrate, and an interconnect metal coupled to the thin film of metal, the thin film of metal having a lattice parameter that is smaller than the lattice parameter of the interconnect metal to compressively strain the interconnect metal. | 01-01-2009 |
| 20090004463 | REDUCING RESISTIVITY IN METAL INTERCONNECTS USING INTERFACE CONTROL - Techniques for reducing resistivity in metal interconnects using interface control are generally described. In one example, an apparatus includes a dielectric substrate, a barrier film coupled with the dielectric substrate, a liner film of a selected material coupled with the barrier film, and a metal coupled with the liner film defining an interface region between the metal and the liner film, the material of the liner film being selected to provide an interface density of state about equal to or less than ten times the density of state of the metal in bulk form. | 01-01-2009 |
| 20120161321 | SEMICONDUCTOR DEVICE CONTACTS - Techniques are disclosed for forming contacts in silicon semiconductor devices. In some embodiments, a transition layer forms a non-reactive interface with the silicon semiconductor contact surface. In some such cases, a conductive material provides the contacts and the material forming a non-reactive interface with the silicon surface. In other cases, a thin semiconducting or insulting layer provides the non-reactive interface with the silicon surface and is coupled to conductive material of the contacts. The techniques can be embodied, for instance, in planar or non-planar (e.g., double-gate and tri-gate FinFETs) transistor devices. | 06-28-2012 |
| Patent application number | Description | Published |
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| 20100030717 | FRAMEWORK TO EVALUATE CONTENT DISPLAY POLICIES - Content display policies are evaluated using two kinds of methods. In the first kind of method, using information, collected in a “controlled” manner about user characteristics and content characteristics, truth models are generated. A simulator replays users' visits to the portal web page and simulates their interactions with content items on the page based on the truth models. Various metrics are used to compare different content item-selecting algorithms. In the second kind of method, no explicit truth models are built. Events from the controlled serving scheme are replayed in part or whole; content item-selection algorithms learn using the observed user activities. Metrics that measure the overall predictive error are used to compare different content-item selection algorithms. The data collected in a controlled fashion plays a key role in both the methods. | 02-04-2010 |
| 20100125585 | Conjoint Analysis with Bilinear Regression Models for Segmented Predictive Content Ranking - Information with respect to users, items, and interactions between the users and items is collected. Each user is associated with a set of user features. Each item is associated with a set of item features. An expected score function is defined for each user-item pair, which represents an expected score a user assigns an item. An objective represents the difference between the expected score and the actual score a user assigns an item. The expected score function and the objective function share at least one common variable. The objective function is minimized to find best fit for some of the at least one common variable. Subsequently, the expected score function is used to calculate expected scores for individual users or clusters of users with respect to a set of items that have not received actual scores from the users. The set of items are ranked based on their expected scores. | 05-20-2010 |
| 20100211568 | PERSONALIZED RECOMMENDATIONS ON DYNAMIC CONTENT - This disclosure describes systems and methods for selecting and/or ranking web-based content predicted to have the greatest interest to individual users. In particular, articles are ranked in terms of predicted interest for different users. This is done by optimizing an interest model and in particular through a method of bilinear regression and Bayesian optimization. The interest model is populated with data regarding users, the articles, and historical interest trends that types of users have expressed towards types of articles. | 08-19-2010 |
| 20100250556 | Determining User Preference of Items Based on User Ratings and User Features - A set of item-item affinities for a plurality of items is determined based on collaborative-filtering techniques. A set of an item's nearest neighbor items based on the set of item-item affinities is determined. A set of user feature-item affinities for the plurality of items and a set of user features is determined based on least squared regression. A set of a user feature's nearest neighbor items is determined based in part on the set of user feature-item affinities. Compatible affinity weights for nearest neighbor items of each item and each user feature are determined and stored. Based on user features of a particular user and items a particular user has consumed, a set of nearest neighbor items comprising nearest neighbor items for user features of the user and items the user has consumed are identified as a set of candidate items, and affinity scores of candidate items are determined. Based at least in part on the affinity scores, a candidate item from the set of candidate items is recommended to the user. | 09-30-2010 |
| 20110107260 | PREDICTING ITEM-ITEM AFFINITIES BASED ON ITEM FEATURES BY REGRESSION - Two items are determined to be similar to each not only based on previous actual user behavior, but also based on the observed relatedness of the characteristics of those two items. A first characteristic and a second characteristic are determined to have some affinity for each other if a high proportion of users who select items having the first characteristics also select items that have the second characteristic, and vice-versa. Two items having characteristics with high affinity for each other are determined to have some similarity to each other, even if very few or no users who selected one of those items ever selected the other of those items. A first item that is determined to be sufficiently similar to second item in this manner may be recommended to a user who has selected the second item as potentially also being of interest to that user. | 05-05-2011 |
| 20110112981 | Feature-Based Method and System for Cold-Start Recommendation of Online Ads - A method and a system are provided for recommending an ad (e.g., item) for a user. In one example, the system constructs one or more user profiles. Each user profile is represented by a user feature set including user attributes. The system constructs one or more item profiles. Each item profile is represented by an item feature set including item attributes. The system receives historical item ratings given by one or more users. The system then generates one or more preference scores by modeling at least one relationship among the user profiles, the item profiles and the historical item ratings. | 05-12-2011 |
