Parat
Guy-Michel Parat, Claix FR
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20110266594 | METHOD FOR OBTAINING A LAYER OF ALN HAVING SUBSTANTIALLY VERTICAL SIDES - A method is disclosed, for producing a layer of AlN having substantially vertical sides relative to the surface of a substrate, comprising: | 11-03-2011 |
20110280276 | TIME-RELATED TEMPERATURE VARIATION TRANSDUCER, ELECTRONIC CHIP INCORPORATING THIS TRANSDUCER AND METHOD OF FABRICATION OF THIS CHIP - A transducer for transducing time-related temperature variations into a difference in potentials includes an upper conductive electrode designed to be exposed to a time-related temperature variation to be measured, a lower conductive electrode, and at least one layer of pyroelectric material based on a III-V nitride directly interposed between the upper and lower conductive electrodes to generate, between the upper and lower conductive electrodes, a difference in potentials corresponding to the temperature variation even in the absence of external mechanical stress. | 11-17-2011 |
20110286491 | METHOD FOR CALIBRATING AN ELECTRONIC CHIP, ELECTRONIC CHIP AND HEAT PATTERN DETECTOR FOR THIS METHOD - This method for calibrating an electronic chip comprises: | 11-24-2011 |
20130296658 | COMPONENT WITH ENCAPSULATED ACTIVE ELEMENT AND IMPLANTABLE MEDICAL ADVICE INCORPORATING SUCH A COMPONENT - A component including at least one active element hermetically encapsulated in a cavity formed between a support and a cover, in which the support and the cover are made from an electrically conductive material, and are insulated electrically from one another, and include a first electrical connection between the active element and the support, and a second electrical connection, separate from the first connection, between the active element and the cover, and in which: | 11-07-2013 |
20150108606 | ELECTRONIC CHIP WITH MEANS OF PROTECTING ITS BACK FACE - Electronic chip comprising: | 04-23-2015 |
Joseph S. Parat, Chicago, IL US
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20130002382 | MAGNETIC CUP ASSEMBLY HOLDING DEVICE WITH LOW MAGNETIC LEAKAGE FIELD - A magnetic cup assembly includes at least one of a plurality of magnets and a single magnet having multiple magnetic poles disposed inside a ferromagnetic material cup. The cup has a closed bottom and a open top. The poles of the magnet or magnets are arranged such that there is substantial magnetic neutrality above the open top. | 01-03-2013 |
Krisha K. Parat, Palo Alto, CA US
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20130215680 | AUTOMATIC SELECTIVE SLOW PROGRAM CONVERGENCE - Apparatus, methods, and systems are disclosed, including those to improve program voltage distribution width using automatic selective slow program convergence (ASSPC). One such method may include determining whether a threshold voltage (Vt) associated with a memory cell has reached a particular pre-program verify voltage. In response to the determination, a voltage applied to a bit-line coupled to the memory cell may be automatically incremented at least twice as the program voltage is increased, until the cell is properly programmed. Additional embodiments are also described. | 08-22-2013 |
Krishna K. Parat US
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20150279476 | RAMPING INHIBIT VOLTAGE DURING MEMORY PROGRAMMING - The inhibit voltage is a voltage applied to wordlines adjacent to a program wordline having a memory cell to write during the program operation. The inhibit voltage for a program operation can be ramped up during the program pulse. Instead of applying a constant high inhibit voltage that results in the initial boosted channel potential reducing drastically due to leakage, a system can start the inhibit voltage lower and ramp the inhibit voltage up during the program pulse. The ramping up can be a continuous ramp or in finite discrete steps during the program pulse. Such ramping of inhibit voltage can provide better tradeoff between program disturb and inhibit disturb. | 10-01-2015 |
Kristina K. Parat, Palo Alto, CA US
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20140203409 | Integrated Circuit Structures, Semiconductor Structures, And Semiconductor Die - Methods for fabricating integrated circuit devices on an acceptor substrate devoid of circuitry are disclosed. Integrated circuit devices are formed by sequentially disposing one or more levels of semiconductor material on an acceptor substrate, and fabricating circuitry on each level of semiconductor material before disposition of a next-higher level. After encapsulation of the circuitry, the acceptor substrate is removed and semiconductor dice are singulated. Integrated circuit devices formed by the methods are also disclosed. | 07-24-2014 |
Marie Parat, Montreal CA
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20120164142 | COMPOSITIONS COMPRISING NATRIURETIC PEPTIDES AND METHODS OF USE THEREOF - The present invention provides methods, compositions, and kits for the treatment of disorders associated with overactivation of FGFR3, such as achondroplasia; bone or cartilage disorders; or vascular smooth muscle disorders, or for the elongation of bone. In some embodiments, the present invention provides polypeptides having a natriuretic peptide fused to an Fc domain of an immunoglobulin. Such polypeptides can be administered to subjects, e.g., subcutaneously, to treat a disorder associated with overactivation of FGFR3, a bone or cartilage disorder, or a vascular smooth muscle disorder, or to elongate bone. The invention also features nucleic acid molecules encoding such polypeptides and the use of the nucleic acid molecules for treating disorders associated with overactivation of FGFR3, bone or cartilage disorders, or vascular smooth muscle disorders, or for elongating bone. | 06-28-2012 |
Quy-Michel Parat, Claix FR
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20130293428 | MICROELECTRONIC WIRELESS TRANSMISSION DEVICE - A microelectronic wireless transmission device including: | 11-07-2013 |