Patent application number | Description | Published |
20110051508 | MULTILEVEL PROGRAMMING OF PHASE CHANGE MEMORY - A method and device for performing a program operation of a phase change memory (PCM) cell. The method includes the steps of applying one or more programming pulses according to a predefined programming scheme to achieve a target resistance level of the PCM cell, wherein the programming scheme is operable to perform in a first programming mode one or more annealing steps to approach the target resistance, wherein the programming scheme is operable to perform in a second programming mode one or more melting steps, wherein the programming scheme is operable to start in the first programming mode and to switch to the second programming mode if the target resistance level of the PCM cell has been undershot in the first programming mode. | 03-03-2011 |
20110069539 | PROGRAMMING MULTI-LEVEL PHASE CHANGE MEMORY CELLS - A method and a feedback controller for programming at least one multi-level phase-change memory cell with a programming signal. The method and feedback controller include a sequence of write pulses applied to the multi-level phase change memory cell, wherein the feedback controller adjusts in real time at least one parameter of each write pulse as a function of a determined resistance error of the phase-change memory cell with respect to a desired reference resistance level. | 03-24-2011 |
20120230081 | CELL-STATE MEASUREMENT IN RESISTIVE MEMORY - Apparatus and method for measuring the state of a resistive memory cell. A bias voltage controller applies a bias voltage to the cell and controls the level of the bias voltage. A feedback signal generator senses cell current due to the bias voltage and generates a feedback signal (S | 09-13-2012 |
20120230097 | DETERMINING CELL-STATE IN PHASE-CHANGE MEMORY - A method, an apparatus, and a device for determining the state of a phase-change memory cell. The method includes the steps of: biasing a cell with a time-varying read voltage (V | 09-13-2012 |
20120230098 | PROGRAMMING OF PHASE-CHANGE MEMORY CELLS - A method and apparatus for programming a phase-change memory cell. A bias voltage signal (V | 09-13-2012 |
20120254693 | ENCODING A DATA WORD FOR WRITING THE ENCODED DATA WORD IN A MULTI-LEVEL SOLID STATE MEMORY - A method for encoding a data word for writing an encoded data word in N cells of a solid state memory. Each of the N cells can be programmed in one of q nominal levels. The method includes encoding the data word as a codeword of a first codeword type having q symbol values or as a codeword of a second codeword type having (q-d) symbol values, d ε [1, . . . , q−1], depending on a state of the N cells. | 10-04-2012 |
20120307554 | DETERMINING CELL-STATE IN PHASE-CHANGE MEMORY - A method, an apparatus, and a device for determining the state of a phase-change memory cell. The method includes the steps of: biasing a cell with a time-varying read voltage (V | 12-06-2012 |
20120314481 | CELL-STATE MEASUREMENT IN RESISTIVE MEMORY - Apparatus and method for measuring the state of a resistive memory cell. A bias voltage controller applies a bias voltage to the cell and controls the level of the bias voltage. A feedback signal generator senses cell current due to the bias voltage and generates a feedback signal (S | 12-13-2012 |
20120324313 | ENCODING A DATA WORD FOR WRITING THE ENCODED DATA WORD IN A MULTI-LEVEL SOLID STATE MEMORY - A method for encoding a data word for writing an encoded data word in N cells of a solid state memory. Each of the N cells can be programmed in one of q nominal levels. The method includes encoding the data word as a codeword of a first codeword type having q symbol values or as a codeword of a second codeword type having (q-d) symbol values, d ε [1, . . . , q-1], depending on a state of the N cells. | 12-20-2012 |
20120327709 | PROGRAMMING OF PHASE-CHANGE MEMORY CELLS - A method and apparatus for programming a phase-change memory cell. A bias voltage signal (V | 12-27-2012 |
20130077394 | MULTILEVEL PROGRAMMING OF PHASE CHANGE MEMORY - A method and device for performing a program operation of a phase change memory (PCM) cell. The method includes the steps of applying one or more programming pulses according to a predefined programming scheme to achieve a target resistance level of the PCM cell, wherein the programming scheme is operable to perform in a first programming mode one or more annealing steps to approach the target resistance, wherein the programming scheme is operable to perform in a second programming mode one or more melting steps, wherein the programming scheme is operable to start in the first programming mode and to switch to the second programming mode if the target resistance level of the PCM cell has been undershot in the first programming mode. | 03-28-2013 |
20130083594 | MULTILEVEL PROGRAMMING OF PHASE CHANGE MEMORY - A method and device for performing a program operation of a phase change memory (PCM) cell. The method includes the steps of applying one or more programming pulses according to a predefined programming scheme to achieve a target resistance level of the PCM cell, wherein the programming scheme is operable to perform in a first programming mode one or more annealing steps to approach the target resistance, wherein the programming scheme is operable to perform in a second programming mode one or more melting steps, wherein the programming scheme is operable to start in the first programming mode and to switch to the second programming mode if the target resistance level of the PCM cell has been undershot in the first programming mode. | 04-04-2013 |
Patent application number | Description | Published |
20110242884 | Programming at Least One Multi-Level Phase Change Memory Cell - A method of applying at least one programming pulse to the a PCM cell for programming the PCM cell to have a respective definite cell state, the definite cell state being defined by a definite resistance level using an annealing pulse or a melting pulse. The respective definite cell state represents two information entities, a step of applying a first reading pulse to the respective programmed PCM cell to provide a first resistance value, a step of applying at least a second reading pulse to the respective programmed PCM cell to provide a second resistance value, the first reading pulse and the second reading pulse being different pulses; and a step of determining the respective definite cell state of the respective programmed PCM cell dependent on the respective provided first resistance value and the respective provided second resistance value. | 10-06-2011 |
20110296274 | DATA ENCODING IN SOLID-STATE STORAGE DEVICES - Methods and apparatus are provided for recording input data in q-level cells of solid-state memory (2), where q>2. Input data words are encoded as respective codewords, each having a plurality of symbols. The coding scheme is such that each symbol can take one of q values corresponding to respective predetermined levels of the q-level cells, and each of the possible input data words is encoded as a codeword with a unique sequence of relative symbol values. The symbols of each codeword are then recorded in respective cells of the solid-state memory by setting each cell to the level corresponding to the recorded symbol value. Input data is thus effectively encoded in the relative positions of cell levels, providing resistance to certain effects of drift noise. | 12-01-2011 |
20130086457 | DETECTING CODEWORDS IN SOLID-STATE STORAGE DEVICES - A method for detecting codewords in solid-state storage devices. The method includes the steps of: obtaining respective read signals by reading memory cells that stores a group of codewords, where each of the read signals includes N signal components corresponding to respective symbols of the codeword; producing an ordered read signal by ordering the components of each of the read signals according to a signal level; producing an average read signal by averaging corresponding components of the ordered read signals; determining a reference signal level that corresponds to each of q levels of the memory cells in relation to the average read signal with predefined probabilities of each symbol value occurring at each symbol position in the codeword, where the symbols of the codeword are ordered according to the symbol value; and detecting the codeword corresponding to each of the read signal in relation to the reference signal levels. | 04-04-2013 |
20130107619 | CONDITIONING PHASE CHANGE MEMORY CELLS | 05-02-2013 |
20140068148 | LEVEL PLACEMENT IN SOLID-STATE MEMORY - Methods and apparatus are provided for determining level placement in q-level cells of solid-state memory, where q>2. Groups of the cells are programmed to respective levels of a predetermined plurality of programming levels, and each cell is then read at a series of time instants to obtain a sequence of read metric values for that cell. The sequences of read metric values for the group of cells programmed to each programming level are processed to derive statistical data as a function of time for that level. The statistical data for each programming level is processed to determine for that level at least one parameter of a model defining variation with time of the statistical data for programming levels. The parameters for the levels are extrapolated to define parameter variation as a function of level. A set of q programming levels which has a desired property over time is then calculated from said parameter variation and said model. | 03-06-2014 |
20140211540 | METHOD AND APPARATUS FOR READ MEASUREMENT OF A PLURALITY OF RESISTIVE MEMORY CELLS - A method for read measurement of a plurality N of resistive memory cells having a plurality K of programmable levels. The method includes a step of applying a first read voltage to each of the plurality N of resistive memory cells and, at each of the plurality N of resistive memory cells, measuring a first read current due to the applied first read voltage, determining a respective second read voltage based on the first read current measured at the plurality N of resistive memory cells and a target read current determined for the plurality N of resistive memory cells for each of the plurality N of resistive memory cells, and applying the respective determined second read voltage to the plurality N of resistive memory cells for obtaining a second read current for each of the plurality N of resistive memory cells. | 07-31-2014 |
20140211541 | READ MEASUREMENT OF A PLURALITY OF RESISTIVE MEMORY CELLS - A method for read measurement of a plurality N of resistive memory cells having a plurality M of programmable levels is suggested. The method includes a step of reading back from a number of reference cells to obtain a reading back parameter, a step of determining an actual read voltage for the N memory cells based on the obtained reading back parameter for obtaining a target read current at a following read measurement, and, a step of applying the determined actual read voltage to the N memory cells at the following read measurement. | 07-31-2014 |
20140211564 | LEVEL-ESTIMATION IN MULTI-LEVEL CELL MEMORY - The memory cells storing a group of codewords are read to obtain respective read signals each comprising N signal components corresponding to respective symbols of a codeword. The components of each read signal are ordered according to signal level to produce an ordered read signal. Correspondingly-positioned components of the ordered read signals are then ordered according to signal level to produce ordered component sets for respective component positions in a said ordered read signal. Each ordered component set is partitioned into subsets corresponding to respective memory cell levels, wherein the subsets of the ordered component sets contain respective numbers of components dependent on predefined probabilities of occurrence of different symbol values at different positions in a said codeword whose symbols are ordered according to symbol value. The reference signal level is determined in dependence on the signal components in the subsets corresponding to that memory cell level. | 07-31-2014 |
20140325124 | MEMORY SYSTEM AND METHOD FOR OPERATING A MEMORY SYSTEM - A memory system for storing data in a plurality N of memory chips. The memory system includes a number K of sets of memory chips, wherein each set of the K sets includes a number M of the memory chips, with N=K·M; and one signal processing unit having a number L of signal processing engines for signal processing data of the N memory chips and having a data link interface for interfacing each of the K sets. | 10-30-2014 |
20140325296 | READ-DETECTION IN MULTI-LEVEL CELL MEMORY - A method and apparatus for detecting N-symbol codewords. The method including: reading q-level memory cells to obtain a read signal having N signal components; detecting the memory cell level corresponding to each component using a first correspondence criterion dependent on reference signal levels; identifying unreliable components; detecting, for each unreliable component, the next-most-closely corresponding memory cell level according to the first correspondence criterion; defining a set of ordered codeword vectors having N symbols corresponding to respective components of the read signal ordered according to a signal level, wherein the symbol values in each ordered codeword vector correspond to one combination of detected memory cell levels; defining, for each read signal, candidate initial vectors having intersected the ordered codeword vectors and plurality of initial vectors; and detecting, if the candidate initial vectors contains a vector, the codeword corresponding to that read signal that depends on the candidate initial vectors. | 10-30-2014 |
20150085591 | ESTIMATION OF LEVEL-THRESHOLDS FOR MEMORY CELLS - Methods and apparatus are provided for determining level-thresholds for q-level memory cells. A plurality of the memory cells are read to obtain respective read signal components. The read signal components are processed in dependence on signal level to produce a signal level vector, comprising a series of elements, indicative of the distribution of read signal components in order of signal level. The signal level vector is scanned with a sliding window of length greater than the spacing of successive window positions in the scan. At each window position, a metric Mi is calculated in dependence on the elements of the signal level vector in the window. A level-threshold for successive memory cell levels is then determined in dependence on variation of the metric over the scan. | 03-26-2015 |
Patent application number | Description | Published |
20130021845 | PROGRAMMING AT LEAST ONE MULTI-LEVEL PHASE CHANGE MEMORY CELL - A method is provided that comprises a step of programming the PCM cell to have a respective definite cell state by at least one current pulse flowing to the PCM cell, said respective definite cell state being defined at least by a respective definite resistance level, a step of controlling said respective current pulse by a respective bitline pulse and a respective wordline pulse, and a step of controlling said respective bitline pulse and said respective wordline pulse dependent on an actual resistance value of the PCM cell and a respective reference resistance value being defined for the definite resistance level. | 01-24-2013 |
20130044540 | PROGRAMMING AT LEAST ONE MULTI-LEVEL PHASE CHANGE MEMORY CELL - An apparatus for programming at least one multi-level Phase Change Memory (PCM) cell having a first terminal and a second terminal A programmable control device controls the PCM cell to have a respective cell state by applying at least one current pulse to the PCM cell, the control device controlling the at least one current pulse by applying a respective first pulse to the first terminal and a respective second pulse applied to the second terminal of the PCM cell. The respective cell state is defined by a respective resistance level. The control device receives a reference resistance value defining a target resistance level for the cell, and further receives an actual resistance value of said PCM cell such that the applying the respective first pulse and said respective second pulse is based on said actual resistance value of the PCM cell and said received reference resistance value. | 02-21-2013 |
20130135924 | PROGRAMMING OF PHASE-CHANGE MEMORY CELLS - Methods and apparatus are provided for programming a phase-change memory cell having s>2 programmable cell states. At least one control signal is applied to produce a programming pulse for programming the cell. At least one control signal is varied during the programming pulse to shape the programming pulse in dependence on the cell state to be programmed and produce a selected one of a plurality of programming pulse waveforms corresponding to respective programming trajectories for programming the cell states. The selected programming pulse waveform corresponds to a programming trajectory containing the cell state to be programmed. | 05-30-2013 |
20130166994 | READ/WRITE OPERATIONS IN SOLID-STATE STORAGE DEVICES - Methods and apparatus are provided for reading and writing data in q-level cells of solid-state memory, where q>2. Input data is encoded into codewords having N q | 06-27-2013 |
20130227380 | READ-DETECTION IN SOLID-STATE STORAGE DEVICES - A method for detecting codewords of a length-N, q | 08-29-2013 |
20130322156 | READ MEASUREMENT OF RESISTIVE MEMORY CELLS - A method for read measurement of resistive memory cells having s≧2 programmable cell-states includes applying to each cell at least one initial voltage and making a measurement indicative of cell current due to the initial voltage; determining a read voltage for the cell in dependence on the measurement; applying the read voltage to the cell; making a read measurement indicative of cell current due to the read voltage; and outputting a cell-state metric dependent on the read measurement; wherein the read voltages for cells are determined in such a manner that the cell-state metric exhibits a desired property. | 12-05-2013 |
20130322157 | READ MEASUREMENT OF RESISTIVE MEMORY CELLS - A method for read measurement of resistive memory cells having s≧2 programmable cell-states includes applying to each cell at least one initial voltage and making a measurement indicative of cell current due to the initial voltage; determining a read voltage for the cell in dependence on the measurement; applying the read voltage to the cell; making a read measurement indicative of cell current due to the read voltage; and outputting a cell-state metric dependent on the read measurement; wherein the read voltages for cells are determined in such a manner that the cell-state metric exhibits a desired property. | 12-05-2013 |