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Papa Rao

Satyavolu S. Papa Rao, Garland, TX US

Patent application numberDescriptionPublished
20090002115METHOD TO IMPROVE INDUCTANCE WITH A HIGH-PERMEABILITY SLOTTED PLATE CORE IN AN INTEGRATED CIRCUIT - An inductor structure (01-01-2009
20090017588SYSTEMS AND METHODS THAT SELECTIVELY MODIFY LINER INDUCED STRESS - The present invention facilitates semiconductor fabrication by providing methods of fabrication that selectively apply strain to multiple regions of a semiconductor device. A semiconductor device having one or more regions is provided (01-15-2009
20100117195CAPACITOR INTEGRATION AT TOP-METAL LEVEL WITH A PROTECTIVE CLADDING FOR COPPER SURFACE PROTECTION - An on-chip decoupling capacitor (05-13-2010

Patent applications by Satyavolu S. Papa Rao, Garland, TX US

Satyavolu S. Papa Rao, Poughkeepsie, NY US

Patent application numberDescriptionPublished
20110303274SOLAR CELLS WITH PLATED BACK SIDE SURFACE FIELD AND BACK SIDE ELECTRICAL CONTACT AND METHOD OF FABRICATING SAME - The present disclosure provides a method of forming a back side surface field of a solar cell without utilizing screen printing. The method includes first forming a p-type dopant layer directly on the back side surface of the semiconductor substrate that includes a p/n junction utilizing an electrodeposition method. The p/n junction is defined as the interface that is formed between an n-type semiconductor portion of the substrate and an underlying p-type semiconductor portion of the substrate. The plated structure is then annealed to from a P++ back side surface field layer directly on the back side surface of the semiconductor substrate. Optionally, a metallic film can be electrodeposited on an exposed surface of the P++ back side surface layer.12-15-2011

Satyavolu Srinivas Papa Rao, Garland, TX US

Patent application numberDescriptionPublished
20080290515PROPERTIES OF METALLIC COPPER DIFFUSION BARRIERS THROUGH SILICON SURFACE TREATMENTS - In accordance with the invention, there are diffusion barriers, integrated circuits, and semiconductor devices and methods of fabricating them. The method of fabricating a diffusion barrier can include providing a dielectric layer, forming a first silicon enriched layer over the dielectric layer by exposing the dielectric layer to a silicon-containing ambient, and forming a barrier layer over the first silicon enriched layer.11-27-2008
20090001510AIR GAP IN INTEGRATED CIRCUIT INDUCTOR FABRICATION - In accordance with the invention, there are inductors with an air gap, semiconductor devices, integrated circuits, and methods of fabricating them. The method of making an inductor with an air gap can include fabricating a first level of inductor in an intra-metal dielectric layer including one or more inductor loops, one or more vias, and one or more copper bulkhead structures, forming an inter-level dielectric layer over the first level and repeating the steps to form two or more levels of inductor. The method can also include forming an extraction via, forming an air gap between the inductor loops by removing portions of the intra-metal dielectric layer coupled to the extraction via using super critical fluid process, and forming a non-conformal layer to seal the extraction via.01-01-2009
20090085197Method of Fabrication of On-Chip Heat Pipes and Ancillary Heat Transfer Components - The density of components in integrated circuits (ICs) is increasing with time. The density of heat generated by the components is similarly increasing. Maintaining the temperature of the components at reliable operating levels requires increased thermal transfer rates from the components to the IC package exterior. Dielectric materials used in interconnect regions have lower thermal conductivity than silicon dioxide. This invention comprises a heat pipe located in the interconnect region of an IC to transfer heat generated by components in the IC substrate to metal plugs located on the top surface of the IC, where the heat is easily conducted to the exterior of the IC package. Refinements such as a wicking liner or reticulated inner surface will increase the thermal transfer efficiency of the heat pipe. Strengthening elements in the interior of the heat pipe will provide robustness to mechanical stress during IC manufacture.04-02-2009
20090261453AIR GAP IN INTEGRATED CIRCUIT INDUCTOR FABRICATION - A semiconductor device, such as an inductor, is formed with an air gap. A first level has an intra-metal dielectric layer including one or more inductor loops, one or more vias, and one or more copper bulkhead structures. An inter-level dielectric layer is formed over the first level. An extraction via is formed through the intra-metal dielectric layer and inter-level dielectric layer. An air gap is formed between inductor loops by removing portions of the intra-metal dielectric layer coupled to the extraction via using a supercritical fluid process, and forming a non-conformal layer to seal the extraction via. The air gap may be filled with an inert gas, like argon or nitrogen.10-22-2009

Patent applications by Satyavolu Srinivas Papa Rao, Garland, TX US

Satyavolu Srinivas Papa Rao, Poughkeepsi, NY US

Patent application numberDescriptionPublished
20090166865MANUFACTURABLE RELIABLE DIFFUSION-BARRIER - Devices and methods are presented to fabricate diffusion barrier layers on a substrate. Presently, barrier layers comprising a nitride layer and a pure metal layer are formed using a physical vapor deposition (PVD) process that requires multiple ignition steps, and results in nitride-layer thicknesses of no less than 2 nm. This invention discloses devices and process to produce nitride-layers of less than <1 nm, while allowing for formation of a pure metal layer on the nitride-layer without re-igniting the plasma. To achieve this, the flow of nitrogen gas is cut off either before the plasma is ignited, or before the formation of a continuous-flow plasma. This ensures that a limited number of nitrogen atoms is deposited in conjunction with metal atoms on the substrate, thereby allowing for controlled thickness of the nitride layer.07-02-2009