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Panteleev, Moscow

Igor Vladimirovich Panteleev, Moscow RU

Patent application numberDescriptionPublished
20080228113Breath Training Device - The inventive breath training device comprises a respiratory tube, a low-frequency mechanical air oscillation generator provided with an oscillation chamber embodied therein and provided with an input channel which is embodied in the form of an upwardly extending saddle-shaped body of revolution, contains a spherical ball and is connected to the respiratory tube and to an output channel communicating with ambient air, wherein the respiratory tube is provided with a jacket in which the body of the low-frequency mechanical air oscillation generator rotatable about a horizontal axis is fixed and a bypass chamber provided with an inspiratory tube is formed, said inspiratory tube comprises an inspiratory valve provided with a tubular attachment and the output channel of the oscillation chamber of the low-frequency mechanical air oscillation generator is also provided with an expiratory valve.09-18-2008

Pavel Panteleev, Moscow RU

Patent application numberDescriptionPublished
20100031126System and method for using the universal multipole for the implementation of a configurable binary bose-chaudhuri-hocquenghem (BCH) encoder with variable number of errors - The present invention is a configurable binary BCH encoder having a variable number of errors. The encoder may implement a universal multipole block which may be configured for receiving an error number input, which may include a maximum error number limit for the encoder, and for calculating a plurality of error coefficients based on the error number input. The encoder may be further configured for receiving a plurality of information bits of an information word. The encoder may be further configured for transmitting/outputting a first (ex.—unmodified) subset of the information bits as an encoder output. The encoder may be further configured for calculating a plurality of parity bits based on a second subset of the information bits and the error coefficients. The encoder may be further configured for transmitting/outputting the calculated parity bits as part of the encoder output.02-04-2010
20100070831VARIABLE REDUNDANCY REED-SOLOMON ENCODER - A fixed length Reed-Solomon encoder is configured to produce a first fixed number of redundant symbols. The fixed length Reed-Solomon encoder is configured with an encoding polynomial that is fixed. A symbol preprocessor maps each input data symbol to a transformed input data symbol. A symbol postprocessor maps a second fixed number of redundant symbols output from the fixed length Reed-Solomon encoder to a set of redundant symbols. The second fixed number of redundant symbols is less than the first fixed number of redundant symbols.03-18-2010
20100070832REED-SOLOMON DECODER WITH A VARIABLE NUMBER OF CORRECTABLE ERRORS - A syndrome calculator receives an input codeword and calculates a first set of syndromes. A syndrome transform receives the first set of syndromes having and determines a second set of syndromes. The second set of syndromes is based on the first set of syndromes. The second set of syndromes has number of syndromes that is less than the number of syndromes in the first set of syndromes. A key equation solver receives the second set of syndromes and produces an indication of zero or more error locations and an indication of zero or more error values.03-18-2010

Pavel A. Panteleev, Moscow RU

Patent application numberDescriptionPublished
20090158118CONFIGURABLE REED-SOLOMON DECODER BASED ON MODIFIED FORNEY SYNDROMES - A method of configurable decoding is disclosed. The method generally includes the steps of (A) receiving a variable value in a configuration signal, (B) calculating a plurality of first syndromes corresponding to a particular codeword of a plurality of codewords received in an input signal, the particular codeword having a plurality of information symbols and a plurality of parity symbols coded such that up to a fixed value of a plurality of errors in the particular codeword are correctable, the fixed value being greater than the variable value, (C) transforming the first syndromes into a plurality of second syndromes such that no greater than the variable value of the errors in the particular codeword are correctable and (D) generating an intermediate signal carrying the second syndromes.06-18-2009
20100031127SCHEME FOR ERASURE LOCATOR POLYNOMIAL CALCULATION IN ERROR-AND-ERASURE DECODER - A method to generate an erasure locator polynomial in an error-and-erasure decode. The method generally includes the steps of (A) storing current values in multiple registers at a current moment, (B) generating first values by multiplying each current value by a respective one of multiple constants, (C) generating second values by gating at least all but one of the first values with a current one of multiple erasure values of an erasure position vector, (D) generating next values by combining each one of the second values with a corresponding one of the first values, (E) loading the next values into the registers in place of the current values at a next moment and (F) generating an output signal carrying the current values at a last moment such that the current values form the coefficients of the erasure locator polynomial.02-04-2010
20100153478PARALLEL TRUE RANDOM NUMBER GENERATOR ARCHITECTURE - A system having an entropy module, a memory module and a main module is disclosed. The entropy module may be configured to generate a plurality of first random numbers. The memory module may be configured to buffer (i) the first random numbers and (ii) a plurality of second random numbers. The main module is generally configured to (i) control a first transfer of the first random numbers from the entropy module to the memory module, (ii) control a second transfer of the first random numbers from the memory module to the main module, (iii) generate the second random numbers by encrypting the first random numbers and (iv) control a third transfer of the second random numbers from the main module to the memory module. The generation of the first random numbers and the generation of the second random numbers may be performed in parallel.06-17-2010
20100281344SOFT REED-SOLOMON DECODER BASED ON ERROR-AND-ERASURE REED-SOLOMON DECODER - An apparatus having a first circuit and a second circuit is disclosed. The first circuit may (i) generate a decoded codeword by decoding a first codeword a plurality of times based on a respective plurality of erasure location vectors and (ii) assert a fail signal upon each failure of the decoding of the first codeword, the decoding comprising an error-and-erasure Reed-Solomon decoding. The second circuit may (i) generate a count of the assertions of the fail signal and (ii) generate the erasure location vectors based on (a) the count and (b) a plurality of reliability items corresponding to the first codeword.11-04-2010
20100299580BCH OR REED-SOLOMON DECODER WITH SYNDROME MODIFICATION - An apparatus generally having a first circuit, a second circuit and a third circuit is disclosed. The first circuit may be configured to calculate a plurality of preliminary syndromes from a plurality of received symbols. The second circuit may be configured to calculate a plurality of normal syndromes by modifying the preliminary syndromes using at most two Galois Field multiplications. The third circuit is generally configured to calculate an errata polynomial based on the normal syndromes.11-25-2010

Patent applications by Pavel A. Panteleev, Moscow RU