Pan, Hsinchu
Bor-Jyh Pan, Hsinchu TW
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20090091947 | Surface light source structure of backlight module in a flat panel display - A surface light source structure having a circuit board, a first light emitting diode (LED) array, and a second LED array is provided. The first and second LED arrays are assembled on the circuit board. Each LED rows of the two LED arrays has a plurality of LED units connected in series. The LED rows of the first LED array are connected in parallel. The LED rows of the second LED array are connected in parallel. The LED rows of the second LED array are intersected between the LED rows of the first LED array. Positive-to-negative directions of the LED units of the first and second LED array are arranged in opposite directions. | 04-09-2009 |
20090128471 | Integrated driving board and liquid crystal display module having the same - A liquid crystal display module and an integrated driving board thereof are disclosed. The driving board includes a substrate, a circuit pattern, a timing clock driver, a light emitting diode (LED) driving module, a color management module and a photosensitive chip. The circuit pattern is disposed on the surface of the substrate. The timing clock driver, the LED driving module, the color management module and the photosensitive chip are disposed on the substrate and electrically coupled to the circuit pattern. The LED driving module is electrically coupled to the timing clock driver. The color management module is electrically coupled to the LED driving module. The photosensitive chip is electrically coupled to the color management module. | 05-21-2009 |
20090154174 | BACKLIGHT MODULE - A backlight module includes a panel, a base, at least a light-emitting element, a heat-dissipating board and at least a circuit board. The base is connected to the panel to form an accommodating space. The light-emitting element is disposed in the accommodating space. The heat-dissipating board is disposed on the base and connected to the base. The heat-dissipating board includes at least two connecting portions and a top portion. The connecting portions are respectively connected to two ends of the top portion and the base to separate the top portion from the base for forming a heat-dissipating space therebetween. The circuit board is disposed on an outer surface of the top portion far away from the base. | 06-18-2009 |
Chang-Lung Pan, Hsinchu TW
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20090114586 | ION EXCHANGE RESIN TOWER AND DETECTION METHOD OF LIFETIME OF RESIN THEREIN - An ion exchange resin tower including a tank, a supply line, an output line, and a plurality of sampling tubes is provided. The supply line guides a liquid into the tank, such that an ion exchange occurs between the liquid and the ion exchange resin in the tank. The processed liquid is guided out of the tank via the output line. The sampling tubes are disposed on a sidewall of the tank to sample the liquid flowing through the resin. | 05-07-2009 |
Chien-Chang Pan, Hsinchu TW
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20110098088 | MULTIMEDIA DATA COMMUNICATION METHOD AND SYSTEM - A multimedia processing system is provided for communicating among a baseband module, an image sensor module, and at least one display module in a mobile phone. The system comprises: a serial baseband interface that transmits and receives processing data from the baseband module; an image sensor interface that transmits and receives image data from the image sensor module; a display interface that transmits and receives display data from the display module, wherein the display interface comprises a display write enable output, a display read enable output, and a display transceiver means to transmit and receive the display data; and at least one register that includes a clock phase control bit, a clock polarity control bit for assisting the serial baseband interface to accommodate different interface standards, and a burst read mode control bit for bursting the serial baseband interface to read sequential processing data from a multimedia module or from the baseband module. | 04-28-2011 |
Chien-Chou Pan, Hsinchu TW
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20100066679 | POWER SAVING APPARATUS AND METHOD FOR WIRELESS MOUSE - The invention mainly relates to a mouse with a capacitive tact switch incorporated thereto. When the user touches the mouse, the capacitive tact switch in the mouse will sense the proximity and inform the host control circuit immediately. Contrarily, when the user's hand is leaving the mouse, the capacitive tact switch will inform the host control circuit to shut down completely the most power consuming parts such as RF module, CMOS sensor thereby the goal of power saving can be achieved. | 03-18-2010 |
Chih-Jui Pan, Hsinchu TW
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20090189163 | THIN FILM TRANSISTOR ARRAY SUBSTRATE - A TFT array substrate includes a substrate, a patterned first metallic layer, a patterned stack layer, a patterned dielectric layer, a patterned transparent conductive layer, and a patterned third metallic layer. Elements of each TFT in the TFT array substrate are arranged vertically, so that the TFT array substrate has relatively small fabrication area and is operable with a high conducting current. Further, the storage capacitance can be enhanced by enclosing or sandwiching the second metallic layer with the common lines and the transparent electrodes. In such a way, pixel flashing caused by those coupled signals can be reduced, thus promoting displaying quality thereof. | 07-30-2009 |
Ching-Tsai Pan, Hsinchu TW
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20130175864 | EXTENSION CORD WITH AC AND DC OUTPUTS FOR COUPLING AC AND DC SOURCES - An extension cord with AC and DC output, includes a first conducting line coupled to a positive end of a DC source and a first end of an AC source, a second conducting line coupled to a negative end of the DC source, a third conducting line coupled to a second end of the AC source, a first socket, and a second socket. The first socket includes a first node, a second node a third node respectively coupled to the first conducting line, the second conducting line, and the third conducting line. The second socket includes a fourth node, a fifth node and a sixth node respectively coupled to the first conducting line, the second conducting line, and the third conducting line. The second node floats when the first socket is provided with the AC output. The third node floats when the first socket is provided with the DC output. | 07-11-2013 |
20130181625 | SINGLE STAGE ELECTRONIC BALLAST WITH POWER FACTOR CORRECTION - A single stage electronic ballast with power factor correction is provided. The single stage electronic ballast can work under the present intensity discharge lamp without any change and provide higher efficient, lower power consumption of lighting system, and better lighting quality of lamps. The single stage electronic ballast can also provide a stable current to load (lamp) for a long time. The single stage electronic ballast includes a first switch and a second switch that are controlled with complementary switching so as to provide an output voltage in response to the input power source and the variation of the load. | 07-18-2013 |
20130322126 | Soft-Switching Inverter - An inverter with soft switching is used for a high step-up ratio and a high conversion efficiency. The inverter includes an isolation voltage-quadrupling DC converter and an AC selecting switch. The isolation voltage-quadrupling DC converter includes an active clamping circuit. By a front-stage converter circuit, a continuous half-sine-wave current is generated. By a rear-stage AC selecting switch, the half-sine-wave current is turned into a sine-wave current. Thus, electricity may be supplied to an AC load or the grid. The circuit is protected by isolating the low-voltage side from the high-voltage side. The conversion efficiency is high. The leakage inductance is low. The switch stress is low. The inverter is durable and reliable. Hence, the inverter is suitable for use in a photovoltaic system to increase the total conversion efficiency. | 12-05-2013 |
20140029318 | PASSIVE POWER FACTOR CORRECTION CIRCUIT - The disclosure relates to a passive power factor correction circuit. The passive power factor correction circuit comprises: a filtering device being used for decreasing high order harmonic of an input current; a resonance device being coupled to the filtering device for controlling operation time of the input current; and a suppression device being coupled to the resonance device for suppressing ripple of the input current. | 01-30-2014 |
20140084898 | STEP DOWN CONVERTER - A step down DC converter includes a switch, one end of the switch is coupled to a DC voltage source, and the other end of the switch is coupled to a first inductor and a first diode which serial coupled to the first inductor. The converter further includes an auto charge pump circuit which is coupled to the first inductor and the first diode and provides an output current to a load. | 03-27-2014 |
20140098573 | DC/DC CONVERTER - A DC/DC converter is coupled between a DC source and a load. The DC/DC converter includes a first charge pump circuit coupled to the DC source, a second charge pump coupled to the load, a first switch coupled to the first charge pump circuit, a second switch coupled to the second charge pump circuit, and a first inductor, wherein, one terminal of the first inductor coupled to the first charge pump circuit and the second charge pump circuit, and the other terminal coupled to a common node between the first switch and the second switch. And wherein, the first inductor, the first switch and the second switch are configured between the first charge pump and the second charge pump. | 04-10-2014 |
20140103899 | BUCK CONVERTER WITH SINGLE STAGE - The present disclosure provides a mirror device with illumination comprising a transparent conductive substrate, an isolation layer, a mirror layer and a light emitting diode (LED) layer. The isolation layer, formed on a surface of the transparent conductive substrate, divides the surface of the transparent conductive substrate into at least one first region and at least one second region. The mirror layer formed on the transparent conductive substrate within the at least one first region, while the LED layer is formed on the transparent conductive substrate within the at least one second region, wherein the mirror layer and the LED layer are electrically isolated from each other. In another embodiment, the present disclosure further provides a mirror box having the mirror device with illumination disposed therein so that the mirror device can be easily carried and kept in the pocket, or purse of user. | 04-17-2014 |
20140139128 | DIRECT CURRENT CONVERSION CIRCUIT - A direct current (DC) conversion circuit suitable for driving a load comprises a buck-boost converter, a resonant stage circuit and an output stage circuit. The buck-boost converter has two input ends receiving a first DC signal, and two output ends outputting a second DC signal. The resonant stage circuit has two input ends receiving the second DC signal. The resonant stage circuit converts the second DC signal to energy and further converts the energy to a negative voltage by a resonance effect. The resonant stage circuit has two input ends outputting the energy. The output stage circuit has two input ends receiving the energy to store the energy, and two output ends outputting energy to the load. | 05-22-2014 |
20140153296 | ISOLATED POWER CONVERSION APPARATUS AND METHOD OF CONVERTING POWER - An isolated power conversion apparatus includes an isolation transformer and an auto charge pump circuit. The isolation transformer has a primary side and a second side, wherein the primary side is electrically connected to a pulsed power supply, and the secondary side has a first end and a second end; the auto charge pump circuit electrically connects the isolation transformer to a loading to improve power conversion efficiency and suppress output voltage ripples. | 06-05-2014 |
20140153305 | AC/DC CONVERTER WITH PASSIVE POWER FACTOR CORRECTION CIRCUIT AND METHOD OF CORRECTING POWER FACTOR - An AC/DC converter includes a rectifier circuit and a power factor correction circuit. An input port of the rectifier circuit receives an alternate current. The power factor correction circuit includes a first inductor, a second inductor, a first capacitor, a second capacitor, a first diode and a second diode. An end of the first inductor electrically connects to a positive pole of an output port of the rectifier circuit, and the other end electrically connects to a ground terminal of the output port through two parallel series routes which are bridged by the first diode. Wherein a series route contains the first capacitor and the second diode, and the other series route contains the second inductor and the second capacitor. The second capacitor is provided for parallel connecting with a loading. In this way, the input current could be controlled to increase the power factor effectively. | 06-05-2014 |
20140153306 | AC/DC CONVERTER AND METHOD OF CORRECTING POWER FACTOR - An AC/DC converter includes a rectifier circuit and an active power factor correction circuit. The rectifier circuit is electrically connected to a power supply, and is used to convert an alternate current into a direct current, wherein the rectifier circuit has a positive output and a negative output for sending out the direct current. The active power factor correction circuit electrically connects the rectifier circuit and a loading, wherein the active power factor correction circuit is used to suppress voltage ripples provided to the loading. | 06-05-2014 |
20150097546 | BIDIRECTIONAL DC-DC CONVERTER - A bidirectional converter circuit includes a voltage source which provides an input voltage, an energy storage set connected to the voltage source and receives the input voltage, a switch set connected to the energy storage set, wherein the switch set includes a first switch and a second switch; an operating switch set connected to the switch set, wherein the operating switch set includes a first operating switch, a second operating switch, a third operating switch and a fourth operating switch. The bidirectional converter further includes a blocking capacitor set and a (input/output) capacitor set. Wherein, the blocking capacitor set is connected to the switch set and the operating switch set. The first operating switch and the second operating switch are driven complementarily with the first switch, and the third operating switch and the fourth operating switch are driven complementarily with the second switch. | 04-09-2015 |
20150131330 | BIDIRECTIONAL DC-DC CONVERTER SYSTEM AND CIRCUIT THEREOF - The invention discloses a bidirectional dc-dc converter system and circuit thereof. In boost mode, topology is combined with interleaved two-phase boost converter for providing a higher step-up voltage gain. In buck mode, topology is combined with interleaved two-phase buck converter in order to get a higher step-down conversion ratio. The main objectives of the invention are aimed to both store energy in the blocking capacitors (C | 05-14-2015 |
20160006357 | POWER CONVERSION APPARATUS - A power conversion apparatus, which converts power of a DC power supply and provides it to the loading, includes a transformer, an electronic switch, a leakage energy recycling circuit, and a output circuit. The transformer has a primary winding, which receives the power, and a secondary winding, which outputs the converted power. An end of the electronic switch is electrically connected to the primary winding; another end thereof is electrically connected to the DC power supply. The leakage energy recycling circuit is electrically connected to the primary winding, and repeatedly and alternatively outputs power of positive and negative voltage. The circuit receives and stores leakage energy of the transformer, and feedbacks it to the transformer. The output circuit is electrically connected to the secondary winding to receive the converted power and to provide it to the loading. | 01-07-2016 |
Chin-Han Pan, Hsinchu TW
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20150333178 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A method of fabricating a semiconductor device is provided. A substrate is provided. The substrate includes a first region, a second region and a third region. An isolation structure is formed on the substrate in the first and the second region. A removing process is performed to remove the isolation structure in the first region, so as to form a first opening exposing a top surface of the substrate. A gate structure is formed on the substrate, covering a part of the substrate in the first region and a part of the isolation structure in the second region. A first doped region of a first conductive type is formed at one side of the gate structure in the first region, and a second doped region of the first conductive type is formed in the substrate in the third region. | 11-19-2015 |
Chun-Yun Pan, Hsinchu TW
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20130278859 | LIQUID CRYSTAL DISPLAY HAVING FRAME DEFINING ACCESS THEREIN - A liquid crystal display includes a first frame, a second frame, a liquid crystal panel, and a backlight module. The backlight module includes a light guide plate, a light source assembly, and a third frame. The light guide plate includes a light incident surface. The third frame defines an access corresponding to the light incident surface. The first and second frames cooperate to receive the liquid crystal panel and the backlight module. The light source assembly is attached to the first frame and located outside of the third frame. The light guide plate is received in the third frame, and the light source assembly faces the light incident surface of the light guide plate via the access. | 10-24-2013 |
Ci-Ling Pan, Hsinchu TW
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20100213440 | Silicon-Quantum-Dot Semiconductor Near-Infrared Photodetector - A mesoporous silica having adjustable pores is obtained to form a template and thus a three-terminal metal-oxide-semiconductor field-effect transistor (MOSFET) photodetector is obtained. A gate dielectric of a nano-structural silicon-base membrane is used as infrared light absorber in it. Thus, a semiconductor photodetector made of pure silicon having a quantum-dot structure is obtained with excellent near-infrared optoelectronic response. | 08-26-2010 |
20100215065 | Coherent multiple-stage optical rectification terahertz wave generator - The present invention coherent multiple-stage optical rectification terahertz wave generator discloses the generation of single-cycle terahertz radiation with two-stage optical rectification in GaSe crystals. By adjusting the time delay between the pump pulses employed to excite the two stages, the terahertz radiation from the second GaSe crystal can constructively superpose with the seeding terahertz field from the first stage. The high mutual coherence between the two terahertz radiation fields is ensured with the coherent optical rectification process and can be further used to synthesize a desired spectral profile of output coherent THz radiation. The technique is also useful for generating high amplitude single-cycle terahertz pulses, not limited by the pulse walk-off effect from group velocity mismatch in the nonlinear optical crystal used. | 08-26-2010 |
20130051807 | PHOTONIC MILLIMETER-WAVE GENERATOR - A photonic millimeter-wave generator capable of combining wired and wireless communication facilities to further elongate the transmission distance comprises a laser generator for generating a first optical signal; an optical frequency comb generator coupled with the laser generator; and a pulse shaper coupled with the optical frequency comb generator. The optical frequency comb generator receives the first optical signal generated by the laser generator and outputs a second optical signal. The second optical signal contains multiple frequency components and is sent to the pulse shaper. The pulse shaper adjusts the amplitude and phase of the second optical signal and then outputs the signal as a third optical signal. | 02-28-2013 |
20140131716 | MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME - A memory device comprises a substrate, a tunnel oxide layer, a charge trapping layer, a block oxide layer, a plurality of conductive quantum dots, a metal gate and a source/drain structure. The tunnel oxide layer is disposed on the substrate and has a thickness substantially less than or equal to 2 nm. The charge trapping layer is disposed on the tunnel oxide layer. The quantum dots are embedded in the charge trapping layer. The block oxide layer is disposed on the charge trapping layer. The metal gate essentially consisting of aluminum (Al), copper (Cu), tantalum nitride (TiN), titanium nitride (TaN), aluminum-silicon-copper (Al—Si—Cu) alloys or the arbitrary combinations thereof is disposed on the block oxide layer. The source/drain structure is disposed in the substrate. | 05-15-2014 |
20150253627 | LIQUID CRYSTAL BASED OPTOELECTRONIC DEVICE - The invention provides a liquid crystal based optoelectronic device, including an upper substrate and a lower substrate, a liquid crystal layer sandwiched between the upper substrate and the lower substrate, and a pair of indium tin oxide nano-whisker layers formed on the inner surfaces of the upper substrate and the lower substrate, wherein the indium tin oxide nano-whisker layer is used as an alignment layer for aligning liquid crystal molecules in the liquid crystal layer. | 09-10-2015 |
Fu-Ming Pan, Hsinchu TW
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20140264271 | FERROELECTRIC MEMORY DEVICE - A ferroelectric memory device includes a memory layer, made of a silicon-based ferroelectric memory material. The silicon-based ferroelectric memory material includes a mesoporous silica film with nanopores and atomic polar structures on inner walls of the nanopores. The atomic polar structures are formed by asymmetrically bonding metal ions to silicon-oxygen atoms on the inner walls, and the silicon-based ferroelectric memory material includes semiconductor quantum dots, metal quantum dots and metal-semiconductor alloy quantum dots. | 09-18-2014 |
Haw-Woei Pan, Hsinchu TW
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20100155756 | LIGHT EMITTING DIODE PACKAGE AND PROJECTION APPARATUS - A light emitting diode (LED) package including a carrier, at least one LED chip, and a light guide element is provided. The LED chip is disposed on the carrier. The light guide element including a light transmissive body, a light integration part, a reflective film, and a support part is disposed on the carrier and above the LED chip. The light integration part connected to the light transmissive body and disposed between the light transmissive body and the LED chip has a light incident surface facing the LED chip and at least one side. The side connects the light transmissive body and the light incident surface. The reflective film is disposed on the side. The support part leaning on the carrier is connected to the light transmissive body and surrounds the light integration part. The light transmissive body, the light integration part, and the support part are integrally formed. | 06-24-2010 |
20120099085 | LIGHT EMITTING DIODE PACKAGE AND PROJECTION APPARATUS - A light emitting diode package including a carrier, at least one LED chip, and a light guide element. The LED chip is disposed on the carrier. The light guide element including a light transmissive body, a light integration part, a reflective film, and a support part is disposed on the carrier and located above the LED chip. The light integration part connected to the light transmissive body and disposed between the light transmissive body and the LED chip has a light incident surface facing the LED chip and at least one side surface. The side surface connects the light transmissive body and the light incident surface. The reflective film is disposed on the side surface. The support part leaning on the carrier is connected to the light transmissive body and surrounds the light integration part. The light transmissive body, the light integration part, and the support part are integrally formed. | 04-26-2012 |
20130070205 | ILLUMINATION SYSTEM AND PROJECTION APPARATUS - An illumination system includes a first light source, a first rotation wheel, a first phosphor element, and a light combining element. The first light source is capable of emitting a first color beam. The first rotation wheel is disposed on a transmission path of the first color beam and includes a first transmissive region and a first reflective region. The first transmissive region is capable of allowing the first color beam to pass through so as to form a first color transmissive beam. The first reflective region is capable of reflecting the first color beam to form a first color reflective beam. One of the first color transmissive and reflective beams excites the first phosphor element to form a second color beam. The light combining element combines the second color beam and a beam originating from the other one of the first color transmissive and reflective beams. | 03-21-2013 |
20130088689 | LIGHT SOURCE MODULE AND PROJECTION APPARATUS - A light source module including a first light-emitting device, a light emitting wheel, a second light-emitting device, and a light combination device is provided. The first light-emitting device provides an exciting beam. The light emitting wheel is disposed on a transmission path of the exciting beam and has a first light conversion area. The exciting beam obliquely irradiates on the first light conversion area and is converted into a first color beam. The second light-emitting device provides a second color beam. Herein, colors of the first color beam and the second color beam are different. The light combination device is disposed on the transmission paths of the first color beam and the second color beam. The first color beam is reflected to the light combination device by the light emitting wheel and the light combination device combines the first color beam and the second color beam. | 04-11-2013 |
20140211171 | PROJECTION APPARATUS - The invention provides a projection apparatus having an image source, a projection lens, and a beam-splitting module. The image source provides an image beam, and the image beam includes a first sub image beam and at least one second sub image beam. The projection lens is disposed on a transmission path of the image beam. | 07-31-2014 |
Hsien-Yu Pan, Hsinchu TW
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20120256235 | LAYOUT SCHEME AND METHOD FOR FORMING DEVICE CELLS IN SEMICONDUCTOR DEVICES - A method and layout for forming word line decoder devices and other devices having word line decoder cells provides for forming metal interconnect layers using non-DPL photolithography operations and provides for stitching distally disposed transistors using a lower or intermediate metal layer or a subjacent conductive material. The transistors may be disposed in or adjacent longitudinally arranged word line decoder or other cells and the conductive coupling using the metal or conductive material lowers gate resistance between transistors and avoids RC signal delays. | 10-11-2012 |
Hsin-Wei Pan, Hsinchu TW
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20150187398 | CONTROL METHOD FOR NONVOLATILE MEMORY DEVICE WITH VERTICALLY STACKED STRUCTURE - A control method for a nonvolatile memory device with a vertically stacked structure is provided. The nonvolatile memory device includes a substrate, a common source line formed on the substrate, and plural memory blocks disposed over the substrate. Each memory block includes a cell string connected between a bit line and the common source line. Firstly, a first memory block of the plural memory blocks is selected as an active memory block, and one of the remaining memory blocks is selected as a second memory block. Then, a ground voltage is provided to the bit line of the second memory block, and the cell string of the second memory block is conducted, so that the ground voltage is transmitted from the bit line to the common source line through the cell string. | 07-02-2015 |
Hsin-Yu Pan, Hsinchu TW
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20140098064 | OPTICAL TOUCH DISPLAY PANEL - An optical touch display panel includes a plurality of light-sensing touch units and a position detecting circuit. Each light-sensing touch unit includes a light-sensing component, a storage capacitor, a signal reading component, and a charging component. The light-sensing component senses a light source to generate a sensing signal. The storage capacitor is connected electrically to the light-sensing component for storing the sensing signal. The signal reading component is connected electrically to the storage capacitor for reading a voltage of the storage capacitor to generate a reading signal. The charging signal is connected electrically to the storage capacitor for charging the storage capacitor to reset an electric charge record of the storage capacitor. The position detecting circuit is connected electrically to the light-sensing touch units for detecting a touch point on the optical touch display panel according to a reading signal output by each of the light-sensing touch units. | 04-10-2014 |
I-An Pan, Hsinchu TW
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20160120424 | THREE-DIMENSIONAL ELECTRODE AND A BIOLOGICAL PROBE COMPRISING THE SAME - The present invention provides a three-dimensional electrode having high cell affinity and capacitive coupling, comprising a pillar portion and a spherical portion, wherein the diameter of the spherical portion is larger than that of the pillar portion, and the carbon nanotubes are coated on the spherical portion, and pillar portion and the spherical portion are made of material selected from metal materials. The present invention may be used for developing biological probes having high cell affinity and capacitive coupling so as to provide high accuracy for measurement of neural cells or electrocardiograms and prevent from distortion. | 05-05-2016 |
Jing-Ping Pan, Hsinchu TW
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20080221325 | Exchange membrane containing modified maleimide oligomers - An exchange membrane containing modified maleimide oligomers comprising sulfonated poly(aryl ether ketone) (S-PAEK) and modified maleimide oligomers. The exchange membrane uses the modified maleimide oligomers having a hyper-branched architecture as matrix, and introduces them into S-PAEK to constitute semi-interpenetration network (semi-IPN), so as to intensify water holding capacity, chemical resistance, the electrochemical stability and thermal resistance of the ionic/proton exchange membrane. The exchange membrane can be used to fabricate the membrane electrode assemblies, fuel cells, and be applied them to the fields of seawater desalination, heavy water and sewage treatment, and biomass-energy resources. | 09-11-2008 |
Jin-Shan Pan, Hsinchu TW
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20130308672 | Chip array structure for laser diodes and packaging device for the same - A chip array structure for laser diodes, formed on an active surface of a semiconductor chip produced from a semiconductor process includes a plurality of light-emitting elements in an array arrangement, at least one insulation wall, at least two wire bond areas and a plurality of connection electrodes. The insulation wall separates the light-emitting elements into at least two light-emitting districts. The wire bond areas are positioned respective to the corresponding light-emitting districts. The connection electrodes electrically couple the wire bond areas with the corresponding light-emitting districts. The wire bond areas have independent electrodes, and the light-emitting districts are electrically isolated by the insulation wall. | 11-21-2013 |
Ke-Ning Pan, Hsinchu TW
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20120002764 | FREQUENCY CALIBRATION CIRCUIT FOR AUTOMATICALLY CALIBRATING FREQUENCY AND METHOD THEREOF - Generate a series of digital data according to a pair of differential signals received from a low speed universal serial bus. Calibrate coarsely a frequency of an oscillator according to a width of an end-of-packet of the series of digital data. And calibrate finely the frequency of the oscillator according to a width of a SYNC pattern of the series of digital data. | 01-05-2012 |
Li-Chi Pan, Hsinchu TW
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20110018075 | STRUCTURE AND FABRICATION METHOD OF A SENSING DEVICE - A sensing device comprises a substrate having an upper surface, a sensor member, at least an external conductive wire, and a standing-ring member. The sensor member, the external conductive wire and the stand-ring member are on the upper surface. The sensor member is located at the central area on the upper surface, and the standing-ring member surrounds the sensor member. The standing-ring member and the sensor member are electrically connected through the at least an external conductive wire. | 01-27-2011 |
Po-Cheng Pan, Hsinchu TW
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20150067632 | EFFICIENT ANALOG LAYOUT PROTOTYPING BY LAYOUT REUSE WITH ROUTING PRESERVATION - A computer implemented method for routing preservation is presented. The method includes decomposing, using the computer, a geometric relationship between a first module, a second module, and a routing path of a source layout, when the computer is invoked to route the solution path. The method further includes disposing, using the computer, the routing path in a solution layout in accordance with the geometric relationship. The solution layout is not defined by a scaling of the source layout. | 03-05-2015 |
Ru-Pin Pan, Hsinchu TW
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20150253627 | LIQUID CRYSTAL BASED OPTOELECTRONIC DEVICE - The invention provides a liquid crystal based optoelectronic device, including an upper substrate and a lower substrate, a liquid crystal layer sandwiched between the upper substrate and the lower substrate, and a pair of indium tin oxide nano-whisker layers formed on the inner surfaces of the upper substrate and the lower substrate, wherein the indium tin oxide nano-whisker layer is used as an alignment layer for aligning liquid crystal molecules in the liquid crystal layer. | 09-10-2015 |
Samuel C. Pan, Hsinchu TW
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20140049281 | Diagnosis Framework to Shorten Yield Learning Cycles of Advanced Processes - The present disclosure relates to a diagnosis framework to shorten yield learning cycles of technology node manufacturing processes from the high defect density stage to technology maturity. A plurality of defect under test (DUT) structures are designed to capture potential manufacturing issues associated with defect formation. A test structure is formed by arranging the DUT structures within a DUT carrier unit, which has been yield-hardened though heuristic yield analysis such that a defect density of the DUT carrier unit is essentially zero. Possible outcomes of an application of test patterns and various failure scenarios associated with defects formed within the DUT structures within the DUT carrier unit are simulated and stored in a look-up table (LUT). The LUT may then be referenced to determine a location of a defect within the test structure without the need for iterative analysis to correctly select defect candidates for physical failure analysis (PFA). | 02-20-2014 |
20150279846 | ANTIFUSE ARRAY AND METHOD OF FORMING ANTIFUSE USING ANODIC OXIDATION - A method for forming an antifuse on a substrate is provided, which comprises: forming a first conductive material on the substrate; placing the first conductive material in an electrolytic solution; performing anodic oxidation on the first conductive material to form a nanowire made of the first conductive material and surrounded by a first dielectric material formed during the anodic oxidation and to form the antifuse on the nanowire; and forming a second conductive material on the antifuse to sandwich the antifuse between the first conductive material and the second conductive material. | 10-01-2015 |
20160099172 | LOW-K INTERCONNECT STRUCTURE AND FORMING METHOD THEREOF - A method of forming low-k interconnect structure is disclosed, which comprises: providing at least one protruding structure on a substrate traversing between a first connection region to a second connection region defined thereon; performing anodic oxidation on the substrate having the protruding structure; forming one or more nanowire interconnect in the protruding structure traversing between the first connection region and the second connection region; the nanowire interconnect being surrounded by a dielectric layer formed during the anodic oxidation. | 04-07-2016 |
Shing-Chyang Pan, Hsinchu TW
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20080199978 | System and method for film stress and curvature gradient mapping for screening problematic wafers - A method of testing a wafer after a current top layer is formed over the wafer. Stress data is collected for the wafer after forming the current top layer. The stress data is derived from changes in wafer curvature. The stress data includes: stress-xx in an x direction and stress-yy in a y direction for each area of a set of finite areas on the wafer, the stress-xx and stress-yy both being derived from wafer-curvature-change-xx in the x direction for each area of the set of finite areas and from wafer-curvature-change-yy in the y direction for each area of the set of finite areas; and the stress-xy being derived from wafer-curvature-change-xy, wherein wafer-curvature-change-xy is a change in wafer twist in the x-y plane for each area of the set of finite areas. A stress gradient vector (and/or its norm) is calculated and used to evaluate the investigating single or multiple accumulated layer. | 08-21-2008 |
Shin Ying Pan, Hsinchu TW
Patent application number | Description | Published |
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20090213823 | NETWORK GATEWAY AND METHOD FOR RELOCATING THE SAME - A method for relocating network gateways comprises the steps of obtaining a moving average of drop ratios and setting the duration of the next detection interval based on the moving average of drop ratios, and requesting at least one mobile station to perform a CSN mobility management procedure when the moving average of drop ratios exceeds a high drop ratio. | 08-27-2009 |