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Owada, JP
Fujio Owada, Kawaguchi-Shi JP
| Patent application number | Description | Published |
|---|---|---|
| 20080252862 | Light Reflector, Method for Manufacturing the Same and Projector - A light reflector which can be manufactured easily by using a plastic base material that is light weight and low cost and has high reflectivity, and a method for manufacturing the same. The light reflector comprises a plastic base material | 10-16-2008 |
Fukuo Owada, Kanagawa JP
| Patent application number | Description | Published |
|---|---|---|
| 20110084146 | IC CARD - A contactless IC card which ensures the reliability of an IC chip mounted therein. Even if the distance between the contactless IC card and a reader/writer is too short, the card prevents an excessive voltage from being applied to the IC chip so that breakdown or reliability deterioration of the circuitry of the IC chip does not occur. The body of the contactless IC card has two interconnection substrates stacked between two external sheets. A first antenna coil formed on one interconnection substrate and a second antenna coil formed on the other interconnection substrate are opposite in winding direction. The number of turns of the second antenna coil is larger than that of the first antenna coil. Therefore, when the IC card comes close to the reader/writer, the voltage between two terminals of the IC chip is always smaller than the voltage induced in the second antenna coil. | 04-14-2011 |
Koji Owada, Hamamatsu-Shi JP
| Patent application number | Description | Published |
|---|---|---|
| 20110007119 | Ink jet recording apparatus - An ink jet recording apparatus is presented. The ink jet recording apparatus includes an apparatus casing comprising a discharge port which opens in a forward direction, a support member disposed within the apparatus casing in the rear of the discharge port and configured to support a recording medium, an ink head disposed within the apparatus casing and configured to eject ink which is curable with irradiation of ultraviolet light to the recording medium, an ultraviolet light irradiation device disposed within the apparatus casing and configured to irradiate ultraviolet light to the recording medium, and a first cover body configured to cover the discharge port in a freely openable and closeable manner, wherein the first cover body is opened upon discharging the recording medium via the discharge port. | 01-13-2011 |
Mitsuru Owada, Kanagawa JP
| Patent application number | Description | Published |
|---|---|---|
| 20090245671 | RESOLUTION CONVERSION UPON HIERARCHICAL CODING AND DECODING - In a decoding method of decoding encoded image data which has been hierarchically encoded in advance, a size of an image to be outputted is determined, and then the encoded image data is decoded up to a layer of hierarchy which is at least one layer more than a minimum number of layer/layers of hierarchy necessary to acquire an image of the determined size. | 10-01-2009 |
| 20110176738 | RESOLUTION CONVERSION UPON HIERARCHICAL CODING AND DECODING - In a decoding method of decoding encoded image data which has been hierarchically encoded in advance, a size of an image to be outputted is determined, and then the encoded image data is decoded up to a layer of hierarchy which is at least one layer more than a minimum number of layer/layers of hierarchy necessary to acquire an image of the determined size. | 07-21-2011 |
Nobuo Owada, Tokyo JP
| Patent application number | Description | Published |
|---|---|---|
| 20080230916 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND FABRICATION PROCESS THEREOF - A semiconductor IC device includes a buried interconnection in interconnection layers over a semiconductor substrate, in which electrical connection of interconnections are provided over and under an interconnection layer of an embedded interconnection from among the interconnection layers such that a first connecting conductor portion within a connecting hole extending from an upper interconnection toward the interconnection layer of a predetermined buried interconnection and a second connecting conductor portion within the connecting hole extending from a lower interconnection toward the interconnection layer of the predetermined buried interconnection are electrically connected via a connecting conductor portion for relay in the connecting groove of the interconnection layer of a predetermined buried interconnection. The connecting conductor portion for relay is sized so that the length of the connecting conductor portion for relay in an extending direction of the predetermined buried interconnection is longer than that of the connecting hole. | 09-25-2008 |
| 20080233736 | PROCESS FOR MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer. | 09-25-2008 |
| 20100055926 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - A manufacturing method of a semiconductor device includes the steps of carrying a substrate in a processing chamber, bringing the processing chamber into a state at a first pressure by supplying a silicon compound gas which contains carbon and hydrogen into the processing chamber, forming a silicon oxide film on the substrate by irradiating a UV light to the silicon compound gas supplied into the processing chamber in the state kept at the first pressure, and decompression process to bring the processing chamber into a state at a second pressure lower than the first pressure. This makes it possible to form the dense silicon oxide film in the trench with high aspect ratio and small width. | 03-04-2010 |
| 20100136786 | PROCESS FOR MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer. | 06-03-2010 |
| 20110230061 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - A manufacturing method of a semiconductor device includes the steps of carrying a substrate in a processing chamber, bringing the processing chamber into a state at a first pressure by supplying a silicon compound gas which contains carbon and hydrogen into the processing chamber, forming a silicon oxide film on the substrate by irradiating a UV light to the silicon compound gas supplied into the processing chamber in the state kept at the first pressure, and decompression process to bring the processing chamber into a state at a second pressure lower than the first pressure. This makes it possible to form the dense silicon oxide film in the trench with high aspect ratio and small width. | 09-22-2011 |
Nobuo Owada, Ome-Shi JP
| Patent application number | Description | Published |
|---|---|---|
| 20100029089 | Method for manufacturing semiconductor device, and substrate processing apparatus - A method for manufacturing a semiconductor device includes the steps of: loading a substrate into a reaction chamber; supplying reactive gases into the reaction chamber and processing the substrate; and unloading the processed substrate from the reaction chamber, wherein the step of processing the substrate includes: a first film formation step of setting the substrate to a first temperature and forming a first silicon film including impurity atoms on the substrate and a second film formation step of setting the substrate to a second temperature, which is lower than the first temperature, and forming a second silicon film that includes no impurity atoms or has an impurity concentration lower than that of the first silicon film on at least the first silicon film. | 02-04-2010 |
Norio Owada, Naka JP
| Patent application number | Description | Published |
|---|---|---|
| 20110002516 | METHOD AND DEVICE FOR DIVIDING AREA OF IMAGE OF PARTICLE IN URINE - An objective is to provide a method and an apparatus for accurately extracting a region of an object particle from a urine particle image obtained by taking an image of urine particles in a urine specimen having varying properties. First, a first object region is extracted using one or more of an R image, a G image, and a B image of a urine particle image taken by an image input optical system configured to input particle images. Then, a density distribution and a size of the first object region of one or more of the R image, the G image, and the B image are calculated. Based on these feature parameters, the first object region is classified into a predetermined number of groups. A second object region is extracted from a local region including the first object region, by using one or more of the R image, the G image, and the B image, depending on each of the groups. This configuration allows stable region segmentation for each particle image even for a urine specimen in which urine particles having different sizes and tones coexist. | 01-06-2011 |
Norio Owada, Chiba JP
| Patent application number | Description | Published |
|---|---|---|
| 20090199577 | Quick Freezing Apparatus and Quick Freezing Method - [Object] To provide a quick freezing apparatus and method making it possible to prevent a subtle reaction between an object-to-be-preserved and a gas inside its freezing store to prevent deformation and deterioration of the object-to-be-preserved as much as possible and freeze-preserve the object maintaining its freshness and quality at a high standard for a long term, and thereby applicable to a long-term preservation of a living tissue. | 08-13-2009 |
Shigeru Owada, Chiba JP
| Patent application number | Description | Published |
|---|---|---|
| 20110295513 | INFORMATION PROCESSING APPARATUS, INFORMATION OUTPUT METHOD, AND PROGRAM - There is provided an information processing apparatus including a data acquisition section which acquires input data for recognizing a growth status of a living thing, a recognition section which recognizes a growth status of the living thing based on the input data acquired by the data acquisition section, an agent control section which determines a state of an agent associated with the living thing depending on the growth status of the living thing recognized by the recognition section, and an output section which outputs an agent image corresponding to the state of the agent determined by the agent control section. | 12-01-2011 |
Shingo Owada, Funabashi-Shi JP
| Patent application number | Description | Published |
|---|---|---|
| 20110077290 | HETEROCYCLIC COMPOUNDS AND THROMBOPOIETIN RECEPTOR ACTIVATORS - A compound represented by the formula (1): | 03-31-2011 |
| 20110092496 | THIOPHENE COMPOUNDS AND THROMBOPOIETIN RECEPTOR ACTIVATORS - A compound represented by the formula (I) (wherein R | 04-21-2011 |
Shingo Owada, Chiba JP
| Patent application number | Description | Published |
|---|---|---|
| 20090118500 | THIOPHENE COMPOUNDS AND THROMBOPOIETIN RECEPTOR ACTIVATORS - A compound represented by the formula (I) (wherein R | 05-07-2009 |
| 20090131659 | AMIDE COMPOUND AND THROMBOPOIETIN RECEPTOR ACTIVATOR - The present invention provides compounds useful for prevention, treatment or alleviation of diseases against which activation of the thrombopoietin receptor is effective. | 05-21-2009 |
| 20090281317 | 3-ETHYLIDENEHYDRAZINO SUBSTITUTED HETEROCYCLIC COMPOUNDS AS THROMBOPOIETIN RECEPTOR ACTIVATORS - A compound represented by the formula (1): wherein A, B, R | 11-12-2009 |
Soji Owada, Tokyo JP
| Patent application number | Description | Published |
|---|---|---|
| 20100155758 | LIGHT EMITTING DEVICE AND MANUFACTURING METHOD FOR THE SAME - A light emitting device is provided, including a resin which can be manufactured according to a simple process and deliver a desired scattering property. The light emitting device is manufactured according to a step for mixing two or more types of immiscible liquid materials to obtain a composition containing at least two types of materials phase-separated in a sea-island structure, and a step for arranging the composition in proximity to an LED chip, curing the composition with the sea-island structure being maintained, thereby forming an encapsulation resin. Accordingly, it is possible to form an island region which serves as a scattering center, according to a simple step of mixing materials. | 06-24-2010 |
Soji Owada, Kanagawa JP
| Patent application number | Description | Published |
|---|---|---|
| 20100044745 | OPTICAL SEMICONDUCTOR DEVICE MODULE WITH POWER SUPPLY THROUGH UNEVEN CONTACTS - In an optical semiconductor device module constructed by an optical semiconductor device having a light emitting portion on its top surface, a mounting substrate adapted to mount the optical semiconductor device thereon, at least one wiring pattern layer formed on a front surface of the mounting substrate, and at least one power supplying portion in contact with the wiring pattern layer, at least one of the power supplying portion and the wiring pattern layer is uneven. | 02-25-2010 |
Takanori Owada, Chiba JP
| Patent application number | Description | Published |
|---|---|---|
| 20090042123 | CALIXRESORCINARENE COMPOUND, PHOTORESIST BASE COMPRISING THE SAME, AND COMPOSITION THEREOF - A calixresorcinarene compound represented by the following formula (1): | 02-12-2009 |
| 20100190107 | CYCLIC COMPOUND, PHOTORESIST BASE MATERIAL AND PHOTORESIST COMPOSITION - A cyclic compound shown by the following formula (I): | 07-29-2010 |
| 20100266952 | CYCLIC COMPOUND, PHOTORESIST BASE, PHOTORESIST COMPOSITION, MICROFABRICATION PROCESS, AND SEMICONDUCTOR DEVICE - A cyclic compound shown by the following formula (I): | 10-21-2010 |
Takayuki Owada, Shizuoka-Ken JP
| Patent application number | Description | Published |
|---|---|---|
| 20080247700 | Bearing Apparatus For a Wheel of Vehicle - A vehicle wheel bearing apparatus has an outer member ( | 10-09-2008 |
Tamotsu Owada, Tokyo JP
| Patent application number | Description | Published |
|---|---|---|
| 20100164119 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A method of manufacturing a semiconductor device, includes steps of forming an organic insulating film over a semiconductor substrate, irradiating an electron beam to a surface of the organic insulating film, forming recesses in the organic insulating film, forming a conductive material over the organic insulating film and in the recesses, and removing the conductive material on the organic insulating film by a polishing to expose the surface of the organic insulating film and to leave the conductive material buried in recesses of the organic insulating film. | 07-01-2010 |
Tamotsu Owada, Shinjuku JP
| Patent application number | Description | Published |
|---|---|---|
| 20090278259 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A semiconductor device includes an insulation film formed above a semiconductor substrate, a conductor containing Cu formed in the insulation film, and a layer film formed between the insulation film and the conductor and formed of a first metal film containing Ti and a second metal film different from the first metal film, a layer containing Ti and Si is formed on the surface of the conductor. | 11-12-2009 |
Tamotsu Owada, Yokohama JP
| Patent application number | Description | Published |
|---|---|---|
| 20110244677 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING APPARATUS - A method of manufacturing a semiconductor device includes: forming a first conductive film on a substrate; forming an insulating film to cover the conductive film; etching the insulating film to form an opening portion to expose at least a portion of the first conductive film in the insulating film; irradiating the opening portion with ultraviolet rays in a reduction gas atmosphere; forming a barrier metal film in the opening portion; and forming a second conductive film on the barrier metal film. | 10-06-2011 |
Tamotsu Owada, Kawasaki JP
| Patent application number | Description | Published |
|---|---|---|
| 20080233734 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device includes forming a first insulating film over a semiconductor substrate, forming a trench in the first insulating film, forming a metal interconnect in the trench, exposing the surface of the metal interconnect to a silicon-containing gas, performing a plasma treatment of the surface of the metal interconnect after exposing to the silicon-containing gas, and forming a second insulating film over the metal interconnect. | 09-25-2008 |
| 20080305645 | Method of manufacturing semiconductor device - A method of manufacturing a semiconductor device comprising a wiring structure that includes a vertical wiring section is disclosed. The method comprises a step of forming an interlayer insulation film made of a low dielectric constant material on a wiring layer, a step of forming a silicon oxide film by CVD using SiH | 12-11-2008 |
| 20090093130 | Silicon oxycarbide, growth method of silicon oxycarbide layer, semiconductor device and manufacture method for semiconductor device - A method of manufacturing a semiconductor device includes the steps of: preparing an underlying structure having a silicon carbide layer covering a copper wiring, and growing silicon oxycarbide on the underlying structure by vapor deposition using, as source gas, tetramethylcyclotetrasiloxane, carbon dioxide gas and oxygen gas, a flow rate of said oxygen gas being at most 3% of a flow rate of the carbon dioxide gas. The surface of the silicon carbide layer of the underlying structure may be treated with a plasma of weak oxidizing gas which contains oxygen and has a molecular weight larger than that of O | 04-09-2009 |
| 20090146309 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device has a first insulating film formed over a semiconductor substrate, a first opening formed in the first insulating film, a first manganese oxide film formed along an inner wall of the first opening, a first copper wiring embedded in the first opening, and a second manganese oxide film formed on the first copper wiring including carbon. | 06-11-2009 |
| 20100012991 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device, comprising: forming n-channel field-effect transistors on a silicon substrate; forming a first insulating film covering the field-effect transistors; shrinking the first insulating film; forming a second insulating film over the first insulating film; and shrinking the second insulating film, wherein the forming an insulating film covering the field-effect transistors and the shrinking the insulating film are repeated a plurality of time. | 01-21-2010 |
| 20110183515 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device has a first insulating film formed over a semiconductor substrate, a first opening formed in the first insulating film, a first manganese oxide film formed along an inner wall of the first opening, a first copper wiring embedded in the first opening, and a second manganese oxide film formed on the first copper wiring including carbon. | 07-28-2011 |
Toru Owada, Yokohama JP
| Patent application number | Description | Published |
|---|---|---|
| 20080294913 | DISK ARRAY CONTROLLER, DISK ARRAY CONTROL METHOD AND STORAGE SYSTEM - Provided is a disk array controller capable of speeding up the processing by simultaneously execution the encryption/decryption of a non parallel block cipher modes of operation. In a disk array controller for controlling a disk array according to a disk access request from a host system, a plurality of non parallel mode encryption/decryption target data are divided into a plurality of messages unrelated to the encryption/decryption processing, partitioning non parallel mode encryption/decryption target data belonging to the respective messages into a plurality of block data, storing each block data belonging to the respective messages by allocating it each line of Rnd[ | 11-27-2008 |
| 20090199010 | SIGNATURE DEVICE, VERIFICATION DEVICE, PROGRAM, SIGNATURE METHOD, VERIFICATION METHOD, AND SYSTEM - An efficient signature technology is provided, which is capable of arbitrary extraction and storage from a plurality of pieces of data and which can make a signature length relatively short. In a signature device ( | 08-06-2009 |
| 20100040226 | DEVICE, PROGRAM AND METHOD FOR GENERATING HASH VALUES - The invention aims to provide a hash function whose safety can be evaluated. To achieve this, a message that is input to a message blocking unit | 02-18-2010 |