| Patent application number | Description | Published |
| 20080278190 | Testing fuse configurations in semiconductor devices - Methods, systems, and apparatus for testing semiconductor devices. A semiconductor device includes one or more external terminals configured to receive fuse configuration data from an external source. The semiconductor device also includes a soft-blow circuit to generate a soft-blow signal based on the fuse configuration data, and a fuse circuit that includes a fuse and has first and second operational states corresponding to the fuse being intact and blown, respectively. The fuse circuit is configured to receive the soft-blow signal and to select its operational state to be the first or second operational state based on the received soft-blow signal. | 11-13-2008 |
| 20090257296 | Programmable memory repair scheme - The present disclosure provides semiconductor devices and methods, systems, and apparatus for testing and operating the same. A semiconductor memory device includes data storage elements and a repair circuit. The data storage elements include primary data storage elements and one or more redundant data storage elements, the primary data storage elements having respective addresses for memory access operations. The repair circuit is programmable by another semiconductor device separate from the memory device to recognize a malfunctioning address of the primary data storage elements and the programmed repair circuit is configured to reroute memory access from a primary data storage element having the recognized malfunctioning address to a corresponding redundant data storage element. | 10-15-2009 |
| 20100100661 | PROCESSOR-MEMORY UNIT FOR USE IN SYSTEM-IN-PACKAGE AND SYSTEM-IN-MODULE DEVICES - An apparatus and method for a processor-memory unit for use in system-in-package (SiP) and system-in-package (SiP) integrated circuit devices. The apparatus includes a processing module, a memory module and a programmable system module. The programmable system module is configured to function as an interface between the memory module and the processing module, or as an interface between the memory module and a testing device. The invention facilitates integration and testing of processor-memory units including functional components having different communication protocols. | 04-22-2010 |
| 20110016352 | PROGRAMMABLE MEMORY REPAIR SCHEME - The present disclosure provides semiconductor devices and methods, systems, and apparatus for testing and operating the same. A semiconductor memory device includes data storage elements and a repair circuit. The data storage elements include primary data storage elements and one or more redundant data storage elements, the primary data storage elements having respective addresses for memory access operations. The repair circuit is programmable by another semiconductor device separate from the memory device to recognize a malfunctioning address of the primary data storage elements and the programmed repair circuit is configured to reroute memory access from a primary data storage element having the recognized malfunctioning address to a corresponding redundant data storage element. | 01-20-2011 |
| 20110063897 | DIFFERENTIAL READ AND WRITE ARCHITECTURE - A memory cell includes a pair of magnetic tunnel junctions and a pair of associated transistors. The magnetic tunnel junctions of the pair are differentially disposed so that in response to the applied voltages, when one them stores a logic one, the other one stores a logic zero. Accordingly, the read operation margin is increased by a factor of two. The true and complementary bit lines of the differential memory cell are coupled to a sense amplifier. Consequently, the need for using reference bit lines is eliminated. | 03-17-2011 |
| 20110063898 | METHOD AND SYSTEM FOR PROVIDING A HIERARCHICAL DATA PATH FOR SPIN TRANSFER TORQUE RANDOM ACCESS MEMORY - A method and system for providing a magnetic memory are described. The method and system include providing memory array tiles (MATs), intermediate circuitry, global bit lines, global word lines, and global circuitry. Each MAT includes magnetic storage cells, bit lines, and word lines. Each of the magnetic storage cells includes at least one magnetic element and at least one selection device. The magnetic element(s) are programmable using write current(s) driven through the magnetic element(s). The bit lines and the word lines correspond to the magnetic storage cells. The intermediate circuitry controls read and write operations within the MATs. Each global bit line corresponds to a first portion of the plurality of MATs. Each global word line corresponds to a second portion of the MATs. The global circuitry selects and drives part of the global bit lines and part of the global word lines for the read and write operations. | 03-17-2011 |
| 20110141802 | METHOD AND SYSTEM FOR PROVIDING A HIGH DENSITY MEMORY CELL FOR SPIN TRANSFER TORQUE RANDOM ACCESS MEMORY - A method and system for providing a magnetic memory are described. The method and system include providing a plurality of magnetic storage cells, a plurality of bit lines corresponding to the magnetic storage cells, a plurality of word lines corresponding to the magnetic storage cells, and a common voltage plane coupled with the magnetic storage cells. Each of the magnetic storage cells includes at least one magnetic element and at least one selection device coupled with the magnetic element(s). The magnetic element(s) are programmable using at least one write current driven through the magnetic element(s). The common voltage plane is coupled with the memory cells. The write current(s) flow between the common voltage plane, the magnetic element(s), and at least one of the bit lines. | 06-16-2011 |
| 20110202789 | PROCESSOR-MEMORY UNIT FOR USE IN SYSTEM-IN-PACKAGE AND SYSTEM-IN-MODULE DEVICES - An apparatus and method for a processor-memory unit for use in system-in-package (SiP) and system-in-package (SiP) integrated circuit devices. The apparatus includes a processing module, a memory module and a programmable system module. The programmable system module is configured to function as an interface between the memory module and the processing module, or as an interface between the memory module and a testing device. The invention facilitates integration and testing of processor-memory units including functional components having different communication protocols. | 08-18-2011 |
| 20110251819 | INTEGRATED CIRCUIT TESTING MODULE INCLUDING SIGNAL SHAPING INTERFACE - Systems and methods of testing integrated circuits are disclosed. The systems include a test module configured to operate between automated testing equipment and an integrated circuit to be tested. The testing interface is configured to test the integrated circuit at a higher slew rate than the slew rate at which signals are received from the automated testing equipment. In order to do so, the testing interface includes components configured for generating addresses, commands, and test data to be conveyed to the integrated circuit. A variety of test data patterns can be produced and the test data can be address dependent. The systems are optionally configured to include a test plan memory component configured to store one or more test plans. A test plan may include a sequence of test patterns and/or conditional branches whereby the tests to be performed next are dependent on the results of the preceding tests. The test plan memory is, optionally, be detachable from the test module. | 10-13-2011 |
| 20110273928 | METHOD AND SYSTEM FOR PROVIDING A MAGNETIC MAGNETIC FIELD ALIGNED SPIN TRANSFER TORQUE RANDOM ACCESS MEMORY - A method and system for providing a magnetic memory are described. The method and system include providing magnetic storage cells, bit lines coupled with the magnetic storage cells, preset lines, and word lines coupled with the magnetic storage cells. Each magnetic storage cell includes magnetic element(s). The bit lines drive write current(s) through selected storage cell(s) of the magnetic storage cells to write to the selected storage cell(s). The preset lines drive preset current(s) in proximity to but not through the selected storage cell(s). The preset current(s) generate magnetic field(s) to orient the magnetic element(s) of the selected storage cell(s) in a direction. The word lines enable the selected storage cell(s) for writing. Either the bit lines reside between the preset lines and the storage cells or the preset lines reside between the storage cells and on a storage cell side of the bit lines. | 11-10-2011 |
| 20110291693 | TESTING FUSE CONFIGURATIONS IN SEMICONDUCTOR DEVICES - Methods, systems, and apparatus for testing semiconductor devices. A semiconductor device includes one or more external terminals configured to receive fuse configuration data from an external source. The semiconductor device also includes a soft-blow circuit to generate a soft-blow signal based on the fuse configuration data, and a fuse circuit that includes a fuse and has first and second operational states corresponding to the fuse being intact and blown, respectively. The fuse circuit is configured to receive the soft-blow signal and to select its operational state to be the first or second operational state based on the received soft-blow signal. | 12-01-2011 |
| 20110299330 | PSEUDO PAGE MODE MEMORY ARCHITECTURE AND METHOD - A non-volatile memory array includes a plurality of word-lines and a plurality of columns. One of the columns further includes a bistable regenerative circuit coupled to a first, a second, a third, and a fourth signal lines. The column also includes a non-volatile memory cell having current carrying terminals coupled to the first and second signal lines and a control terminal coupled to one of the plurality of word-lines. The column further includes a first transistor and a second transistor. The first transistor is coupled to the first terminal of the bistable regenerative circuit, and to a fifth signal line. The second transistor has a first current carrying terminal coupled to the second terminal of the bistable regenerative circuit, and a second current carrying terminal coupled to a sixth signal line. The gate terminals of the first and second transistors are coupled to a seventh signal line. | 12-08-2011 |
| 20120020159 | NON-VOLATILE STATIC RAM CELL CIRCUIT AND TIMING METHOD - A non-volatile static random access memory cell and includes a bistable regenerative circuit coupled to first and second transistors and to first and second non-volatile memory cells. Methods of use include directly transferring a complementary data bit between the non-volatile memory cell and the bistable regenerative circuit. Alternatively, complementary data from the bistable regenerative circuit may be regenerated by a sense amplifier and a second bistable regenerative circuit before being transferred to non-volatile memory cells in a column of memory cells. The bistable regenerative circuit may be reset to ground potential. Applications using the non-volatile SRAM cell with direct read out from the bistable regenerative circuit include a non-volatile flip-flop or non-volatile multiplexer. | 01-26-2012 |
| Patent application number | Description | Published |
| 20090035253 | Poly(lactide-Co-glycolide) based sustained release microcapsules comprising a polypeptide and a sugar - This invention relates to compositions for the sustained release of biologically active polypeptides, and methods of forming and using said compositions, for the sustained release of biologically active polypeptides. The sustained release compositions of this invention comprise a biocompatible polymer having dispersed therein, a biologically active polypeptide and a sugar. | 02-05-2009 |
| 20090069226 | Transmucosal delivery of peptides and proteins - Provided are methods and compositions for enhancing the transmucosal absorption of bioactive peptides and proteins. More particularly, the invention provides compositions for enhancing the transmucosal absorption of bioactive peptides and proteins, such as exendin-4, PYY, PYY3-36, and GLP-1 and their analogs and derivatives, wherein the compositions comprise an absorption enhancing mixture of a cationic polyamino acid, at least one additional absorption enhancing agent, and a buffer that is compatible with the polyamino acid. Also provided are methods for enhancing the transmucosal absorption and bioavailability of bioactive peptides and proteins using such compositions. | 03-12-2009 |
| 20090247463 | POLYMER-BASED SUSTAINED RELEASE DEVICE - This invention relates to compositions for the sustained release of biologically active polypeptides, and methods of forming and using said compositions, for the sustained release of biologically active polypeptides. The sustained release compositions of this invention comprise a biocompatible polymer having dispersed therein, a biologically active polypeptide and a sugar. | 10-01-2009 |
| Patent application number | Description | Published |
| 20090210631 | MOBILE APPLICATION CACHE SYSTEM - Providing a framework for developing, deploying and managing sophisticated mobile solutions, with a simple Web-like programming model that integrates with existing enterprise components. Mobile applications may consist of a data model definition, user interface templates, a client side controller, which includes scripts that define actions, and, on the server side, a collection of conduits, which describe how to mediate between the data model and the enterprise. In one embodiment, the occasionally-connected application server assumes that data used by mobile applications is persistently stored and managed by external systems. The occasionally-connected data model can be a METAdata description of the mobile application's anticipated usage of this data, and be optimized to enable the efficient traversal and synchronization of this data between occasionally connected devices and external systems. | 08-20-2009 |
| 20090300656 | MOBILE APPLICATIONS - Providing a framework for developing, deploying and managing sophisticated mobile solutions, with a simple Web-like programming model that integrates with existing enterprise components. Mobile applications may consist of a data model definition, user interface templates, a client side controller, which includes scripts that define actions, and, on the server side, a collection of conduits, which describe how to mediate between the data model and the enterprise. In one embodiment, the occasionally-connected application server assumes that data used by mobile applications is persistently stored and managed by external systems. The occasionally-connected data model can be a METAdata description of the mobile application's anticipated usage of this data, and be optimized to enable the efficient traversal and synchronization of this data between occasionally connected devices and external systems. | 12-03-2009 |
| Patent application number | Description | Published |
| 20120007808 | Interactive game pieces using touch screen devices for toy play - There is provided a system and method for facilitating an interaction using first and second peripheral devices and related structures. Each of the first and second peripheral devices have a plurality of touch points for touching a touch surface of a touch-sensitive system. According to an exemplary embodiment, a method comprises detecting a plurality of contemporaneous touches on the touch surface of the touch-sensitive system. One of the first and second peripheral devices is identified based on the plurality of contemporaneous touches as compared to the plurality of touch points of one of the first and second peripheral devices. In some embodiments, orientation of the one of the first and second peripheral devices can be determined based on the plurality of contemporaneous touches as compared to the plurality of touch points of the one of the first and second peripheral devices. | 01-12-2012 |
| 20120007817 | Physical pieces for interactive applications using touch screen devices - There are provided systems and methods for facilitating an interaction with a first peripheral device using a touch-sensitive system having a processor and a touch surface. An example method includes detecting, using the processor, the first peripheral device touching the touch surface of the touch-sensitive system, identifying, using the processor, the first peripheral device touching the touch surface of the touch-sensitive system, and determining, using the processor, that the first peripheral device has an accessory attached thereto. A method may include determining, using the processor, transformation of the first peripheral device. Another method may include determining, using the processor, a position of the first peripheral device with respect to digital elements displayed on the touch surface, and interacting with the first peripheral device based on the position of the first peripheral device with respect to the digital elements displayed on the touch surface. | 01-12-2012 |
| 20120071062 | SYSTEMS AND METHODS TO COMMUNICATE AND CONTROL ACTIONS USING LIGHT EMITTING DIODES - In some embodiments, a signal of light may be emitted from an illumination source of a first transceiver. A second transceiver may detect a signal of light from the first transceiver that exceeds a threshold luminosity; and activate, in response to the detecting of the signal of light that exceeds the threshold luminosity, an illumination source of the second transceiver to illuminate. An intensity of the illumination source of the first transceiver may then be reduced in response to the activating of the illumination source of the second transceiver to illuminate. | 03-22-2012 |
| 20120083182 | INTERACTIVE TOY WITH EMBEDDED VISION SYSTEM - Systems and associated methods for providing a play device capable of capturing an image stream through a camera module and process the images through computer vision software. Embodiments provide interactive toys that recognize a set of pre-programmed images and provide responses to images presented by a user. For example, embodiments provide for a toy that requests a certain image and provides a response based upon whether the user presents the correct image. | 04-05-2012 |
| Patent application number | Description | Published |
| 20110191407 | WEB APPLICATION DEVELOPMENT FRAMEWORK - Techniques, systems, apparatus and computer-program products are disclosed for developing a web-hosted shared database system with improved user interface and reduced programming. In one aspect, using a web application development framework includes declaratively specifying a web application's pages using page configurations. The framework can automatically coordinate page state with the state of a database server and an applications server, so that the specified page is first rendered and then one or more portions of the page can be updated in response to a server data change, Also, programs that are executed when a request is issued are declaratively specified using program configurations. Either or both of the page configurations and the program configurations can be implemented by access to a unified application state virtual database. Further, the unified application state virtual database can include the persistent database of the application and transient memory-based data, such as session and page data. | 08-04-2011 |
| 20120060107 | WEB-PAGE-BASED SYSTEM FOR DESIGNING DATABASE DRIVEN WEB APPLICATIONS - In a web-page-based system for designing database driven web applications, a page is initiated containing one or more top level iterators. A user introduces fields to the page from a palette including: input, display, hyperlink, iterator. In one case, the user creates iterators nested in a user-selected iterator, and retaining context of the selected iterator, where the system accommodates iterators that are recursive. In an alternative embodiment, the user adds both display and entry fields pertaining to a given user-selected iterator, retaining context of the selected iterator. Responsive to user introduced fields, the system automatically creates representative data structures in a database and automatically relates fields of the pages to the data structures in accordance with a predetermined logic. | 03-08-2012 |
| Patent application number | Description | Published |
| 20080232372 | Methods and systems for interworking RSVP-based external control plane protocols with internal control plane protocols - The present invention provides improved methods and systems for interworking Resource Reservation Protocol (RSVP)-based external control plane protocols with internal control plane protocols, such as Optical Signaling and Routing Protocol (OSRP). The present invention utilizes only a high-level mapping in which a trigger is created in the internal control plane protocol to initiate the desired internal control plane action or vice versa. The external control plane protocol messages and fields are encapsulated as data in the internal control plane messages and fields and are processed only at the remote end of the internal domain. By encapsulating the entirety or parts of the external control plane protocol messages and fields ensures that necessary information is carried from an ingress border node to an egress border node. At the egress border node, the encapsulated external control plane protocol messages and fields are mapped back to the external control plane protocol, without having to make changes to the internal control plane protocol or perform processing at intermediate nodes. | 09-25-2008 |
| 20080247393 | Methods and systems for using a link management interface to distribute information in a communications network - In various exemplary embodiments, the present invention provides a low-cost, low-processing overhead mechanism for distributing routing, topology, reachability, and recovery information across the interface between two nodes that may then be used by a network or client device to populate a topology database, route a connection, recover from a connection failure, etc. Specifically, the methods and systems of the present invention use a link management interface and the associated link management protocol(s) to distribute this routing, topology, reachability, and recovery information, adding it to the normal link management protocol(s). | 10-09-2008 |
| 20100142943 | DYNAMIC PERFORMANCE MONITORING SYSTEMS AND METHODS FOR OPTICAL NETWORKS - The present disclosure provides dynamic performance monitoring systems and methods for optical networks to ascertain optical network health in a flexible and accurate manner. The present invention introduces accurate estimations for optical channel performance characteristics based either on existing channels or with a dynamic optical probe configured to measure characteristics on unequipped wavelengths. Advantageously, the dynamic performance monitoring systems and methods introduce the ability to determine physical layer viability in addition to logical layer viability. | 06-10-2010 |
| Patent application number | Description | Published |
| 20090125653 | ASSOCIATION USING USB VIDEO ADAPTER - Certified Wireless USB 1.0 (CWUSB) defines two different types of association: cable association and numeric association. In the numeric association, the CWUSB host and device use a specific protocol to exchange the security information. At final stage of this information exchange, both host and device need to display a number asking user's feedback. Once this is done, both host and device will be able to generate the connection key as the shared secret for the following secured communication. One problem of this numeric association method is that device needs to be able to display the numbers. For certain class of device that has capability to display an image, there is a natural way to add this function to them. A method for this class of devices is described. Another kind of association, which is not defined in the CWUSB 1.0, is manual association. User needs only to manually type in the Connection Key coming from the CWUSB device. There are many ways to delivery the key, but it is very easy for device that can display an image. | 05-14-2009 |
| 20090125658 | CWUSB HOST MANAGEMENT SYSTEM - Universal Serial Bus (USB) is a Master/Salve or Host/Device system in which there is only one host and one or more devices connected by cables to the host. To connect a USB device to a different host controller (say another PC), the user unplugs the USB cable and establishes the connection physically by plugging the cable into the new host controller interface. Certified Wireless USB (CWUSB), a logical extension to the USB, preserves the USB connection model, except that the link between the host and the device is now using a wireless technology. A wireless device is usually connected to only one wireless host at a given point of time, even though several wireless hosts may be co-located in the same physical neighborhood. The connection between the wireless host and device is initiated by the device. A device usually selects a wireless host from a stored set of known hosts that have established a trusted relationship with the device. If more than one wireless host is operating in the same neighborhood, there is no well known established procedure for the device to select a particular wireless host to establish a connection. | 05-14-2009 |
| 20090132738 | PRE-ASSOCIATION FOR CWUSB - Certified Wireless USB 1.0 defines two different types of association: cable association and numeric association. In order to implementation these two association methods, the CWUSB device needs to have either upstream USB connector (for cable association) or display capability (for numeric association). These extra requirements make the CWUSB device bulkier (one more USB connector) and/or more expensive (extra display components). For cheap and simple CWUSB devices, we need a simpler association method that is easy and cheap to implement. In a pre-packaged total solution, which includes a host and one or more device(s), we can use pre-association to smooth the user experience. The host and device(s) are pre-associated. When an end user starts to use this solution, they do not need to worry about the association at all. | 05-21-2009 |
| Patent application number | Description | Published |
| 20090112843 | SYSTEM AND METHOD FOR PROVIDING DIFFERENTIATED SERVICE LEVELS FOR SEARCH INDEX - Programs, systems and methods for providing differentiated service levels for a search index are disclosed. Data object documents are processed by extracting terms and scoring each of the terms associated with each document according to criteria to indicate relative importance of the associated document. A plurality of posting lists are generated for each term each comprising entries identifying documents that include the term. The entries are allocated to the different posting lists for the given term depending upon the score for the term associated with particular document. The different posting lists, e.g. a high score and low score posting list, may then be stored as data objects managed according to their indicated importance. For example, the high score posting list data object may be stored in higher performance storage than the low score posting list data object. Scores may be regularly updated. | 04-30-2009 |
| 20090141619 | SYSTEM AND METHOD FOR ENABLING EFFICIENT SMALL WRITES TO WORM STORAGE - According to the present invention, there is provided a method of providing a WORM storage system, the method including a sector-append capability. The method includes receiving data to be written to a WORM storage system. In addition, the method includes identifying a target sector at which the data is to be written. Also, the method includes determining if the received data can be added to the target sector. Moreover, the method includes adding the received data to the target sector if it is determined that the received data can be added to the target sector. | 06-04-2009 |
| 20090193289 | Reducing data loss and unavailability by integrating multiple levels of a storage hierarchy - A method for reducing data loss and unavailability by integrating multiple levels of a storage hierarchy is provided. The method includes receiving a read request. In addition, the method includes recognizing a data failure in response to the read request. The method further includes locating an alternate source of the data to be read in response to recognizing the data failure. The alternate source includes data cached at devices in the storage hierarchy, data in a backup system, and cumulative changes to the data since the last backup. Moreover, the method includes responding to the read request with data from the alternate source. | 07-30-2009 |
| 20090320146 | SYSTEM AND METHOD FOR SECURING DATA WITHIN A STORAGE SYSTEM - According to the present invention, there is provided a system for securing data with a storage system. The system includes at least one storage device. In addition, the system includes a security mechanism for recognizing an attempt to insert or remove the storage device. Moreover, the system includes a management unit to control the insertion and removal of the storage device. | 12-24-2009 |