Patent application number | Description | Published |
20090243089 | MODULE INCLUDING A ROUGH SOLDER JOINT - A module includes a metallized substrate including a metal layer, a base plate, and a joint joining the metal layer to the base plate. The joint includes solder contacting the base plate and an inter-metallic zone contacting the metal layer and the solder. The inter-metallic zone has spikes up to 100 μm and a roughness (R | 10-01-2009 |
20100068552 | MODULE INCLUDING A STABLE SOLDER JOINT - A solder includes a soft solder having a melting point less than 450° C. and particles embedded in the soft solder. Each particle has a maximum length greater than 50 μm. The particles comprise greater than 10 Vol % and less than 60 Vol % of the solder. | 03-18-2010 |
20100252922 | Power Semiconductor Module, Power Semiconductor Module Assembly and Method for Fabricating a Power Semiconductor Module Assembly - The invention relates to a power semiconductor module including a power semiconductor chip arranged on a substrate and comprising a bottom side facing the substrate, a top side facing away from the substrate, and an electrical contact face arranged on the top side. A bond wire is bonded to the contact face. At least when the power semiconductor module is fastened to a heatsink, a contact pressure element creates a contact pressure force (F) acting on a sub-portion | 10-07-2010 |
20100284153 | Twist-Secured Assembly of a Power Semiconductor Module Mountable on a Heat Sink - A power semiconductor module system includes a power semiconductor module, a heat sink and at least one fastener. The power semiconductor module includes a bottom side with a first thermal contact surface and the heat sink includes a top side with a second thermal contact surface. The power semiconductor module is conjoined with the heat sink by means of the at least one fastener. The power semiconductor module includes a number N | 11-11-2010 |
20100284155 | Power Semiconductor Module Including Substrates Spaced from Each Other - The invention relates to a power semiconductor module including a module underside, a module housing, and at least two substrates spaced from each other. Each substrate has a topside facing an interior of the module housing and an underside facing away from the interior of the module housing. The underside of each substrate includes at least one portion simultaneously forming a portion of the module underside. At least one mounting means disposed between two adjacent substrates enables the power semiconductor module to be secured to a heatsink. | 11-11-2010 |
20100302741 | POWER SEMICONDUCTOR MODULE FEATURING RESILIENTLY SUPPORTED SUBSTRATES AND METHOD FOR FABRICATING A POWER SEMICONDUCTOR MODULE - The invention relates to a power semiconductor module including a module housing and at least one substrate populated with at least one power semiconductor chip. The module housing has a bottom side and a top side spaced away from the bottom side in a positive vertical direction. In addition, the substrate has a bottom side facing away from an interior of the module housing. The substrate is arranged in an opening of the module housing configured in its bottom side and attached to the module housing by a resilient bonding agent for freedom of movement of the substrate parallel to the vertical direction in relation to the module housing. In the non-mounted condition of the power semiconductor module, the substrate assumes a resting position in relation to the module housing. To deflect the substrate from the resting position parallel to the vertical direction, a deflection force of 0.1 N to 100 N per mm is applied. | 12-02-2010 |
20110053319 | Method for Fabricating a Circuit Substrate Assembly and a Power Electronics Module Comprising an Anchoring Structure for Producing a Changing Temperature-Stable Solder Bond - A power semiconductor module is fabricated by providing a circuit substrate with a metal surface and an insulating substrate comprising an insulation carrier featuring a bottom side provided with a bottom metallization layer. An anchoring structure is provided comprising a plurality of oblong pillars each featuring a first end facing away from the insulation carrier, at least a subset of the pillars being distributed over the anchoring structure in its entirety, it applying for each of the pillars of the subset that from a sidewall thereof no or a maximum of three elongated bonding webs each extend to a sidewall of another pillar where they are bonded thereto. The anchoring structure is positioned between the insulation carrier and metal surface, after which the metal surface is soldered to the bottom metallization layer and anchoring structure by means of a solder packing all interstices between the metal surface and bottom metallization layer with the solder. | 03-03-2011 |
20120080799 | Semiconductor Module Comprising an Insert and Method for Producing a Semiconductor Module Comprising an Insert - A power semiconductor module is fabricated by providing a base with a metal surface and an insulating substrate comprising an insulation carrier having a bottom side provided with a bottom metallization layer. An insert exhibiting a wavy structure is provided. The insert is positioned between the insulation carrier and metal surface, after which the metal surface is soldered to the bottom side metallization layer and insert by means of a solder packing all interstices between the metal surface and bottom side metallization layer with the solder. | 04-05-2012 |
20130062750 | SEMICONDUCTOR DEVICE INCLUDING CLADDED BASE PLATE - A semiconductor device includes a semiconductor chip coupled to a substrate and a base plate coupled to the substrate. The base plate includes a first metal layer clad to a second metal layer. The second metal layer is deformed to provide a pin-fin or fin cooling structure. | 03-14-2013 |
20130134572 | SEMICONDUCTOR DEVICE INCLUDING CLADDED BASE PLATE - A semiconductor device includes a semiconductor chip joined with a substrate and a base plate joined with the substrate. The base plate includes a first metal layer clad to a second metal layer. The second metal layer is deformed to provide a pin-fin or fin cooling structure. The second metal layer has a sub-layer that has no pins and no pin-fins. The first metal layer has a first thickness and the sub-layer has a second thickness. The ratio between the first thickness and the second thickness is at least 4:1. | 05-30-2013 |
20130203218 | Method for Producing a Composite and a Power Semiconductor Module - A composite is produced by providing a first and a second joining partner, a connecting means, a sealing means, a reactor having a pressure chamber, and a heating element. The two joining partners and the connecting means are arranged in the pressure chamber such that the connecting means is situated between the first joining partner and the second joining partner. A gas-tight region is then produced, in which the connecting means is arranged. Afterward, a gas pressure of at least 20 bar is produced in the pressure chamber outside the gas-tight region. The gas pressure acts on the gas-tight region and presses the first joining partner, the second joining partner and the connecting means together. The joining partners and the connecting means are then heated by means of the heating element to a predefined maximum temperature of at least 210° C. and then cooled. | 08-08-2013 |
20140035117 | Explosion-Protected Semiconductor Module - A semiconductor module includes an electrically conductive lower contact piece and an electrically conductive upper contact piece spaced apart from one another in a vertical direction. The module further includes a semiconductor chip having a first load connection and a second load connection. The semiconductor chip is electrically conductively connected by the second load connection to the lower contact piece, and electrically conductively connected to the upper contact piece by at least one bonding wire bonded to the first load connection. An explosion protection means is arranged between the first load connection and the upper contact piece and into which each of the bonding wires is embedded over at least 80% or over at least 90% of its length. | 02-06-2014 |
20150054159 | Semiconductor Module and a Method for Fabrication Thereof By Extended Embedding Technologies - The semiconductor module includes a carrier, a plurality of semiconductor transistor chips disposed on the carrier, a plurality of semiconductor diode chips disposed on the carrier, an encapsulation layer disposed above the semiconductor transistor chips and the semiconductor diode chips, and a metallization layer disposed above the encapsulation layer. The metallization layer includes a plurality of metallic areas forming electrical connections between selected ones of the semiconductor transistor chips and the semiconductor diode chips. | 02-26-2015 |
20150054166 | Semiconductor Arrangement, Method for Producing a Number of Chip Assemblies and Method for Producing a Semiconductor Arrangement - A semiconductor arrangement includes a plurality of chip assemblies, each of which includes a semiconductor chip having a semiconductor body with a top side and an underside, a top main electrode arranged on the top side, a bottom main electrode arranged on the underside, an electrically conductive top compensation lamina arranged on a side of the top main electrode facing away from the semiconductor body and cohesively and electrically conductively connected to the top main electrode, an electrically conductive bottom compensation lamina arranged on a side of the bottom main electrode facing away from the semiconductor body and cohesively and electrically conductively connected to the bottom main electrode, and a dielectric embedding compound enclosing the semiconductor chip laterally circumferentially in a ring-shaped fashion such that the side of the compensation laminae facing away from the semiconductor body are at least not completely covered by the embedding compound. | 02-26-2015 |
20150061100 | Semiconductor Arrangement, Method for Producing a Number of Chip Assemblies, Method for Producing a Semiconductor Arrangement and Method for Operating a Semiconductor Arrangement - A semiconductor arrangement includes top and bottom contact plates, a plurality of chip assemblies, a dielectric embedding compound, and a control electrode interconnection structure. Each chip assembly has a semiconductor chip having a semiconductor body. The semiconductor body has a top side and an opposing underside. The top side is spaced apart from the underside in a vertical direction. Each semiconductor chip has a top main electrode arranged on the top side, a bottom main electrode arranged on the underside, a control electrode arranged at the top side, and an electrically conductive top compensation die, arranged on the side of the top main electrode facing away from the semiconductor body and cohesively and electrically conductively connected to the top main electrode by means of a top connecting layer. An electric current between the top main electrode and the bottom main electrode can be controlled by means of the control electrode. | 03-05-2015 |
20150061144 | Semiconductor Arrangement, Method for Producing a Semiconductor Module, Method for Producing a Semiconductor Arrangement and Method for Operating a Semiconductor Arrangement - A semiconductor arrangement includes upper and lower contact plates and basic chip assemblies. Each chip assembly has a semiconductor chip having a semiconductor body with upper and lower spaced apart sides. An individual upper main electrode and an individual control electrode are arranged on the upper side. The chip assemblies have either respectively a separate lower main electrode arranged on the lower side of the semiconductor chip of the corresponding basic chip assembly, or a common lower main electrode, which for each of the chip assemblies is arranged on the lower side of the semiconductor body of that chip assembly. An electrical current between the individual upper main electrode and the individual or common lower main electrode is controllable by its control electrode. The chip assemblies are connected to one another with a material bonded connection by a dielectric embedding compound, forming a solid assembly. | 03-05-2015 |