Patent application number | Description | Published |
20100077727 | CONTINUOUS DIESEL SOOT CONTROL WITH MINIMAL BACK PRESSURE PENATLY USING CONVENTIONAL FLOW SUBSTRATES AND ACTIVE DIRECT SOOT OXIDATION CATALYST DISPOSED THEREON - There is disclosed high cell density or tortuous/turbulent flow through monolithic catalyst devices for the direct catalytic, and (semi) continuous oxidation of diesel particulate matter. The catalysts relate to OIC/OS materials having a stable cubic crystal structure, and most especially to promoted OIC/OS wherein the promotion is achieved by the post-synthetic introduction of non-precious metals via a basic (alkaline) exchange process. The catalyst may additionally be promoted by the introduction of Precious Group Metals. | 04-01-2010 |
20100290964 | HIGH Pd CONTENT DIESEL OXIDATION CATALYSTS WITH IMPROVED HYDROTHERMAL DURABILITY - There is described Pd enriched diesel oxidation catalysts and their application as catalysts for the oxidation of CO and HC emissions from a compression ignition/diesel engine. The catalysts are characterised by increased performance and hydrothermal durability these goals being achieved by employing a layered design to eliminate low temperature catalyst quenching by toxic HC species in the exhaust stream. | 11-18-2010 |
20110236282 | ZROX, CE-ZROX, CE-ZR-REOX AS HOST MATRICES FOR REDOX ACTIVE CATIONS FOR LOW TEMPERATURE, HYDROTHERMALLY DURABLE AND POISON RESISTANT SCR CATALYSTS - The present invention relates to application of catalysts for the Selective Catalytic Reduction of oxides of Nitrogen using N-containing reductant. The catalysts are characterised as phase pure lattice oxide materials into which catalytically active cations are incorporated at high levels of dispersion such that conventional analysis reveals a highly phase pure material. The materials are further characterised by high activity, hydrothermal durability and poison tolerance in the intended application. | 09-29-2011 |
20120128557 | Three-Way Catalyst Having an Upstream Single-Layer Catalyst - Disclosed herein is a layered, three-way conversion catalyst having the capability of simultaneously catalyzing the oxidation of hydrocarbons and carbon monoxide and the reduction of nitrogen oxides being separated in a front and rear portion is disclosed. Provided is a catalytic composite material of a single front and two rear layers in conjunction with a substrate, where each of the layers includes a support, all layers comprise a platinum group metal component, and the rear bottom layer is substantially free of an oxygen storage component (OSC). | 05-24-2012 |
20120128558 | Three-Way Catalyst Having an Upstream Multi-Layer Catalyst - Disclosed herein is a layered, three-way conversion catalyst having the capability of simultaneously catalyzing the oxidation of hydrocarbons and carbon monoxide and the reduction of nitrogen oxides being separated in a front and rear portion is disclosed. Provided is a catalytic material of at least two front and two rear layers in conjunction with a substrate, where each of the layers includes a support, all layers comprise a platinum group metal component, and the rear bottom layer is substantially free of a ceria-containing oxygen storage component (OSC). | 05-24-2012 |
20120294792 | ZROX, CE-ZROX, CE-ZR-REOX as Host Matrices for Redox Active Cations for Low Temperature, Hydrothermally Durable and Poison Resistant SCR Catalysts - The present invention relates to application of catalysts for the Selective Catalytic Reduction of oxides of Nitrogen using N-containing reductant. The catalysts are characterised as phase pure lattice oxide materials into which catalytically active cations are incorporated at high levels of dispersion such that conventional analysis reveals a highly phase pure material. The materials are further characterised by high activity, hydrothermal durability and poison tolerance in the intended application. | 11-22-2012 |
20130058848 | Three-Way Catalyst Having a Upstream Multi-Layer Catalyst - Disclosed herein is a layered, three-way conversion catalyst having the capability of simultaneously catalyzing the oxidation of hydrocarbons and carbon monoxide and the reduction of nitrogen oxides being separated in a front and rear portion is disclosed. Provided is a catalytic material of at least two front and two rear layers in conjunction with a substrate, where each of the layers includes a support, all layers comprise a platinum group metal component, and the rear bottom layer is substantially free of a ceria-containing oxygen storage component (OSC). | 03-07-2013 |
20130287660 | THREE-WAY CATALYST HAVING AN UPSTREAM SINGLE-LAYER CATALYST - Disclosed herein is a layered three-way catalytic system being separated in a front and a rear portion having the capability of simultaneously catalyzing the oxidation of hydrocarbons and carbon monoxide and the reduction of nitrogen oxides. Provided is a catalyst composite comprising a single front catalytic layer and two rear catalytic layers in conjunction with a substrate, where the single font layer and the rear bottom layer comprise a Pd component, the rear top layer comprises a Rh component, and the rear bottom layer is substantially free of an oxygen storage component (OSC). | 10-31-2013 |
Patent application number | Description | Published |
20090042372 | Polysilicon Deposition and Anneal Process Enabling Thick Polysilicon Films for MEMS Applications - A method of forming a thick polysilicon layer for a MEMS inertial sensor includes forming a first amorphous polysilicon film on a substrate in an elevated temperature environment for a period of time such that a portion of the amorphous polysilicon film undergoes crystallization and grain growth at least near the substrate. The method also includes forming an oxide layer on the first amorphous polysilicon film, annealing the first amorphous polysilicon film in an environment of about 1100° C. or greater to produce a crystalline film, and removing the oxide layer. Lastly, the method includes forming a second amorphous polysilicon film on a surface of the crystalline polysilicon film in an elevated temperature environment for a period of time such that a portion of the second amorphous polysilicon film undergoes crystallization and grain growth at least near the surface of the crystalline polysilicon film. | 02-12-2009 |
20100285628 | Micromachined microphone and multisensor and method for producing same - A micromachined microphone is formed from a silicon or silicon-on-insulator (SOI) wafer. A fixed sensing electrode for the microphone is formed from a top silicon layer of the wafer. Various polysilicon microphone structures are formed above a front side of the top silicon layer by depositing at least one oxide layer, forming the structures, and then removing a portion of the oxide underlying the structures from a back side of the top silicon layer through trenches formed through the top silicon layer. The trenches allow sound waves to reach the diaphragm from the back side of the top silicon layer. In an SOI wafer, a cavity is formed through a bottom silicon layer and an intermediate oxide layer to expose the trenches for both removing the oxide and allowing the sound waves to reach the diaphragm. An inertial sensor may be formed on the same wafer, with various inertial sensor structures formed at substantially the same time and using substantially the same processes as corresponding microphone structures. | 11-11-2010 |
20100320548 | Silicon-Rich Nitride Etch Stop Layer for Vapor HF Etching in MEMS Device Fabrication - A thin silicon-rich nitride film (e.g., having a thickness in the range of around 100A to 10000A) deposited using low-pressure chemical vapor deposition (LPCVD) is used for etch stop during vapor HF etching in various MEMS wafer fabrication processes and devices. The LPCVD silicon-rich nitride film may replace, or be used in combination with, a LPCVD stoichiometric nitride layer in many existing MEMS fabrication processes and devices. The LPCVD silicon-rich nitride film is deposited at high temperatures (e.g., typically around 650-900 degrees C.). Such a LPCVD silicon-rich nitride film generally has enhanced etch selectivity to vapor HF and other harsh chemical environments compared to stoichiometric silicon nitride and therefore a thinner layer typically can be used as an embedded etch stop layer in various MEMS wafer fabrication processes and devices and particularly for vapor HF etching processes, saving time and money in the fabrication process. | 12-23-2010 |
20110073859 | Reduced Stiction MEMS Device with Exposed Silicon Carbide - A MEMS device has a first member that is movable relative to a second member. At least one of the first member and the second member has exposed silicon carbide with a water contact angle of greater than about 70 degrees. | 03-31-2011 |
20110095384 | Single Crystal Silicon Sensor with Additional Layer and Method of Producing the Same - A SOI-based MEMS device has a base layer, a device layer, and an insulator layer between the base layer and the device layer. The device also has a deposited layer having a portion that is spaced from the device layer. The device layer is between the insulator layer and the deposited layer. | 04-28-2011 |
20120074417 | Method of Bonding Wafers - A method of bonding wafers with an aluminum-germanium bond includes forming an aluminum layer on a first wafer, and a germanium layer on a second wafer, and implanting the germanium layer with non-germanium atoms prior to forming a eutectic bond at the aluminum-germanium interface. The wafers are aligned to a desired orientation and the two layers are held in contact with one another. The aluminum-germanium interface is heated to a temperature that allows the interface of the layers to melt, thus forming a bond. A portions of the germanium layer may be removed from the second wafer to allow infrared radiation to pass through the second wafer to facilitate wafer alignment. | 03-29-2012 |
20140131850 | MICROCHIP WITH BLOCKING APPARATUS AND METHOD OF FABRICATING MICROCHIP - A microchip has a base die with a conductive interconnect and an isolation trench around at least a portion of the conductive interconnect, and a cap die secured to the base die. A seal, formed from a metal material, is positioned between the base die and the cap die to secure them together. The microchip also has a blocking apparatus, between the isolation trench and the metal seal, that at least in part prevents the metal material from contacting the interconnect. | 05-15-2014 |
20140203422 | Microchip with Blocking Apparatus and Method of Fabricating Microchip - A microchip has a base die with a conductive interconnect and an isolation trench around at least a portion of the conductive interconnect, and a cap die secured to the base die. A seal, formed from a metal material, is positioned between the base die and the cap die to secure them together. The microchip also has a blocking apparatus, between the isolation trench and the metal seal, that at least in part prevents the metal material from contacting the interconnect. | 07-24-2014 |
20140374850 | Apparatus and Method for Shielding and Biasing in MEMS Devices Encapsulated by Active Circuitry - One or more conductive shielding plates are formed in a standard ASIC wafer top metal layer, e.g., for blocking cross-talk from MEMS device structure(s) on the MEMS wafer to circuitry on the ASIC wafer when the MEMS device is capped directly by the ASIC wafer in a wafer-level chip scale package. Generally speaking, a shielding plate should be at least slightly larger than the MEMS device structure it is shielding (e.g., a movable MEMS structure such as an accelerometer proof mass or a gyroscope resonator), and the shielding plate cannot be in contact with the MEMS device structure during or after wafer bonding. Thus, a recess is formed to ensure that there is sufficient cavity space away from the top surface of the MEMS device structure. The shielding plate is electrically conductive and can be biased, e.g., to the same voltage as the opposing MEMS device structure in order to maintain zero electrostatic attraction force between the MEMS device structure and the shielding plate. | 12-25-2014 |
20140374856 | Apparatus and Method for Preventing Stiction of MEMS Devices Encapsulated by Active Circuitry - One or more stopper features (e.g., bump structures) are formed in a standard ASIC wafer top passivation layer for preventing MEMS device stiction vertically in integrated devices having a MEMS device capped directly by an ASIC wafer. A TiN coating may be used on the stopper feature(s) for anti-stiction. An electrical potential may be applied to the TiN anti-stiction coating of one or more stopper features. | 12-25-2014 |
20150028499 | Apparatus and Method for Forming Alignment Features for Back Side Processing of a Wafer - A method for forming an alignment feature for back side wafer processing in a wafer fabrication process involves forming a trench into but not entirely through a wafer from a top side of the wafer; forming a contrasting material on surfaces of the trench; and grinding a bottom side of the wafer to expose the trench using the handling wafer to handle the wafer during such grinding, wherein the contrasting material lining the exposed trench provides an alignment reference for precise alignment of the wafer for back side processing the wafer. | 01-29-2015 |