Patent application number | Description | Published |
20080296667 | Semiconductor device and manufacturing method thereof - A semiconductor device includes a fin active region with a tapered side surface, a gate electrode that has a side surface covering portion covering a part of the side surface of the fin active region and a top surface covering portion covering a part of a top surface of the fin active region, and a source region and drain region formed in the fin active region. In at least a part of the side surface covering portion of the gate electrode, the width is wider at its bottom than at its top. Control of electric field by the gate electrode is improved. Punch-through is thus prevented. | 12-04-2008 |
20090065860 | Semiconductor device and method for manufacturing the same - An exemplary object of the invention is to simultaneously achieve, in a semiconductor device which includes a trench gate structure formed by recessing a portion of a diffusion layer and an inter-diffusion-layer isolation insulating film which are formed on the a semiconductor substrate, good embeddability of the inter-diffusion-layer isolation insulating film and a reduction in channel resistance. In an exemplary embodiment, the diffusion layer which comprises a projecting structure is formed by selectively wet-etching the inter-diffusion-layer isolation insulating film with respect to the diffusion layer in the trench, and an overhanging structure is formed at a projecting portion of the diffusion layer further by selectively epitaxially growing the projecting structure of the diffusion layer. | 03-12-2009 |
20090090949 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device includes: an active region insulated by an element-isolation insulating film embedded on a semiconductor substrate; multiple element forming sections that are provided in the active region; a semiconductor element that is formed in each of the element forming sections; and a channel stopper that is provided in the active region to insulate the element forming sections from each other. The channel stopper comprises: a fin that protrudes between grooves provided in the element-isolation insulating film and on both sides of the active region; a dummy-gate insulating film that covers the fin; and a dummy gate electrode that straddles the fin. | 04-09-2009 |
20090267125 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - An isolation region comprises a step structure comprising a step surface that is perpendicular to a depth direction, an upper isolation region and a lower isolation region. An RC transistor is enclosed by the isolation region. | 10-29-2009 |
20090315092 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor device provided with a field-effect transistor, the field-effect transistor including: a active region defined by element isolating region | 12-24-2009 |
20100001331 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor device includes: a transistor having source and drain regions; first and second contact electrodes embedded in a first interlayer insulating film, and electrically connected to the source region and the drain region, respectively; a third electrode embedded in a second interlayer insulating film positioned in an upper layer of the first interlayer insulating film, and electrically connected to the first contact electrode; a wiring pattern embedded in a third interlayer insulating film positioned in an upper layer of the second interlayer insulating film, and electrically connected to the third contact electrode; and a fourth contact electrode embedded in at least the second and third interlayer insulating films, and electrically connected to the second contact electrode, wherein side surfaces of the wiring pattern along an extending direction of the wiring pattern coincide with side surfaces of the third contact electrode along an extending direction of the wiring pattern. | 01-07-2010 |
20100006930 | SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF, AND DATA PROCESSING SYSTEM - A semiconductor device manufacturing method includes steps of: etching a semiconductor substrate | 01-14-2010 |
20110001185 | DEVICE - A semiconductor device includes a first diffusion region and a second diffusion region in an active region surrounded by an isolation insulation region, a recessed trench region formed between the first diffusion region and the second diffusion region, a gate insulation film formed on the trench region, a gate electrode formed on the gate insulation film to fill the trench region therewith, and a protection insulation film formed in an upper part of the region interposed between the gate insulation film and the isolation insulation region. | 01-06-2011 |
20110073939 | SEMICONDUCTOR DEVICE - A semiconductor device may include, but is not limited to: a semiconductor substrate; a first insulating film; a conductive film; and a semiconductor film. The semiconductor substrate has a first hole. The semiconductor substrate has a first region into which a first impurity is introduced. The first region is adjacent to a side surface of the first hole. The first insulating film covers at least the side surface and a bottom surface of the first hole. The first insulating film has a second hole adjacent to the side surface of the first hole. The conductive film fills a bottom portion of the first hole. The semiconductor film is positioned over the conductive film. The semiconductor film fills the second hole and is in contact with the first region. | 03-31-2011 |
20110233662 | SEMICONDUCTOR DEVICE - A semiconductor device may include, but is not limited to: a semiconductor substrate; a bit line; and a contact portion. The semiconductor substrate has a first groove having at least first and second side surfaces facing each other. The bit line is positioned in the first groove. The bit line is insulated from the semiconductor substrate. The contact portion is positioned in the first groove. The contact portion is electrically connected to the bit line. The contact portion contacts the first side surface of the first groove. The contact portion is insulated from the second side surface of the first groove. | 09-29-2011 |
20120056256 | SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME - A semiconductor device includes a first semiconductor pillar, a second semiconductor pillar, and a first wiring. The first semiconductor pillar includes a first diffusion region. The second semiconductor pillar is adjacent to the first semiconductor pillar. The first wiring is positioned between the first and second semiconductor pillars. The first wiring has a first metal surface. The first metal surface has an ohmic contact with the first diffusion region. | 03-08-2012 |
20120119278 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME - A semiconductor device includes a semiconductor substrate and a first gate structure. The semiconductor substrate has a first groove and a first pillar defined by the first groove. The first groove and the first pillar are adjacent to each other. The first gate structure is disposed in the first groove. The first gate structure includes a first gate insulating film and a first gate electrode. The first gate structure is separated by a first gap from the first pillar. | 05-17-2012 |
20120132971 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME - A semiconductor device includes a semiconductor substrate having a first gate groove having first and second side walls facing to each other. A first gate insulating film covers the first and second side walls. A first gate electrode is disposed on the first gate insulating film and in a lower portion of the first gate groove. A first burying insulating film buries the first gate groove and covers the first gate electrode. A first diffusion region is adjacent to a first upper portion of the first gate insulating film. The first upper portion is positioned on an upper portion of the first side wall of the first gate groove. A second diffusion region is in contact with an upper portion of the second side wall of the first gate groove. | 05-31-2012 |
20120211815 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME - In one embodiment, a semiconductor device includes a semiconductor substrate having a first groove; and a plurality of first pillars over the substrate. The plurality of first pillars is disposed beside the first groove. A first insulator is disposed in the first groove. A bit contact is disposed in the first groove and over the first insulator. The bit contact is coupled to side surfaces of the plurality of first pillars. | 08-23-2012 |
20120299073 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME - A semiconductor device includes a semiconductor substrate having a first gate groove having first and second sides opposite to each other; a first diffusion region underneath the first gate groove; a second diffusion region in the semiconductor substrate, the second diffusion region covering an upper portion of the first side of the first gate groove; and a third diffusion region in the semiconductor substrate. The third diffusion region covers the second side of the first gate groove. The third diffusion region is coupled to the first diffusion region. The third diffusion region has a bottom which is deeper than a bottom of the first gate groove. The bottom of the third diffusion region is different in level from the bottom of the first diffusion region. | 11-29-2012 |
20130214338 | SEMICONDUCTOR DEVICE - A semiconductor device comprises a convex portion, a concave portion provided so as to cover upper and side surfaces of the convex portion, a gate electrode provided so as to be opposed to the convex portion with a gate insulating film interposed between the gate electrode and the convex portion, a pair of diffusion layers provided within the convex portion so as to sandwich the gate electrode, and a contact plug provided on the concave portion, so as to be electrically connected to at least one of the diffusion layers. | 08-22-2013 |
20140015027 | SEMICONDUCTOR DEVICE HAVING GATE ELECTRODE EMBEDDED IN GATE TRENCH - Disclosed herein is a device that includes: a substrate having a gate trench; a gate electrode embedded in the gate trench with an intervention of a gate insulation film; and an embedded insulation film embedded in the gate trench. The substrate includes a first impurity diffusion region in contact with the embedded insulation film and a second impurity diffusion region in contact with the gate insulation film. The gate trench including a first trench portion extending in a first direction and second and third trench portions branching from the first trench portion and extending in a second direction that crosses the first direction. The gate electrode including first, second and third electrode portions embedded in the first, second and third trench portions of the gate trench, respectively. The first impurity diffusion region being sandwiched between the second and third electrode portions. | 01-16-2014 |
20140048860 | SEMICONDUCTOR DEVICE HAVING SEMICONDUCTOR PILLAR - Disclosed herein is a device that includes: first to fourth conductive lines embedded in a semiconductor substrate; a first semiconductor pillar located between the first and second conductive lines; a second semiconductor pillar located between the second and third conductive lines; a third semiconductor pillar located between the third and fourth conductive lines; a first storage element connected to an upper portion of the first semiconductor pillar; a second storage element connected to an upper portion of the third semiconductor pillar; and a bit line embedded in the semiconductor substrate connected to lower portions of the first to third semiconductor pillars. At least one of the first and second conductive lines and at least one of the third and fourth conductive lines being supplied with a potential so as to form channels in the first and third semiconductor pillars. | 02-20-2014 |
20140197482 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME - A semiconductor device includes a semiconductor substrate having a first gate groove having first and second side walls facing to each other. A first gate insulating film covers the first and second side walls. A first gate electrode is disposed on the first gate insulating film and in a lower portion of the first gate groove. A first burying insulating film buries the first gate groove and covers the first gate electrode. A first diffusion region is adjacent to a first upper portion of the first gate insulating film. The first upper portion is positioned on an upper portion of the first side wall of the first gate groove. A second diffusion region is in contact with an upper portion of the second side wall of the first gate groove. | 07-17-2014 |