Noquil
Johathan A. Noquil, Bethlehem, PA US
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20150221584 | Stacked Synchronous Buck Converter Having Chip Embedded in Outside Recess of Leadframe - A power supply system ( | 08-06-2015 |
Jonathan Noquil, Bethlehem, PA US
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20140306332 | Integrating Multi-Output Power Converters Having Vertically Stacked Semiconductor Chips - A packaged multi-output converter ( | 10-16-2014 |
Jonathan A. Noquil, Surigao Del Sur PH
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20110003432 | FLIP CHIP MLP WITH FOLDED HEAT SINK - A semiconductor package assembly including a molded leadless package (MLP) having an exposed top emitter pad and an exposed bottom source pad. A folded heat sink is attached to the exposed top emitter pad of the MLP by a soft solder attach process. The folded heat sink has a planar member generally coextensive in size with the MLP and in electrical and thermal contact with the top emitter pad of the MLP, and also has one or more leads extending generally perpendicularly to the planar member in a direction towards the lower surface of the MLP. These heat sink leads may provide the emitter connection to a printed circuit (PC) board. | 01-06-2011 |
Jonathan A. Noquil, Lapu Lapu City PH
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20100176508 | SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF ASSEMBLY THEREOF - A semiconductor die package includes: an assembly including a semiconductor die, a clip structure attached to an upper surface of the semiconductor die, and a heat sink attached to an upper surface of the clip structure; and a molding material partially encapsulating the assembly, wherein an upper surface of the heat sink is exposed through the molding material. | 07-15-2010 |
Jonathan A. Noquil, Surigao Del Sur Philippines PH
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20090117690 | INTEGRATED TRANSISTOR MODULE AND METHOD OF FABRICATING SAME - An integrated transistor module includes a lead frame that defines at least one low-side land and at least one high-side land. A stepped portion of the lead frame mechanically and electrically interconnects the low-side and high-side lands. A low-side transistor is mounted upon the low-side land with its drain electrically connected to the low-side land. A high-side transistor is mounted upon the high-side land with its source electrically connected to the high-side land. | 05-07-2009 |
Jonathan A. Noquil, Surigao Del Sue PH
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20080213946 | SUBSTRATE BASED UNMOLDED PACKAGE - A semiconductor die package is disclosed. In one embodiment, the semiconductor die package has a substrate. It includes (i) a leadframe structure including a die attach region with a die attach surface and a lead having a lead surface, and (ii) a molding material. The die attach surface and the lead surface are exposed through the molding material. A semiconductor die is on the die attach region, and the semiconductor die is electrically coupled to the lead. The die attach surface and the lead surface can be in different planes. | 09-04-2008 |
Jonathan A. Noquil, Bethlehem, PA US
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20120248521 | Power Converter Having Integrated Capacitor - A power supply module ( | 10-04-2012 |
20120256239 | Ultra-Thin Power Transistor and Synchronous Buck Converter Having Customized Footprint - A packaged power transistor device ( | 10-11-2012 |
20130049077 | High Performance Power Transistor Having Ultra-Thin Package - A field-effect transistor package includes a leadframe with a first linear thickness ( | 02-28-2013 |
20130075893 | Synchronous Buck Converter Having Coplanar Array of Contact Bumps of Equal Volume - A packaged power supply module ( | 03-28-2013 |
20130077250 | DC-DC Converter Vertically Integrated with Load Inductor Structured as Heat Sink - A power supply converter ( | 03-28-2013 |
20140063744 | Vertically Stacked Power FETS and Synchronous Buck Converter Having Low On-Resistance - A power FET ( | 03-06-2014 |
20140245598 | FABRICATING A POWER SUPPLY CONVERTER WITH LOAD INDUCTOR STRUCTURED AS HEAT SINK - A method for fabricating a power supply converter comprises a load inductor wrapped by a metal sleeve structured to transform the inductor into a heat sink positioned to deposit layers of solder paste on a sleeve surface and on the inductor leads. A metal carrier having a portion of a first thickness and portions of a greater second thickness is placed on the solder layers of the inductor. The carrier portion of first thickness is aligned with the inductor sleeve. The carrier portions of second thickness are aligned with the inductor leads. A sync and a control FET are placed side-by-side on solder layers deposited on the carrier portion of first thickness opposite the inductor sleeve. Reflowing is preformed and the solder layers are solidified. The FETs, the carrier and the inductor become integrated and the un-soldered surfaces of the FETs and the carrier portions of second thickness become coplanar. | 09-04-2014 |
20140247562 | DC-DC CONVERTER VERTICALLY INTEGRATED WITH LOAD INDUCTOR STRUCTURED AS HEAT SINK - An apparatus includes a heat-generating component and a thermally inert component positioned in close proximity to the heat-generating component. A housing for the thermally inert component is in touch with the heat-generating component and is structured to transform the thermally inert component into a heat sink for the heat-generating component | 09-04-2014 |
Jonathan A. Noquil, Lapu Lapu City Cebu PH
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20110210708 | High Frequency Power Supply Module Having High Efficiency and High Current - A high frequency power supply module ( | 09-01-2011 |
Jonathan A. Noquil, Surigao Dei Sur PH
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20110008933 | DUAL SIDE COOLING INTEGRATED POWER DEVICE MODULE AND METHODS OF MANUFACTURE - An integrated power device module including a lead frame having first and second spaced pads, one or more common source-drain leads located between the first and second pads, and one or more drain leads located on the outside of the second pad. First and second transistors are flip chip attached respectively to the first and second pads, wherein the source of the second transistor is electrically connected to the one or more common source-drain leads. A first clip is attached to the drain of the first transistor and electrically connected to the one or more common source-drain leads. A second clip is attached to the drain of the second transistor and electrically connected to the one or more drain leads located on the outside of the second pad. Molding material encapsulates the lead frame, the transistors, and the clips to form the module. | 01-13-2011 |
Jonathan Almeria Noquil, Bethlehem, PA US
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20130087900 | Thermally Enhanced Low Parasitic Power Semiconductor Package - A semiconductor device includes a source region, a gate region and a drain region. A first leadframe subassembly is coupled to the drain region. on a second side of the die are attached to a second leadframe subassembly. A second leadframe subassembly has a first portion electrically coupled with the source region and a second portion electrically coupled with the gate region. The first leadframe subassembly is attached to a third leadframe subassembly. A die is interposed between the first leadframe subassembly and the second leadframe subassembly. The height of the third leadframe subassembly provides a standoff for a distance between the first leadframe subassembly and the second leadframe subassembly. | 04-11-2013 |
20140210064 | WIRE BONDING METHOD AND STRUCTURE - An integrated circuit (“IC”) assembly includes an IC die with a metallization layer on a top surface thereof. A plurality of lead wires are bonded at first end portions thereof to the metallization layer. A conductive layer is attached to the metallization layer and covers the first ends of the lead wires. | 07-31-2014 |
20150221622 | DC-DC CONVERTER HAVING TERMINALS OF SEMICONDUCTOR CHIPS DIRECTLY ATTACHABLE TO CIRCUIT BOARD - A power supply system ( | 08-06-2015 |
Jonathan Almeria Noquil US
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20110074007 | THERMALLY ENHANCED LOW PARASITIC POWER SEMICONDUCTOR PACKAGE - A method and structure for a dual heat dissipating semiconductor device. A method includes attaching a drain region on a first side of a die, such as a power metal oxide semiconductor field effect transistor (MOSFET) to a first leadframe subassembly. A source region and a gate region on a second side of the die are attached to a second leadframe subassembly. The first leadframe subassembly is attached to a third leadframe subassembly, then the device is encapsulated or otherwise packaged. An exposed portion of the first leadframe subassembly provides an external heat sink for the drain region, and the second leadframe subassembly provides external heat sinks for the source region and the gate region, as well as output leads for the gate region. The third leadframe subassembly provides output leads for the drain region. | 03-31-2011 |
Jonathon A. Noquil, Bethlehem, PA US
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20120015483 | Semiconductor Device Package and Method of Assembly Thereof - A semiconductor die package includes: an assembly including a semiconductor die, a clip structure attached to an upper surface of the semiconductor die, and a heat sink attached to an upper surface of the clip structure; and a molding material partially encapsulating the assembly, wherein an upper surface of the heat sink is exposed through the molding material. | 01-19-2012 |
20120200281 | Three-Dimensional Power Supply Module Having Reduced Switch Node Ringing - A high frequency power supply module ( | 08-09-2012 |