Nishikawa, Kawasaki-Shi
Kenji Nishikawa, Kawasaki-Shi JP
Patent application number | Description | Published |
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20130285227 | LEADFRAME, SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING THE SAME - A semiconductor device includes a die pad including a first surface and a second surface opposite to the first surface, a first chip arranged in a first area on the first surface, the first chip including a first side and a second side crossing to the first side, a second chip arranged in a second area on the first surface, the second chip including a third side and a fourth side crossing to the third side, a plurality of first marks formed on the first surface, the first marks including a third mark and a fourth mark, a plurality of second marks formed on the first surface, the second marks including a fifth mark and sixth mark. The semiconductor device also includes a wire and a resin encapsulating the first chip, the second chip, and the wire. | 10-31-2013 |
20140001620 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE | 01-02-2014 |
20140242734 | LEADFRAME, SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING THE SAME - A method of manufacturing a semiconductor device includes mounting at least one of a first semiconductor chip and a second semiconductor chip over a die pad of a leadframe, and inspecting a mounting position of at least one of the first semiconductor chip and the second semiconductor chip, wherein the leadframe includes first mark formed to the die pad, for indicating a first mounting region for the first semiconductor chip, and second mark formed to the die pad, for indicating a second mounting region for the second semiconductor chip, the first mark is different from the second mark, in at least either one of size and geometry, wherein, in the inspecting a mounting position of at least one of the first semiconductor chip and the second semiconductor chip, a mounting position of the first semiconductor chip is inspected when the first semiconductor chip is mounted. | 08-28-2014 |
20150194368 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE - A method for manufacturing a semiconductor device, includes: (a) preparing a lead frame that includes a die pad having a first plane and a second plane located on the opposite side of the first plane, and a plurality of leads arranged next to the die pad; (b) mounting a semiconductor chip having a surface, a plurality of electrodes formed over the surface, and a reverse side located on the opposite side of the surface over a chip mounting area of the first plane of the die pad; (c) electrically coupling parts of the electrodes of the semiconductor chip and the leads through a plurality of first wires and electrically coupling the other parts of the electrodes and the die pad through a second wire. | 07-09-2015 |
Naohiro Nishikawa, Kawasaki-Shi JP
Patent application number | Description | Published |
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20150243328 | Content Output Device And Program - At the time of device starting or channel switching in a content output device, even when buffering of a sufficiently large size is performed in order to address multimedia processing at the time of start of a device and content switching, slow reproduction in which video and audio are synchronized with each other can be performed without keeping a user waiting for a long time, and at an arbitrary reproduction rate with the extent of not giving the user feeling of unnaturalness. The broadcasting reception unit initializes the delay amount to a predetermined start value, then gradually increases it with lapse of time, and stops the increase when the delay amount reaches a predetermined end value. Video and audio are synchronously and slowly reproduced at a reproduction rate decided by an increment per unit time of the delay amount. | 08-27-2015 |
Nobuyuki Nishikawa, Kawasaki-Shi JP
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20090042386 | Semiconductor device using metal nitride as insulating film and its manufacture method - A first insulating film is formed on a semiconductor substrate. A second insulating film made of insulating metal nitride is formed on the first insulating film. A recess is formed through the second insulating film and reaches a position deeper than an upper surface of the first insulating film. A conductive member is buried in the recess. A semiconductor device is provided whose interlayer insulating film can be worked easily even if it is made to have a low dielectric constant. | 02-12-2009 |
20090204252 | SUBSTRATE PROCESSING METHOD AND APPARATUS, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND STORAGE MEDIUM - A substrate processing method includes a first step of forming a metal complex by allowing a processing gas containing an organic compound to be adsorbed by a metal layer formed on a target substrate while setting the target substrate to be kept at a first temperature, and a second step of sublimating the metal complex by heating the target substrate to maintain it at a second temperature higher than the first temperature. | 08-13-2009 |
Tsuyoshi Nishikawa, Kawasaki-Shi JP
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20080238485 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A semiconductor integrated circuit device has a combinational logic circuit including one or plural logic cells connected in series. At least one of the logic cells includes a standard cell which includes a MIS transistor, an input terminal to which an output signal from a previous stage is inputted as an input signal, and an output terminal. A first conductivity-type first MIS transistor which is provided between the output terminal of the standard cell and a first power supply voltage, the first MIS transistor including a control terminal to which a circuit control signal is inputted, and the first MIS transistor supplying the first power supply voltage to the output terminal of the standard cell based on the circuit control signal in order to bring the standard cell into an operation-stopped state. A second conductivity-type second MIS transistor cuts off a leakage current of the MIS transistor in the standard cell. | 10-02-2008 |
20100066419 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A semiconductor integrated circuit device has a combinational logic circuit including one or plural logic cells connected in series. At least one of the logic cells includes a standard cell which includes a MIS transistor, an input terminal to which an output signal from a previous stage is inputted as an input signal, and an output terminal. A first conductivity-type first MIS transistor which is provided between the output terminal of the standard cell and a first power supply voltage, the first MIS transistor including a control terminal to which a circuit control signal is inputted, and the first MIS transistor supplying the first power supply voltage to the output terminal of the standard cell based on the circuit control signal in order to bring the standard cell into an operation-stopped state. A second conductivity-type second MIS transistor cuts off a leakage current of the MIS transistor in the standard cell. | 03-18-2010 |