| Patent application number | Description | Published |
| 20090078451 | PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING SAME - A printed wiring board includes multiple conductive layers having conductive circuits, multiple resin insulation layers having openings and including the uppermost resin insulation layer positioned as the outermost layer of the resin insulation layers, multiple via conductors formed in the openings, respectively, and connecting the conductive circuits in the conductive layers, and multiple component-loading pads formed of a copper foil and positioned to load an electronic component. The resin insulation layers and the conductive layers are alternately laminated, and the component-loading pads are formed on the uppermost resin insulation layer. | 03-26-2009 |
| 20100095523 | MULTILAYER PRINTED WIRING BOARD FOR SEMICONDUCTOR DEVICES AND METHOD FOR MANUFACTURING THE BOARD - A multilayer printed wiring board includes one or more resin layers having via-holes and a core layer having via-holes. The via-holes formed in the one or more resin layers are open in the direction opposite to the direction in which the via-holes formed in the core layer are open. A method for manufacturing a multilayer printed wiring board includes a step of preparing a single- or double-sided copper-clad laminate; a step of forming lands by processing the copper-clad laminate; a step of forming a resin layer on the upper surface of the copper-clad laminate, forming openings for via-holes in the resin layer, and then forming the via-holes; and a step of forming openings for via-holes in the lower surface of the copper-clad laminate and then forming the via-holes. | 04-22-2010 |
| 20100116529 | PRINTED WIRING BOARD HAVING A STIFFENER - To provide a novel multilayer printed wiring board in which a conductor on the outermost resin layer is positioned properly. Furthermore, to provide a novel multilayer printed wiring board in which productivity is enhanced when forming solder bumps on the pads for mounting a semiconductor element. In multilayer printed wiring board, multiple pads for connection with a semiconductor chip are formed on one surface, and on its opposite surface, external connection terminals for connection with another substrate are formed. The pads for connection with a semiconductor chip are formed in the central region of one surface, stiffener is formed in the peripheral region surrounding the pads for connection with a semiconductor chip, pads for connection with a semiconductor chip and stiffener are formed with the same material and are set to be the same height, and the actual area of the stiffener is determined according to the total area of the multiple pads for connection with a semiconductor chip. | 05-13-2010 |
| 20100243305 | SUBSTRATE WITH METAL FILM AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing a substrate with a metal film includes preparing an insulative substrate having the first surface and the second surface on the opposite side of the first surface, forming in the insulative substrate a penetrating hole having the inner wall tapering from the first surface of the insulative substrate toward the second surface, forming a layer of a composition containing a polymerization initiator and a polymerizable compound on the inner wall of the penetrating hole, irradiating the layer of the composition with energy such that a polymer is formed on the inner wall of the penetrating hole, applying a plating catalyst on the polymer, and forming a plated-metal film on the inner wall of the penetrating hole. | 09-30-2010 |
| 20100243311 | SUBSTRATE WITH METAL FILM AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing a substrate with a metal film includes preparing a first insulation layer having first and second surfaces, forming a first conductive circuit on the first surface of the first insulation layer, forming on the first surface of the first insulation layer and on the first conductive circuit a second insulation layer having first and second surfaces, forming in the second insulation layer a penetrating hole tapering from the first surface toward the first conductive circuit, forming on the inner wall of the penetrating hole, a composition containing a polymerization initiator and a polymerizable compound, providing a polymer on the inner wall of the penetrating hole by irradiating the composition, applying a plating catalyst on the polymer, and forming a plated-metal film on the inner wall of the penetrating hole. The first surface of the first insulation layer faces the second surface of the second insulation layer. | 09-30-2010 |
| 20110085306 | MULTILAYER PRINTED WIRING BOARD FOR SEMICONDUCTOR DEVICES AND METHOD FOR MANUFACTURING THE BOARD - A coreless multilayer printed wiring board including a coreless layer having an opening, a conductive film formed on an upper surface of the coreless layer and closing one end of the opening of the coreless layer, a via-hole formed in the opening of the coreless layer, a first resin layer formed on the coreless layer and the conductive film and having an opening reaching to the conductive film, a via-hole formed in the opening of the first resin layer, a second resin layer formed on the upper surface of the first resin layer and having an opening, a via-hole formed in the opening of the second resin layer. The via-holes formed in the first and second resin layers are open in the direction opposite to the direction in which the via-hole formed in the coreless layer is open. | 04-14-2011 |
| 20110220399 | MULTILAYER PRINTED WIRING BOARD FOR SEMICONDUCTOR DEVICES AND METHOD FOR MANUFACTURING THE BOARD - A multilayer printed wiring board includes one or more resin layers having via-holes and a core layer having via-holes. The via-holes formed in the one or more resin layers are open in the direction opposite to the direction in which the via-holes formed in the core layer are open. A method for manufacturing a multilayer printed wiring board includes a step of preparing a single- or double-sided copper-clad laminate; a step of forming lands by processing the copper-clad laminate; a step of forming a resin layer on the upper surface of the copper-clad laminate, forming openings for via-holes in the resin layer, and then forming the via-holes; and a step of forming openings for via-holes in the lower surface of the copper-clad laminate and then forming the via-holes. | 09-15-2011 |
| Patent application number | Description | Published |
| 20080303043 | SEMICONDUCTOR LIGHT EMITTING DEVICE - At least one recess and/or protruding portion is created on the surface portion of a substrate for scattering or diffracting light generated in a light emitting region. The recess and/or protruding portion has a shape that prevents crystal defects from occurring in semiconductor layers. | 12-11-2008 |
| 20090042328 | SEMICONDUCTOR LIGHT EMITTING DEVICE - At least one recess and/or protruding portion is created on the surface portion of a substrate for scattering or diffracting light generated in a light emitting region. The recess and/or protruding portion has a shape that prevents crystal defects from occurring in semiconductor layers. | 02-12-2009 |
| 20100264445 | SEMICONDUCTOR LIGHT EMITTING DEVICE - A semiconductor light emitting device including a substrate, an electrode and a light emitting region is provided. The substrate may have protruding portions formed in a repeating pattern on substantially an entire surface of the substrate while the rest of the surface may be substantially flat. The cross sections of the protruding portions taken along planes orthogonal to the surface of the substrate may be semi-circular in shape. The cross sections of the protruding portions may in alternative be convex in shape. A buffer layer and a GaN layer may be formed on the substrate. | 10-21-2010 |
| 20100264446 | SEMICONDUCTOR LIGHT EMITTING DEVICE - A semiconductor light emitting device including a substrate, an electrode and a light emitting region is provided. The substrate may have protruding portions formed in a repeating pattern on substantially an entire surface of the substrate while the rest of the surface may be substantially flat. The cross sections of the protruding portions taken along planes orthogonal to the surface of the substrate may be semi-circular in shape. The cross sections of the protruding portions may in alternative be convex in shape. A buffer layer and a GaN layer may be formed on the substrate. | 10-21-2010 |
| 20100264447 | SEMICONDUCTOR LIGHT EMITTING DEVICE - A semiconductor light emitting device including a substrate, an electrode and a light emitting region is provided. The substrate may have protruding portions formed in a repeating pattern on substantially an entire surface of the substrate while the rest of the surface may be substantially flat. The cross sections of the protruding portions taken along planes orthogonal to the surface of the substrate may be semi-circular in shape. The cross sections of the protruding portions may in alternative be convex in shape. A buffer layer and a GaN layer may be formed on the substrate. | 10-21-2010 |
| 20100266815 | SEMICONDUCTOR LIGHT EMITTING DEVICE - A semiconductor light emitting device including a substrate, an electrode and a light emitting region is provided. The substrate may have protruding portions formed in a repeating pattern on substantially an entire surface of the substrate while the rest of the surface may be substantially flat. The cross sections of the protruding portions taken along planes orthogonal to the surface of the substrate may be semi-circular in shape. The cross sections of the protruding portions may in alternative be convex in shape. A buffer layer and a GaN layer may be formed on the substrate. | 10-21-2010 |
| 20100267181 | SEMICONDUCTOR LIGHT EMITTING DEVICE - A semiconductor light emitting device including a substrate, an electrode and a light emitting region is provided. The substrate may have protruding portions formed in a repeating pattern on substantially an entire surface of the substrate while the rest of the surface may be substantially flat. The cross sections of the protruding portions taken along planes orthogonal to the surface of the substrate may be semi-circular in shape. The cross sections of the protruding portions may in alternative be convex in shape. A buffer layer and a GaN layer may be formed on the substrate. | 10-21-2010 |
| Patent application number | Description | Published |
| 20100033904 | COMPOSITE ELECTRIC ELEMENT - [Problems] To provide an electric element which generates less heat even when its components are miniaturized and it carries a large amount of current, decreases the impedance by decreasing the inductance and is effective over high frequencies. | 02-11-2010 |
| 20100046135 | ELECTRIC ELEMENT - An electric element comprises a dielectric layers, conductive plates, anode electrodes, and cathode electrodes. The conductive plates and the conductive plates are alternately laminated in the width direction of the electric element. The anode electrodes are connected to each of the conductive plates with a predetermined distance. The cathode electrodes are connected to each of the conductive plates with a predetermined distance. The electric element is mounted on a substrate in a manner where the bottom surface makes contact with the substrate. The anode electrode is connected to a first signal line that has a width substantially equal to that of the electric element disposed on the substrate. The anode electrode is connected to a second signal line that has a width substantially equal to that of the electric element disposed on the substrate. | 02-25-2010 |
| 20100232084 | ELECTRIC ELEMENT AND ELECTRIC CIRCUIT - Each of the plurality of conductive plates is formed on a principal surface of each of stacked dielectric layers. Side anode electrodes are connected to positive electrodes of conductive plates, while side cathode electrodes are connected to cathodes of conductive plates. Anode electrodes are connected to the side anode electrodes. Cathode electrodes are connected to the side cathode electrodes. By passing DC currents through the positive conductive plates and cathode conductive plates so as to flow in the opposite directions, effective inductance of the positive conductive plates becomes smaller than its self-inductance. Consequently, the inductance is reduced, thereby lowering impedance. | 09-16-2010 |
| Patent application number | Description | Published |
| 20090217969 | Method for Manufacturing Photoelectric Converter and Photoelectric Converter - Disclosed is a method for manufacturing a photoelectric converter wherein a lower electrode layer, a compound semiconductor thin film having a chalcopyrite structure which serves as a light absorptive layer and a light-transmitting electrode layer that are laminated to form layers are each patterned by photolithography, thereby minimizing damages to the crystals of the compound semiconductor thin film. | 09-03-2009 |
| 20090301558 | Photoelectric Converter and Method for Producing the Same - A photoelectric converter includes a lower electrode layer, a compound semiconductor thin film of a chalcopyrite structure functioning as a photoabsorption layer and a light transmitting electrode layer that are sequentially laminated on a substrate. An end portion of the of compound semiconductor thin film is positioned outward beyond an end of the light transmitting electrode layer. | 12-10-2009 |
| 20100102368 | SOLID STATE IMAGING DEVICE AND FABRICATION METHOD FOR THE SAME - A solid state imaging device with an easy structure in which have the high sensitivity which reaches the wide wavelength region from visible light to near infrared light wavelength region, and dark current is reduced, and a fabrication method for the same, are provided. | 04-29-2010 |
| 20100163864 | SEMICONDUCTOR DEVICE - An object of the present invention is to increase the light emission efficiency of a ZnO-based optical semiconductor device. An optical semiconductor device B has a structure which includes n-type Zn | 07-01-2010 |
| 20110023963 | SOLAR CELL AND MANUFACTURING METHOD THEREOF - There is provided a solar cell in which a lower electrode layer, a photoelectric conversion layer having a chalcopyrite structure that includes a Group Ib element, a Group IIIb element, and a Group VIb element, and an upper electrode layer are sequentially formed on top of a substrate, wherein the solar cell is provided with a silicate layer between the substrate and the lower electrode layer. | 02-03-2011 |
| 20110024859 | PHOTOELECTRIC CONVERSION DEVICE, FABRICATION METHOD FOR THE SAME, AND SOLID STATE IMAGING DEVICE - A photoelectric conversion device has a high S/N ratio and can increase the detection efficiency even under a low luminance. The photoelectric conversion device generates an increased electric charge by impact ionization in a photoelectric conversion unit formed from a chalcopyrite type semiconductor, so as to improve dark current characteristic. The photoelectric conversion device includes: a lower electrode layer; a compound semiconductor thin film of chalcopyrite structure disposed on the lower electrode layer and having a high resistivity layer on a surface; and a transparent electrode layer disposed on the compound semiconductor thin film, wherein the lower electrode layer, the compound semiconductor thin film, and the transparent electrode layer are laminated one after another, and a reverse bias voltage is applied between the transparent electrode layer and the lower electrode layer, and the multiplication by the impact ionization of the electric charge generated by photoelectric conversion is generated within the compound semiconductor thin film. It is also possible to provide a fabrication method for such photoelectric conversion device, and a solid state imaging device using the photoelectric conversion device. | 02-03-2011 |