Patent application number | Description | Published |
20100295098 | III-V HEMT DEVICES - A semiconductor device has a stacked structure in which a p-GaN layer, an SI-GaN layer, and an AlGaN layer are stacked, and has a gate electrode that is formed at a top surface side of the AlGaN layer. A band gap of the AlGaN layer is wider than a band gap of the p-GaN layer and the SI-GaN layer. Moreover, impurity concentration of the SI-GaN layer is less than 1×10 | 11-25-2010 |
20110207321 | SEMICONDUCTOR DEVICE MANUFACTURIING METHOD - A method for manufacturing a semiconductor device including a semiconductor substrate composed of silicon carbide, an upper surface electrode which contacts an upper surface of the substrate, and a lower surface electrode which contacts a lower surface of the substrate, the method including steps of: (a) forming an upper surface structure on the upper surface side of the substrate, and (b) forming a lower surface structure on the lower surface side of the substrate. The step (a) comprises steps of: (a1) depositing an upper surface electrode material layer on the upper surface of the substrate, the upper surface electrode material layer being a raw material layer of the upper surface electrode, and (a2) annealing the upper surface electrode material layer. The step (b) comprises steps of: (b1) depositing a lower surface electrode material layer on the lower surface of the substrate, the lower surface electrode material layer being a raw material layer of the lower surface electrode, and (b2) annealing the lower surface electrode material layer with a laser to make an ohmic contact between the lower surface electrode and the substrate. | 08-25-2011 |
20110316049 | NITRIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - Provided are a vertical nitride semiconductor device in which occurrence of leak currents can be suppressed, and a method for manufacturing such nitride semiconductor device. A nitride semiconductor device, which is a vertical HEMT, is provided with an n | 12-29-2011 |
20130105889 | SWITCHING DEVICE AND METHOD FOR MANUFACTURING THE SAME | 05-02-2013 |
20130146969 | SWITCHING ELEMENT AND MANUFACTURING METHOD THEREOF - A switching element is provided having a semiconductor substrate. A trench gate electrode is formed in the upper surface of the semiconductor substrate. An n-type first semiconductor region, a p-type second semiconductor region, and an n-type third semiconductor region are formed in a region in contact with a gate insulating film in the semiconductor substrate. At a position below the second semiconductor region, there is formed a p-type fourth semiconductor region connected to the second semiconductor region and opposing the gate insulating film via the third semiconductor region and containing boron. A high-concentration-carbon containing region having a carbon concentration higher than that of a semiconductor region exposed on the lower surface of the semiconductor substrate is formed in at least a part of the portion of the third semiconductor region, positioned between the fourth semiconductor region and the gate insulating film, that is in contact with the fourth semiconductor region. | 06-13-2013 |
20140097490 | SEMICONDUCTOR DEVICE - A semiconductor substrate of a semiconductor device includes a body region of a first conductivity type, a drift region of a second conductivity type coming into contact with a lower surface of the body region, a gate electrode that is provided in a gate trench passing through the body region and extending to the drift region and faces the body region, and a gate insulator that is provided between the gate electrode and a wall surface of the gate trench. An inverted U-shaped section is formed in a lower surface of the gate insulator, and a floating region of the first conductivity type is formed in the inverted U-shaped section. The floating region protrudes under a portion that is located at a lowermost portion in the lower surface of the gate insulator. | 04-10-2014 |
20140159705 | WAFER EXAMINATION DEVICE AND WAFER EXAMIINATION METHOD - A wafer examination device includes a probe, a fusion section and a measurement section. The probe is made of a metal which reacts with silicon carbide to produce silicide. The fusion section fuses the probe to a silicon carbide wafer as an examined object. The measurement section measures an electrical property of the silicon carbide wafer through the fused probe. | 06-12-2014 |
20140162443 | METHOD FOR PRODUCING SEMICONDUCTOR DEVICE - A method for producing a semiconductor device includes: an arranging process of arranging a plurality of silicon carbide wafers having opposed first and surfaces so that the first surface and the second surface of adjacent silicon carbide wafers face each other and are separated in parallel; and a heat treatment process of heating the arranged plurality of silicon carbide wafers so that the first surface of each silicon carbide wafer becomes higher in temperature than the second surface thereof, and, in the adjacent silicon carbide wafers, the second surface of one silicon carbide wafer becomes higher in temperature than the first surface of the other silicon carbide wafer that faces the second surface. | 06-12-2014 |
20140175518 | III-V HEMT DEVICES - A semiconductor device has a stacked structure in which a p-GaN layer, an SI-GaN layer, and an AlGaN layer are stacked, and has a gate electrode that is formed at a top surface side of the AlGaN layer. A band gap of the AlGaN layer is wider than a band gap of the p-GaN layer and the SI-GaN layer. Moreover, impurity concentration of the SI-GaN layer is less than 1×10 | 06-26-2014 |
20140183620 | SEMICONDUCTOR DEVICE - A semiconductor substrate of a semiconductor device includes a first conductive body region that is formed in the element region; a second conductive drift region that is formed in the element region; a gate electrode that is formed in the element region, that is arranged in a gate trench, and that faces the body region; an insulating body that is formed in the element region and is arranged between the gate electrode and an inside wall of the gate trench; a first conductive floating region that is formed in the element region and that is surrounded by the drift region; a first voltage-resistance retaining structure that is formed in the peripheral region and that surrounds the element region; and a gate pad that is formed in the peripheral region, and is electrically connected to the gate electrode in a position on the element region-side of the first voltage-resistance retaining structure. | 07-03-2014 |
20140191248 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a semiconductor substrate that has an element region and a peripheral region that surrounds the element region; and a gate pad that is disposed in an area that is on a surface side of the semiconductor substrate. The element region is formed with an insulated gate semiconductor element that has a gate electrode. The peripheral region is formed with a first withstand voltage retaining structure that surrounds the element region and a second withstand voltage retaining structure that is located in a position on the first withstand voltage retaining structure side from an outer edge of the element region and on the element region side from a boundary of the first withstand voltage retaining structure on the element region side. The gate pad is electrically connected to the gate electrode and is disposed in an area in which the second withstand voltage retaining structure is formed. | 07-10-2014 |
20140252465 | SEMICONDUCTOR DEVICE AND METHOD OF PRODUCING THE SAME - A semiconductor device has a semiconductor substrate including a body region, a drift region, a trench that extends from a surface of the semiconductor substrate into the drift region through the body region, and a source region located adjacent to the trench in a range exposed to the surface of the semiconductor substrate, the source region being isolated from the drift region by the body region. A specific layer is disposed on a bottom of the trench, and it has a characteristic of forming a depletion layer at a junction between the specific layer and the drift region. An insulating layer covers an upper surface of the specific layer and a sidewall of the trench. A conductive portion is formed on a part of the side wall of the trench. The conductive portion is joined to the specific layer, and reaches the surface of the semiconductor substrate. | 09-11-2014 |
20140353683 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - In a semiconductor substrate preparation step, a semiconductor substrate which is made of SiC and in which a first semiconductor region of a first conductivity type is formed is prepared. In a second semiconductor region forming step, a second semiconductor region is formed by implanting an impurity of a second conductivity type into a first semiconductor region through multiple ion implantation steps while varying implantation depths of the respective multiple ion implantation steps. In the second semiconductor region forming step, a dose amount of the impurity when an implantation energy of multiple ion implantation steps is the largest is smaller than a dose amount of impurity when the implantation energy is not the largest. | 12-04-2014 |