Naruke
Kiyomi Naruke, Sagamihara-Shi JP
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20100155812 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A non-volatile memory of a semiconductor device has a tunnel insulation film provided on the active area; a floating gate electrode provided on the tunnel insulation film; a control gate electrode provided over the floating gate electrode; and an inter-electrode insulation film provided between the floating gate electrode and the control gate electrode, wherein, in a section of the non-volatile memory cell in a channel width direction, a dimension of a top face of the active area in the channel width direction is equal to or less than a dimension of a top face of the tunnel insulation film in the channel width direction, and the dimension of the top face of the tunnel insulation film in the channel width direction is less than a dimension of a bottom face of the floating gate electrode in the channel width direction. | 06-24-2010 |
20100238725 | NONVOLATILE SEMICONDUCTOR STORAGE DEVICE AND METHOD OF PROGRAMMING DATA THEREIN - Each of the memory cells stores multiple bits of data by way of a threshold voltage distribution having a negative value and representing an erase state, and a plurality of threshold voltage distributions each having a value higher than the threshold voltage distribution representing the erase state and representing a programming state. In a data programming operation, a control circuit applies a certain verify voltage to a control gate of one of the memory cells to be written to obtain a threshold voltage distribution higher than the threshold voltage distribution representing the erase state, thereby confirming the programming state of the memory cells. The control circuit also applies, in a data programming operation, a certain verify voltage to a control gate of one of the memory cells maintained in the erase state, thereby adjusting a lower limit value of the threshold voltage distribution representing the erase state. | 09-23-2010 |
20110001180 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - In a nonvolatile semiconductor memory device having a plurality of nonvolatile memory cells integrated on a semiconductor substrate, each of the memory cells includes a tunnel insulating film formed on the semiconductor substrate, a floating gate electrode formed on the tunnel insulating film, a first interelectrode insulating film formed on the upper surface of the floating gate electrode, a second interelectrode insulating film formed to cover the side surfaces of the floating gate electrode and the first interelectrode insulating film, and a control gate electrode formed on the second interelectrode insulating film. | 01-06-2011 |
20110198682 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - In one embodiment, a nonvolatile semiconductor memory device includes a substrate, and a well of a first conductivity type formed in the substrate. The device further includes a plurality of first isolation layers disposed in parallel to each other in the well, and a second isolation layer disposed in parallel to the first isolation layers in the well, a width of a substrate surface between the second isolation layer and the first isolation layers being set greater than a width of a substrate surface between the first isolation layers. The device further includes a memory cell including a gate insulator, a floating gate, an inter-gate insulator, and a control gate sequentially disposed on the well between the first isolation layers, and a dummy cell including a gate insulator, a floating gate, an inter-gate insulator, and a control gate sequentially disposed on the well between the second isolation layer and one of the first isolation layers. The device further includes a diffusion layer of a second conductivity type formed under the dummy cell in the well between the second isolation layer and the one of the first isolation layers, an upper surface of the diffusion layer being formed at a position higher than bottom surfaces of the first and second isolation layers with the surface of the substrate. | 08-18-2011 |
20130077404 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - A nonvolatile semiconductor memory device according to one embodiment includes: memory cells; word lines connected to the memory cells; and a control circuit configured to control a data read operation. When controlling the data read operation, the control circuit applies one of read voltages to a selected word line, applies a first read pass voltage to a first non-selected word line connected to one of data-written memory cells, and applies a second read pass voltage to a second non-selected word line connected to a non-written memory cell. Each of the read voltages is set to a voltage between two threshold voltage distributions. The first read pass voltage is set so that the data-written memory cells become conductive. The second read pass voltage is set so as to be lower than a highest read voltage, the highest read voltage being the highest voltage among the read voltages. | 03-28-2013 |
Kiyomi Naruke, Mie-Ken JP
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20120250419 | METHOD OF CONTROLLING NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - In one embodiment, method of controlling a semiconductor nonvolatile memory device includes determining data written to an adjacent memory cell which is adjacent to a selection memory cell in memory cells configured as a matrix, the selection memory being selected by a program operation for writing the data to the selection memory, and writing the data to the selection memory with controlling an amount of charges injected into the selection memory based on a result of determining the data. | 10-04-2012 |
Kiyomi Naruke, Kanagawa JP
Kiyomi Naruke, Kanagawa-Ken JP
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20110024824 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME - According to one embodiment, a nonvolatile semiconductor memory device includes a semiconductor layer and a transistor. The transistor includes: a source region, a drain region, and a channel region provided in the semiconductor layer, the channel region being between the source and drain regions; a gate insulating film provided on the channel region; a charge layer provided on the gate insulating film, the charge layer having a side portion and a apical portion; | 02-03-2011 |
Koichiro Naruke, Gifu JP
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20110211924 | DRILL - A guide portion prevents the drilling hole from curving due to a skipping rope phenomenon, and also prevents the inner wall face of the drilling hole from being damaged, so that its surface roughness can be improved. | 09-01-2011 |
Koichiro Naruke, Anpachi-Gun JP
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20120082524 | COOLANT-HOLE EQUIPPED DRILL - A coolant-hole equipped drill includes a drill main body, a cutting edge portion which has a tip flank, a chip discharging groove provided with a front groove wall surface and a rear groove wall surface, a cutting edge formed at a ridge line portion where the front groove wall surface and the tip flank intersect with each other, a land portion formed between the chip discharging grooves adjacent to each other in the rotating direction, and a coolant hole drilled at the land portion and opened at the tip flank. The coolant hole includes a front hole wall surface, a rear hole wall surface, and an outer-circumference hole wall surface. | 04-05-2012 |
20140023448 | DRILL - A drill comprises a drill body that is rotatable on an axis. Chip evacuating flutes, which are open on front flanks of the drill body and are extended rearwards, are formed in a periphery of the drill body on its front side. Cutting edges are formed along ridge lines where the front flanks intersect with wall surfaces of the chip evacuating flutes facing a drill rotating direction. At least first and second front flanks are formed on the front flanks in order of their locations in the drill rotating direction from its leading side to its trailing side. A clearance angle of the second front flank is greater than that of the first front flank. Intersection lines of the first and second front flanks cross the cutting edges. | 01-23-2014 |
Toshiaki Naruke, Tokyo JP
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20130133961 | BODY STRUCTURE OF HYBRID VEHICLE - There is provided a body structure of a hybrid vehicle. The hybrid vehicle is driven using power of an engine and power of a drive motor driven by electrical power supplied from a battery module. The body structure includes a propeller shaft disposed in a lower side of a floor panel in a vertical direction of the vehicle so as to extend in a fore-aft direction of the vehicle and configured to transmit the power of the engine and the power of the drive motor to at least a rear wheel; and an integrated battery pack below the floor panel so as to cover the propeller shaft. The integrated battery pack has at least the battery module. The battery pack includes a recess to house the propeller shaft. | 05-30-2013 |
20130248264 | VEHICLE - There is provided a hybrid vehicle according to the present invention, which is driven using the power of an engine and the power of a drive motor which is driven by an electric power supplied from a battery module, the vehicle including: a propeller shaft which is disposed below a floor panel in a vertical direction of the vehicle extending in a fore-and-aft direction of the vehicle, and is configured to transmit the power of the engine and the power of the drive motor to a rear wheel; and a battery pack having the battery module, the battery pack being disposed below the floor panel so as to cover the propeller shaft. The battery pack has a recess formed in a fore-and-aft direction of the vehicle, and the propeller shaft is housed in an air guide duct defined by the floor panel and the recess of the battery pack. | 09-26-2013 |
20130248268 | HYBRID VEHICLE - There is provided a hybrid vehicle. The hybrid vehicle including: a propeller shaft that transmits a driving force in the front-rear direction of the vehicle body; and a battery unit that is disposed below the propeller shaft under the floor of the vehicle body so that the battery unit is detachable from the vehicle body when the propeller shaft is pushed down. | 09-26-2013 |