Patent application number | Description | Published |
20090098686 | METHOD OF FORMING PREMOLDED LEAD FRAME - A method of forming a pre-molded lead frame having increased stand-offs includes the steps of attaching a first tape to a first side of the lead frame and a second tape to a second side of the lead frame. The taped lead frame is placed in a mold and a first flow of mold compound is initiated. The first flow of the mold compound fills a space between the first tape and an upper mold chase of the mold. A second flow of the mold compound then is initiated. The second flow of the mold compound fills the spaces between a die pad and leads of the lead frame. The first and second tapes then are removed from the lead frame. Improved stand-offs are provided because the first tape was depressed by the first flow of the mold compound. | 04-16-2009 |
20090236713 | SEMICONDUCTOR INTEGRATED CIRCUIT PACKAGE AND METHOD OF PACKAGING SEMICONDUCTOR INTEGRATED CIRCUIT - In a method of packaging a semiconductor IC, a tape is attached to a back surface of a lead frame array, and the lead frame array is held between an upper mold chase and a lower mold chase of a mold, with the back surface of the lead frame array upward. The upper and lower mold chases form an upper cavity and a lower cavity with respect to the lead frame array respectively. A mold compound is injected into the upper and lower cavities respectively. With respect to clearances between leads, between die pads and/or between the leads and the die pads, the mold compound injected into the upper cavity covers the portion of the tape over the clearances before the mold compound injected into the lower cavity fills the clearances, so that the tape is depressed. After curing the mold compound, removing the mold and de-taping, the mold compound filled in the clearances is recessed inward from the back surface, which increases the solderability in the subsequent surface mount process and decreases the possibility of the occurrence of lead short-circuits. | 09-24-2009 |
20100248426 | METHOD OF MAKING CHIP-ON-LEAD PACKAGE - A process for assembling a Chip-On-Lead packaged semiconductor device includes the steps of: mounting and sawing a wafer to provide individual semiconductor dies; performing a first molding operation on a lead frame; depositing epoxy on the lead frame via a screen printing process; attaching one of the singulated dies on the lead frame with the epoxy, where the die attach is done at room temperature; and curing the epoxy in an oven. Throughput improvements may be ascribed to not including a hot die attach process. An optional plasma cleaning step may be performed, which greatly improves wire bonding quality and a second molding quality. In addition, since a first molding operation is performed before the formation of epoxy to avoid the problem of the epoxy hanging in the air, the delamination risk between the epoxy and the die is avoided. | 09-30-2010 |
20110065240 | LEAD FRAME AND METHOD OF FORMING SAME - A lead frame and a method of making a lead frame for a semiconductor package. The lead frame is formed by stamping a lead frame material into a desire configuration. The stamped lead frame is then affixed to a support material. When assembling a semiconductor package using the lead frame, during saw singuation, the saw does not have to cut through much lead frame material. Thus, the saw blade does not wear quickly. | 03-17-2011 |
20110193237 | METHOD FOR MAKING SEMICONDUCTOR PACKAGE - A method for assembling a semiconductor package includes a rapid cooling step after post mold curing of an encapsulation material. The rapid cooling step includes blowing chilled, compressed air over the package for about two minutes. The rapid cooling step does not require any clamping pressure be simultaneously applied to the package. The rapid cooling step reduces a temperature of the encapsulation material from a curing temperature to the cooled temperature within a maximum period of less than five minutes. By using rapid cooling, as opposed to cooling the package under a clamping pressure with ambient air, package warpage due to CTE mismatches is prevented. | 08-11-2011 |
20110248393 | LEAD FRAME FOR SEMICONDUCTOR DEVICE - A lead frame for reducing detrimental effects of burr formation includes a lead frame that has leads where a portion of a top surface is removed from a first lead and a portion of a bottom surface is removed from a second lead adjacent to the first lead to reduce spacing between leads while reducing the detrimental effects of burr formation, such as shorting and the like, caused during singulation of a semiconductor device manufactured with the lead frame. | 10-13-2011 |
20120238058 | METHOD OF PACKAGING SEMICONDUCTOR DIE WITH CAP ELEMENT - A method of assembling semiconductor devices includes placing an array of semiconductor dies on a die support. A cap array structure is provided that has a corresponding array of caps supported by a cap frame structure. The cap array structure and the array of semiconductor dies on the die support are aligned, with the caps extending over corresponding semiconductor dies, in a mold chase. The array of semiconductor dies and the array of caps are encapsulated with a molding compound in the mold chase. The encapsulated units of the semiconductor dies with the corresponding caps are removed from the mold chase and singulated. Singulating the encapsulated units may include removing the cap frame structure from the encapsulated units. | 09-20-2012 |
20130049180 | QFN DEVICE AND LEAD FRAME THEREFOR - A lead frame for a quad flat no-lead (QFN) type semiconductor device package includes a die pad, a plurality of leads that surround the die pad. The outer edge of leads includes a channel that extends from a lower surface to an upper surface of the leads. A semiconductor die is attached to the die pad. An inner edge of each lead is electrically connected to a corresponding bonding pad on the semiconductor die. The assembly is covered with an encapsulation material except that the outer edge of each lead and the corresponding channel are exposed. The channel allows solder to flow up the outer edge of a lead when the QFN device is soldered to a substrate, which improves the ability to perform visual inspection of the solder-lead connection. | 02-28-2013 |
20140284806 | SEMICONDUCTOR DEVICE DIE ATTACHMENT - A semiconductor device has first and semiconductor dies having active faces presenting electrical contact elements and back faces attached to first and second bonding areas side by side on an electrically conductive die support. A layer of electrically insulating material is applied to the first bonding area of the die support. A layer of electrically insulating adhesive bonding material attaches the back face of the first semiconductor die to the first bonding area of the die support through the layer of electrically insulating material. A layer of electrically conductive adhesive bonding material attaches the back face of the second semiconductor die to the second bonding area of the die support. | 09-25-2014 |
Patent application number | Description | Published |
20090251385 | Single-Feed Multi-Cell Metamaterial Antenna Devices - Designs and techniques of Composite Right-Left Handed (CRLH) Metamaterial (MTM) antenna devices, including a CRLH MTM devices that include MTM cells formed on a substrate and a conductive launch stub formed on the substrate to be adjacent to each of the MTM cells and electromagnetically coupled to each of the MTM cells. | 10-08-2009 |
20090295660 | Non-Planar Metamaterial Antenna Structures - Antennas for wireless communications based on metamaterial (MTM) structures to arrange one or more antenna sections of an MTM antenna away from one or more other antenna sections of the same MTM antenna so that the antenna sections of the MTM antenna are spatially distributed in a non-planar configuration to provide a compact structure adapted to fit to an allocated space or volume of a wireless communication device, such as a portable wireless communication device. | 12-03-2009 |
20100045554 | Metamaterial Antennas for Wideband Operations - Metamaterial antennas provide spatially varying electromagnetic coupling that enables impedance matching conditions for different operating frequencies of the MTM antennas so that such antennas can operate at different frequencies for wideband applications, including ultra wideband applications. | 02-25-2010 |
20100109972 | SINGLE-FEED MULTI-CELL METAMATERIAL ANTENNA DEVICES - Designs and techniques of Composite Right-Left Handed (CRLH) Metamaterial (MTM) antenna devices, including a CRLH MTM devices that include MTM cells formed on a substrate and a conductive launch stub formed on the substrate to be adjacent to each of the MTM cells and electromagnetically coupled to each of the MTM cells. | 05-06-2010 |
Patent application number | Description | Published |
20110227795 | ANTENNA STRUCTURES - Antenna structures and configurations which incorporate alignment keys and support structures which mate Composite Right and Left Handed (CRLH) metamaterial (MTM) structures formed on two or more substrates. | 09-22-2011 |
20110241946 | HOLLOW CELL CRLH ANTENNA DEVICES - A CRLH antenna device is presented having a hollow cell patch structure. | 10-06-2011 |
20130050029 | NON-PLANAR METAMATERIAL ANTENNA STRUCTURES - Antennas for wireless communications based on metamaterial (MTM) structures to arrange one or more antenna sections of an MTM antenna away from one or more other antenna sections of the same MTM antenna so that the antenna sections of the MTM antenna are spatially distributed in a non-planar configuration to provide a compact structure adapted to fit to an allocated space or volume of a wireless communication device, such as a portable wireless communication device. | 02-28-2013 |
20130307736 | Antenna - An apparatus including an antenna; a first antenna carrier forming a first support substrate for a first portion of the antenna; and a different second antenna carrier forming a second support substrate for a second portion of the antenna. The first and second antenna carriers are coupled to each other. The antenna extends across a joint between the first and second antenna carriers. | 11-21-2013 |
20150029061 | Antenna - An apparatus including an antenna having an active element and a parasitic element; and at least one support, where the antenna is at least partially on the at least one support, where the at least one support includes a first section coupled to a second different section, where the active element is at least partially on the first section, and where the first section is at least partially formed with a first manufacturing process and a first material. The parasitic element is at least partially on the second section, and the second section is at least partially formed with a second different manufacturing process and a second different material. | 01-29-2015 |
Patent application number | Description | Published |
20130059900 | CRYSTAL FORM I OF (S)-4-HYDROXY-2-OXO-1-PYRROLIDINE ACETAMIDE, PREPARING METHOD AND USE THEREOF - A crystal form I of (S)-4-hydroxy-2-oxo-1-pyrrolidine acetamide, or named (S)-oxiracetam, is provided, which is characterized by a powder x-ray diffraction pattern that exhibits data of d-values versus the relative intensities as: 7.075(M), 5.355(S), 5.092(S), 4.590(M), 4.325(M), 4.259(S), 4.041(VS), 3.808(M), 3.542(M), 3.445(M), 3.393(M), 2.972(M), 2.914(S). A method for preparing a crystal form I of (S)-oxiracetam is also provided, which includes preparing the crude product and crystallizing A use of the crystal form I of (S)-oxiracetam in the manufacture of a medicament for preventing and treating memory dysfunction is also provided. Accordingly, the crystal form I of (S)-oxiracetam prepared by the method has high purity of more than 99.3% based on the percentages of the mass, with better efficacy than (S)-oxiracetam for preventing or treating memory dysfunction. Concerning the way of charging materials, adding inorganic base only a few times is simpler and more beneficial to industrial manufacturing and application. | 03-07-2013 |
20130060049 | METHOD FOR PREPARING (S)-4-HYDROXY-2-OXO-1-PYRROLIDINE ACETAMIDE - A preparation method of (S)-4-hydroxy-2-oxo-1-pyrrolidine acetamide is provided, which includes the steps of preparing the crude product and crystallizing, wherein acetone and water are used as solvents in the step of crystallizing. The (S)-oxiracetam prepared by the method of the present invention has high purity of more than 99.3% and low impurity of 0-0.5%, based on the percentages of the mass. According to the method of the present invention, with regard to the way of charging materials, adding inorganic base only just a few times is easier to handle and more convenient to the industrial manufacturing and application. | 03-07-2013 |