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Nakaba
Nakaba Ichikawa, Yamanashi JP
| Patent application number | Description | Published |
|---|---|---|
| 20100293770 | METHOD FOR MANUFACTURING ACOUSTIC WAVE DEVICE - Provided is a method for manufacturing an acoustic wave device that has an excellent temperature coefficient of frequency (TCF) and high accuracy of IDT pattern forming and is capable of resisting high temperature processing of 200 degrees or more. The method for manufacturing an acoustic wave device according to the present invention includes forming an IDT ( | 11-25-2010 |
| 20100301700 | ACOUSTIC WAVE DEVICE AND METHOD FOR MANUFACTURING THE SAME - Provided are an acoustic wave device and a method for manufacturing the same, the acoustic wave device being effectively prevented from expanding and contracting due to temperature change and having a small frequency shift. The acoustic wave device of the present invention has a piezoelectric substrate ( | 12-02-2010 |
Nakaba Kaiwa, Tokyo JP
| Patent application number | Description | Published |
|---|---|---|
| 20100177588 | CALIBRATION CIRCUIT AND CALIBRATION METHOD - A calibration circuit includes replica buffers that have a substantially same circuit configuration as at least a part of an output buffer, an oscillator circuit that generates an internal clock in response to issuance of a calibration command, and a control circuit that controls an impedance of the replica buffers in synchronization with the internal clock. According to the present invention, because a calibration operation that does not depend on an external clock is performed, even when a frequency of the external clock is changed according to an operation mode or the like, it is possible to maintain a constant period of time given to a single adjustment step or a constant time required for a series of calibration operations. | 07-15-2010 |
| 20100188102 | SEMICONDUCTOR DEVICE - A semiconductor device includes a signal generating circuit that generates an impedance adjustment command signal which indicates at least one of initiation and termination of an impedance adjustment. The semiconductor device outputs an output signal in synchronism with the impedance adjustment command signal. | 07-29-2010 |
| 20100194204 | SEMICONDUCTOR DEVICE - A device includes a first circuit and an adjustment circuit. The adjustment circuit performs an adjustment on impedance of the first circuit. The adjustment circuit discontinues the adjustment on impedance while the first circuit is in an activated state. | 08-05-2010 |
| 20110066798 | Semiconductor device having calibration circuit that adjusts an impedance of output buffer and data processing system including the same - A calibration operation can be performed automatically at a semiconductor device without issuing a calibration command from a controller. Because a calibration operation is performed in response to a fact that the auto refresh command has been issued for a predetermined number of times, a periodical calibration operation can be secured and a read operation or a write operation is not requested from a controller during a calibration operation. | 03-17-2011 |
Nakaba Sato, Odawara JP
| Patent application number | Description | Published |
|---|---|---|
| 20110138160 | STORAGE APPARATUS AND ITS PROGRAM PROCESSING METHOD AND STORAGE CONTROLLER - Even if each processor core uses the same logical address, a processing-target program corresponding to each processor core can be selected. A logical address of multiple address mapping tables is set to a same logical address in correspondence with an embedded OS program or a RAID management program, and a physical address is set to a different physical address in correspondence with the actual storage destination of an embedded OS program or a RAID management program. Each processor core, on start-up, uses a self address mapping table to execute address mapping processing with each processor core based on the same logical address, selects an embedded OS program or a RAID management program according to the physical address obtained in the address mapping processing, and executes processing according to the selected program. | 06-09-2011 |
Nakaba Tamura, Novi, MI US
| Patent application number | Description | Published |
|---|---|---|
| 20080220163 | Supporting for an exhaust gas purification catalyst and production method - A metal oxide is synthesized in the pores of a porous catalyst base material by impregnating a raw material solution for synthesis of that metal oxide into those pores. At that time, mesh-like cracks are formed in the metal oxide support layer coated onto the inner surfaces of the pores by adjusting the solid portion concentration in the raw material solution for synthesizing the metal oxide to a suitable value. In addition, fine pores are formed in the metal oxide support layer obtained after firing by containing a polymer and so forth in the raw material solution for synthesizing the metal oxide. The presence of these mesh-like cracks and/or fine pores in the metal oxide support layer allow the obtaining of effects such as greater ease of diffusion of exhaust gas into this support layer. | 09-11-2008 |