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Muthukumar
Muthukumar Krithivasan, Cuddalore IN
| Patent application number | Description | Published |
|---|---|---|
| 20100114838 | PRODUCT RELIABILITY TRACKING AND NOTIFICATION SYSTEM AND METHOD - Methods and apparatus are provided for tracking product reliability. A product removal database having removal data stored therein that are associated with one or more products is periodically accessed at a user-specified periodicity. An aircraft flight-hours database having time-in-flight data stored therein that are associated with each product is periodically accessed at the user-specified periodicity. One or more user-selected algorithms are executed, using at least a portion of the periodically accessed removal data, to determine if the criterion for a user-specified reliability parameter is met or not. If it is determined that the criterion for the user-selected reliability parameter is not met, then an alert is transmitted to a preset destination. | 05-06-2010 |
Muthukumar Vairavan, San Jose, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20100238993 | AN INTEGRATED EQUALIZATION AND CDR ADAPTATION ENGINE WITH SINGLE ERROR MONITOR CIRCUIT - A data communications system and methods are disclosed. The system includes a transmitter for conveying a data signal filtered by a finite impulse response (FIR) filter to a receiver via a channel. The receiver equalizes the received data signal using a decision feedback equalizer (DFE) and the FIR. The receiver samples the data signal to determine an error signal and uses the error signal to adapt settings of a pre-cursor tap coefficient of the FIR, one or more post-cursor tap coefficients of the FIR, a phase of the recovered clock, and a coefficient of the DFE. To adapt the settings, the receiver determines the error signal based on an error sample taken from the data signal in a single clock cycle. To determine an error signal, the receiver samples the data signal at a phase estimated to correspond to a peak amplitude of a pulse response of the channel. | 09-23-2010 |
| 20110167297 | CLOCK-DATA-RECOVERY TECHNIQUE FOR HIGH-SPEED LINKS - A receiver circuit is described. In the receiver circuit, an analog-to-digital converter (ADC) generates first samples of a data signal based on a first clock signal, and a clock-data-recovery (CDR) error-detection circuit generates second samples of the data signal based on a second clock signal. In addition, the CDR error-detection circuit estimates intersymbol interference (ISI) at a current sample in the second samples from an adjacent, subsequent sample in the second samples. Based on the second samples and the estimated ISI, a CDR circuit generates the first clock signal and the second clock signal, which involves modifying the skews of either or both of these clock signals so that the current sample is associated with a zero crossing of a pulse response of a communication channel from which the data signal was received, thereby reducing or eliminating the ISI from the adjacent, subsequent sample. | 07-07-2011 |
Muthukumar Vallinayagam, Tenkasi IN
| Patent application number | Description | Published |
|---|---|---|
| 20110303035 | FINAL DRIVE FOR A WORK MACHINE - A final drive for a work machine includes a housing, a pinion gear, a first idler gear, a second idler gear, and a bull gear. The pinion gear is restrained within the housing. The first idler gear and the second idler gears are rotatably connected to the housing and positioned for engagement with the pinion gear. The bull gear is rotatably connected to the housing and positioned for engagement with the first idler gear and the second idler gear. The housing, the pinion gear, the first idler gear, and the second idler gear are configured to permit the pinion gear to float between the first idler gear, and the second idler to provide even sharing of the load from the pinion gear to the first idler gear and the second idler gear. | 12-15-2011 |