Patent application number | Description | Published |
20120067560 | HVAC SCHEDULE WITH DESIGNATED OFF PERIODS - An HVAC controller may include a user interface, along with a memory for storing a recurring programmable schedule having two or more time periods. The user interface may be configured to allow manual modification by a user of the recurring schedule stored in the memory, wherein the user can associate an HVAC-off control mode with any of the two or more time periods. In the HVAC-off control mode, the HVAC controller may not cycle the HVAC unit on regardless of the temperature of the air in the inside space. The HVAC controller further may include an output that is configured to issue operational commands to the HVAC unit in accordance with the programmable schedule. | 03-22-2012 |
20120067561 | REMOTE CONTROL OF AN HVAC SYSTEM THAT USES A COMMON TEMPERATURE SETPOINT FOR BOTH HEAT AND COOL MODES - An HVAC system includes an HVAC unit having a cooling mode and a heating mode for conditioning the air in an inside space, and a programmable thermostat located remotely from the HVAC unit. The HVAC unit may have an onboard controller configured to control when the HVAC unit is in the cooling mode or heating mode, and whether the HVAC unit is activated or not. In some cases, the onboard controller of the HVAC unit may use a common temperature setpoint when controlling in the cooling mode and the heating mode. The programmable thermostat may have a programmable schedule with a plurality of time periods, where each time period has a heating setpoint and a cooling setpoint separated by a dead band. The onboard controller of the HVAC unit may be configured to accept input signals from the remotely located thermostat. The remotely located thermostat may send one or more input signals to the onboard controller of the HVAC unit in accordance with the programmable schedule, where the one or more input signals cause the onboard controller of the HVAC unit to set the HVAC unit to a particular one of the cooling mode and the heating mode, and to activate the HVAC unit so as to condition the air in the inside space in the particular one of the cooling mode and the heating mode. | 03-22-2012 |
20150127176 | REMOTE CONTROL OF AN HVAC SYSTEM THAT USES A COMMON TEMPERATURE SETPOINT FOR BOTH HEAT AND COOL MODES - An HVAC system includes an HVAC unit having a cooling mode and a heating mode for conditioning the air in an inside space, and a programmable thermostat located remotely from the HVAC unit. The HVAC unit may have an onboard controller configured to control when the HVAC unit is in the cooling mode or heating mode, and whether the HVAC unit is activated or not. In some cases, the onboard controller of the HVAC unit may use a common temperature setpoint when controlling in the cooling mode and the heating mode. The programmable thermostat may have a programmable schedule with a plurality of time periods, where each time period has a heating setpoint and a cooling setpoint separated by a dead band. The onboard controller of the HVAC unit may be configured to accept input signals from the remotely located thermostat. The remotely located thermostat may send one or more input signals to the onboard controller of the HVAC unit in accordance with the programmable schedule, where the one or more input signals cause the onboard controller of the HVAC unit to set the HVAC unit to a particular one of the cooling mode and the heating mode, and to activate the HVAC unit so as to condition the air in the inside space in the particular one of the cooling mode and the heating mode. | 05-07-2015 |
Patent application number | Description | Published |
20110051538 | METHODS AND MEMORY DEVICES FOR REPAIRING MEMORY CELLS - Methods and memory devices for repairing memory cells are discloses, such as a memory device that includes a main array having a plurality of sections of memory cells. One such main array includes a plurality of sets of input/output lines, each of which may be coupled to a respective plurality of memory cells in each section. One such memory device also includes a redundant section of memory cells, corresponding in number to the number of memory cells in each of the sections of the main array. An addressing circuit may contain a record of, for example, sections that have been determined to be defective. The addressing circuit may receive an address and compare the received address with the record of defective sections. In the event of a match, the addressing circuit may redirect an access to memory cells corresponding to the received address to memory cells in the redundant section. | 03-03-2011 |
20120176851 | METHODS AND MEMORY DEVICES FOR REPAIRING MEMORY CELLS - Methods and memory devices for repairing memory cells are discloses, such as a memory device that includes a main array having a plurality of sections of memory cells. One such main array includes a plurality of sets of input/output lines, each of which may be coupled to a respective plurality of memory cells in each section. One such memory device also includes a redundant section of memory cells, corresponding in number to the number of memory cells in each of the sections of the main array. An addressing circuit may contain a record of, for example, sections that have been determined to be defective. The addressing circuit may receive an address and compare the received address with the record of defective sections. In the event of a match, the addressing circuit may redirect an access to memory cells corresponding to the received address to memory cells in the redundant section. | 07-12-2012 |
20140250341 | CIRCUITS, APPARATUSES, AND METHODS FOR ADDRESS SCRAMBLING - Circuits, apparatuses, and methods are disclosed for address scrambling in integrated circuits. One example apparatus includes a plurality of data regions, each of the plurality of data regions configured to provide a respective portion of data responsive to a physical address provided by a respective decode circuit. The plurality of data regions are configured to provide their respective portions of data responsive to a common logical address. The common logical address is scrambled such that a plurality of different physical addresses are provided to the plurality of data regions. | 09-04-2014 |