| Patent application number | Description | Published |
| 20100246714 | METHOD AND SYSTEM FOR CREST FACTOR REDUCTION - An apparatus and system are provided for crest factor reduction (CFR). Preferably, a peak from the wideband signal is detected. A gain from the magnitude of the peak and a threshold can then be calculated. Based on this information, each carrier's contribution to the peak can be approximated, and a cancellation pulse coefficient for each carrier from its contribution to the peak can be calculated. A base cancellation pulse can be calculated from the cancellation pulse coefficients for each carrier, and a cancellation pulse can be calculated from the base cancellation pulse and the gain, which can then be applied to the wideband signal. | 09-30-2010 |
| 20110090107 | TIME-INTERLEAVED-DUAL CHANNEL ADC WITH MISMATCH COMPENSATION - Previously, when designing receivers for radio frequency (RF) or wireless communications, designers chose between time-interleaved (TI) analog-to-digital converters (ADCs) for intermediate frequency architectures and dual channel ADCs for direct conversion architectures. Here, similarities between TI ADCs and dual channel ADC were recognized, and an ADC that has the capability of operating as a TI ADCs and dual channel ADC is provided. This allows designer to have greatly increased flexibility during the design process which can greatly reduce design costs, while also allowing the manufacturer of the ADC to realize a reduction in its operating costs. | 04-21-2011 |
| 20110135034 | Digital Pre-Distortion of Non-Linear Systems with Reduced Bandwidth Feedback - Embodiments of the invention provide a DPD system where the transmit reference signal is transformed, including sub-sampling, frequency translation, and the like, to match the feedback signal, which goes thru a similar transformation process, to obtain an error signal. The same transformation is applied to a system model, which may be Jacobian, Hessian, Gradient, or the like, in an adaptation algorithm to minimize error. | 06-09-2011 |
| Patent application number | Description | Published |
| 20080304463 | Reduced search space technique for codeword selection - A method of determining indicators for matrix codewords in a matrix codeword codebook, where the matrix codewords are adapted for communicating information between a transmitter and a receiver. The method includes providing a lookup table that is associated with multiple codewords that are associated with a codebook. The lookup table has m rows, and each row in the lookup table has a one-to-one correspondence with a codeword in the multiple codewords. Each row has p entries and each of the p entries holds a codeword indicator that identifies a codeword in the multiple codewords. The (i,j) | 12-11-2008 |
| 20080304464 | Low complexity precoding matrix selection - A method of determining indices for matrix codewords in a matrix codeword codebook. The matrix codewords are adapted for communicating information between a transmitter and a receiver. The method includes retrieving from temporary storage, an eigenmode representation for a communications channel, where the eigenmode representation is based upon on a received signal precoded by a first matrix codeword. The method also includes performing a test on multiple vector codewords to identify a first vector codeword among the multiple vector codewords, where the test includes determining a relationship between the first vector codeword and the representation of an eigenmode. The first vector codeword is associated with a first vector codeword index that identifies the first vector codeword. The method also includes generating a matrix codeword index associated with a second matrix codeword in the matrix codeword codebook. The matrix codeword index is based upon the first vector codeword index, and the order of the first vector codeword is different from the order of the second matrix codeword. | 12-11-2008 |
| 20100148865 | METHOD AND SYSTEM FOR CALCULATING THE PRE-INVERSE OF A NONLINEAR SYSTEM - An apparatus is provided to determine pre-distortion for a nonlinear system. The apparatus comprises a datapath and a power amplifier. The datapath employs predistortion data to generally linearized the power amplifier. To generate this predistortion data, an indirect learning circuit and a direct learning circuit can be employed. The indirect learning circuit is generally coupled to the amplifier circuit so that it can iteratively adjust predistortion data during an indirect learning mode until convergence is reached. The direct learning circuit is generally coupled to the amplifier circuit and the indirect learning circuit and that receives the input signal so that the predistortion data can be copied to the direct learning circuit from the indirect learning after convergence is reached and so that the direct learning circuit can adjust the predistortion data during a direct learning mode. | 06-17-2010 |
| 20100158155 | SYSTEM AND METHOD FOR TRAINING PRE-INVERSE OF NONLINEAR SYSTEM - A circuit for use with an amplification circuit having a predistortion datapath portion, a power amplifier portion and a gain portion. The predistortion datapath portion can output a predistorted signal based on the input signal. The power amplifier portion can output an amplified signal based on the predistorted signal. The gain portion can output a gain output signal based on the amplified signal. The circuit comprises a digital predistortion adaptation portion and a combiner. The digital predistortion adaptation portion can output a predistortion adaptation portion output signal. The combiner can output an error signal. The predistortion adaptation portion output signal is based on the input signal, the gain output signal and the error signal. The error signal is based on the difference between the predistorted signal and the predistortion adaptation portion output signal. | 06-24-2010 |
| 20110080216 | Systems and Methods of Power Amplifier Digital Pre-Distortion - Systems and methods for power amplifier pre-distortion are provided. The systems and methods of power amplifier digital pre-distortion disclosed herein may include a generic pre-distorter architecture which can implement a variety of Volterra cross terms involving single dimension convolutions (first order dynamics). For hardware implementations, this generic pre-distorter is further fine-tuned to provide a choice between different sets of cross terms that can be selected for a given PA for optimal performance. The novel pre-distorter architecture provides flexibility to trade off memory depth for additional Volterra terms and vice versa. A further novelty is the ability to trade off both memory depth and cross terms for a higher sample rate operation, which may enable higher order non-linear pre-distortion, or support for higher signal bandwidths. A poly-phase non-linear filtering mode allows for this flexibility. | 04-07-2011 |
| 20110080309 | BANDWIDTH MISMATCH ESTIMATION FOR TIME INTERLEAVED ADCS - With high speed, high resolution time-interleaved (TI) analog-to-digital converters (ADCs), bandwidth mismatches between the various ADC branches can pose a significant problem. Previously, though, no adequate solution has been found. Here, a method and apparatus are provided that can calculate and compensate for bandwidth mismatches in a TI ADC, enabling a high speed, high resolution TI ADC to be produced. | 04-07-2011 |