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| 20080302024 | Tunable impedance load-bearing structures - A tunable impedance load bearing structure includes a support comprising an active material configured for supporting a load, wherein the active material undergoes a change in a property upon exposure to an activating condition, wherein the change in the property is effective to change an impedance characteristic of the support. | 12-11-2008 |
| 20110061310 | TUNABLE IMPEDANCE LOAD-BEARING STRUCTURES - A tunable impedance load bearing structure includes a support comprising an active material configured for supporting a load, wherein the active material undergoes a change in a property upon exposure to an activating condition, wherein the change in the property is effective to change an impedance characteristic of the support. | 03-17-2011 |
| 20110181073 | PEDESTRIAN IMPACT MITIGATION SYSTEM AND METHOD OF USE - A system for and method of mitigating pedestrian impact utilizing an energy absorption member, such as an expandable honeycomb celled matrix, and at least one tether disposed within a recessed formation defined by the vehicle and interconnected to the member and a drive mechanism, wherein the member is selectively caused to extend and be spaced from an exterior surface. | 07-28-2011 |
| 20120098244 | METHODS OF PREVENTING OR REDUCING THE AFFECTS OF ROOF IMPACT IN AUTOMOTIVE APPLICATIONS - A method of autonomously preventing or reducing the affects of roof impact in automotive applications, including the steps of determining a vehicle condition indicative of an imminent roof impact, and modifying a vehicular seat or roof structure, or deploying a netting as a result thereof, wherein active material actuation is preferably utilized to effect the same. | 04-26-2012 |
| 20120161921 | TUNABLE IMPEDANCE LOAD-BEARING STRUCTURES - A tunable impedance load bearing structure includes a support comprising an active material configured for supporting a load, wherein the active material undergoes a change in a property upon exposure to an activating condition, wherein the change in the property is effective to change an impedance characteristic of the support. | 06-28-2012 |
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| 20120171970 | WIRELESS COMMUNICATIONS DEVICE WITH AN ADJUSTABLE IMPEDANCE MATCHING NETWORK AND ASSOCIATED METHODS - A mobile wireless communications device includes a portable housing, a transmitter carried by the portable housing and configured to modulate an input signal, and an adjustable impedance matching network coupled downstream from the transmitter. An antenna is coupled downstream from the adjustable impedance matching network, and a non-directional coupler is coupled between the adjustable impedance matching network and the antenna. A feedback receiver is coupled to the non-directional coupler to generate a feedback signal. A controller is configured to control the adjustable impedance matching network based upon the input signal and the feedback signal. | 07-05-2012 |
| 20120177157 | ELECTRONIC DEVICE INCLUDING VOLTAGE CONTROLLED OSCILLATOR PULLING COMPENSATION CIRCUIT AND RELATED METHODS - An electronic device includes an input configured to receive at least one baseband input signal and at least one mixer downstream from the input. The electronic device also includes a phase-locked loop (PLL) including a voltage controlled oscillator (VCO) and a phase detector coupled thereto, the VCO coupled to the at least one mixer. A power amplifier is downstream from the at least one mixer and generates at least one aggressing signal that would otherwise generate an output pull of the VCO. The electronic device also includes a VCO pulling compensation circuit coupled to the input and the VCO and configured to compensate the VCO for the output pull based upon the at least one baseband input signal and the at least one aggressing signal. | 07-12-2012 |
| 20120236959 | QUADRATURE COMMUNICATIONS DEVICE WITH I ANTENNAS AND Q ANTENNAS AND MODULATED POWER SUPPLY AND RELATED METHODS - A communications device may include an In-phase (I) power amplifier configured to generate an I amplified signal, a Quadrature (Q) power amplifier configured to generate a Q amplified signal, an I digital-to-analog converter (DAC) configured to generate an I signal, and a Q DAC configured to generate a Q signal. The communications device may also include an I power supply circuit coupled to the I power amplifier and to the I DAC and configured to cause the I power amplifier to modulate an I carrier signal into the I amplified signal based upon the I signal, a Q power supply circuit coupled to the Q power amplifier and to the Q DAC and configured to cause the Q power amplifier to modulate a Q carrier signal into the Q amplified signal based upon the Q signal, and at least one antenna coupled to the I and Q power amplifiers. | 09-20-2012 |
| 20120236960 | QUADRATURE COMMUNICATIONS DEVICE WITH I ANTENNAS AND Q ANTENNAS AND RELATED METHODS - A communications device may include In-phase (I) power amplifiers configured to respectively generate I amplified signals, Quadrature (Q) power amplifiers configured to respectively generate Q amplified signals, I antennas respectively coupled to the I power amplifiers, and Q antennas respectively coupled to the Q power amplifiers. The communications device may also include an I controller coupled to the I power amplifiers and configured to selectively enable some of the I power amplifiers, and a Q controller coupled to the Q power amplifiers and configured to selectively enable some of the Q power amplifiers. | 09-20-2012 |
| 20120236965 | QUADRATURE COMMUNICATIONS DEVICE WITH POWER COMBINER AND RELATED METHODS - A communications device may include In-phase (I) power amplifiers configured to generate I amplified signals, Quadrature (Q) power amplifiers configured to generate Q amplified signals, an I controller coupled to the I power amplifiers and configured to selectively enable some of the I power amplifiers, and a Q controller coupled to the Q power amplifiers and configured to selectively enable some of the Q power amplifiers. The communications device may also include a power combiner configured to combine the I amplified signals and the Q amplified signals in a combined amplified signal, and an antenna coupled to the power combiner. | 09-20-2012 |
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| 20090026492 | LATERAL JUNCTION BREAKDOWN TRIGGERED SILICON CONTROLLED RECTIFIER BASED ELECTROSTATIC DISCHARGE PROTECTION DEVICE - The components of a silicon controlled rectifier, which are a p-doped anode, an n-well middle region, a p-well middle region, and an n-doped cathode, are formed along sidewalls and a bottom surface of a shallow trench isolation structure. The p-doped anode and the n-doped cathode are formed directly underneath a top surface of a silicon substrate. A trigger mechanism that provides an instantaneous turn-on current to latch the silicon controlled rectifier to an on-state is also provided. The trigger mechanism provides a temporary surge in the voltage of the p-doped middle region, causing the instantaneous turn-on current to flow from the p-doped middle region to the n-doped cathode. Combined with the proximity of the p-doped anode to the n-doped cathode, the trigger mechanism provides a fast turn on and a short low resistance current path for the electrostatic discharge protection circuit. | 01-29-2009 |
| 20090231766 | ELETROSTATIC DISCHARGE (ESD) DEVICE AND METHOD OF FABRICATING - A structure and method of fabricating electrostatic discharge (EDS) circuitry in an integrated circuit chip by integrating a lateral bipolar, either a p-n-p with a NMOSFET or a n-p-n with a PMOSFET within a triple well. The lateral bipolar preferably includes diodes at the I/O and/or the VDDs of the circuitry. | 09-17-2009 |
| 20100181621 | SIGNAL AND POWER SUPPLY INTEGRATED ESD PROTECTION DEVICE - An integrated circuit, design structures and methods of forming the integrated circuit which includes a signal pad ESD coupled to an I/O signal pad and a power supply ESD coupled to a source VDD. The signal pad ESD and the power supply ESD are integrated in a single ESD structure. | 07-22-2010 |
| 20100246076 | Electrical Overstress Protection Circuit - A semiconductor circuit for electric overstress (EOS) protection is provided. The semiconductor circuit employs an electrostatic discharge (ESD) protection circuit, which has a resistor-capacitor (RC) time-delay network connected to a discharge capacitor. An electronic component that has voltage snapback property or a diodic behavior is connected to alter the logic state of the gate of the discharge transistor under an EOS event. Particularly, the electronic component is configured to turn on the gate of the discharge capacitor throughout the duration of an electrical overstress (EOS) condition as well as throughout the duration of an ESD event. A design structure may be employed to design or manufacture a semiconductor circuit that provides protection against an EOS condition without time limitation, i.e., without being limited by the time constant of the RC time delay network for EOS events that last longer than 1 microsecond. | 09-30-2010 |
| 20100265622 | ROBUST ESD PROTECTION CIRCUIT, METHOD AND DESIGN STRUCTURE FOR TOLERANT AND FAILSAFE DESIGNS - A robust ESD protection circuit, method and design structure for tolerant and failsafe designs are disclosed. A circuit includes a middle junction control circuit that turns off a top NFET of a stacked NFET electrostatic discharge (ESD) protection circuit during an ESD event. | 10-21-2010 |
| 20110286135 | Silicon Controlled Rectifier Based Electrostatic Discharge Protection Circuit With Integrated JFETS, Method Of Operation And Design Structure - An enhanced turn-on time SCR based electrostatic discharge (ESD) protection circuit includes an integrated JFET, method of use and design structure. The enhanced turn-on time silicon controlled rectifier (SCR) based electrostatic discharge (ESD) protection circuit includes an integrated JFET in series with an NPN base. | 11-24-2011 |
| 20120043583 | LOW LEAKAGE, LOW CAPACITANCE ELECTROSTATIC DISCHARGE (ESD) SILICON CONTROLLED RECITIFER (SCR), METHODS OF MANUFACTURE AND DESIGN STRUCTURE - A low leakage, low capacitance diode based triggered electrostatic discharge (ESD) silicon controlled rectifiers (SCR), methods of manufacture and design structure are provided. The method includes providing a silicon film on an insulator layer. The method further includes forming isolation regions which extend from an upper side of the silicon layer to the insulator layer. The method further includes forming one or more diodes in the silicon layer, including a p+ region and an n+ region formed in a well bordered by the isolation regions. The isolation regions isolate the one or more diodes in a vertical direction and the insulator layer isolates the one or more diodes from an underlying P or N type substrate, in a horizontal direction. | 02-23-2012 |
| 20120091530 | Low trigger voltage electrostatic discharge NFET in triple well CMOS technology - An electrostatic discharge (ESD) protection device for an integrated circuit includes a buried layer of a first polarity type formed in a substrate of a second polarity type. A well region of the second polarity type is formed above the buried layer. An FET of the first polarity type is formed within the well region. An inner pair of shallow wells of the first polarity type is disposed adjacent to source and drain diffusion regions of the FET, the inner pair of shallow wells having a depth such that a bottom of the inner pair of shallow wells is above a top of the buried layer. An outer pair of deep wells of the first polarity type extends down to the top of the buried layer such that the outer pair of deep wells and the buried layer define a perimeter of the well region of the second polarity type. | 04-19-2012 |
| 20120126285 | Vertical NPNP Structure In a Triple Well CMOS Process - A vertical NPNP structure fabricated using a triple well CMOS process, as well as methods of making the vertical NPNP structure, methods of providing electrostatic discharge (ESD) protection, and design structures for a BiCMOS integrated circuit. The vertical NPNP structure may be used to provide on-chip protection to an input/output (I/O) pad from negative-voltage ESD events. A vertical PNPN structure may be also used to protect the same I/O pad from positive-voltage ESD events. | 05-24-2012 |
| 20120250195 | ELECTROSTATIC DISCHARGE POWER CLAMP WITH A JFET BASED RC TRIGGER CIRCUIT - An ESD power clamp circuit and method of ESD protection. The ESD power clamp circuit includes: a power clamp device coupled to a resistive/capacitive (RC) network, the RC network including a capacitor as the capacitive element of the RC network and one or more junction field effect transistors (JFETs) configured as variable resistors as the resistive element of the RC network. | 10-04-2012 |
| 20120305984 | SCR/MOS CLAMP FOR ESD PROTECTION OF INTEGRATED CIRCUITS - An electrostatic discharge (ESD) protection circuit, methods of fabricating an ESD protection circuit, methods of providing ESD protection, and design structures for an ESD protection circuit. An NFET may be formed in a p-well and a PFET may be formed in an n-well. A butted p-n junction formed between the p-well and n-well results in an NPNP structure that forms an SCR integrated with the NFET and PFET. The NFET, PFET and SCR are configured to collectively protect a pad, such as a power pad, from ESD events. During normal operation, the NFET, PFET, and SCR are biased by an RC-trigger circuit so that the ESD protection circuit is in a high impedance state. During an ESD event while the chip is unpowered, the RC-trigger circuit outputs trigger signals that cause the SCR, NFET, and PFET to enter into conductive states and cooperatively to shunt ESD currents away from the protected pad. | 12-06-2012 |
| 20130009207 | VERTICAL NPNP STRUCTURE IN A TRIPLE WELL CMOS PROCESS - A vertical NPNP structure fabricated using a triple well CMOS process, as well as methods of making the vertical NPNP structure, methods of providing electrostatic discharge (ESD) protection, and design structures for a BiCMOS integrated circuit. The vertical NPNP structure may be used to provide on-chip protection to an input/output (I/O) pad from negative-voltage ESD events. A vertical PNPN structure may be also used to protect the same I/O pad from positive-voltage ESD events. | 01-10-2013 |
| 20130020645 | ESD FIELD-EFFECT TRANSISTOR AND INTEGRATED DIFFUSION RESISTOR - An electrostatic discharge protection device, methods of fabricating an electrostatic discharge protection device, and design structures for an electrostatic discharge protection device. A drain of a first field-effect transistor and a diffusion resistor of higher electrical resistance may be formed as different portions of a doped region. The diffusion resistor, which is directly coupled with the drain of the first field-effect transistor, may be defined using an isolation region of dielectric material disposed in the doped region and selective silicide formation. The electrostatic discharge protection device may also include a second field-effect transistor having a drain as a portion the doped region that is directly coupled with the diffusion resistor and indirectly coupled by the diffusion resistor with the drain of the first field-effect transistor. | 01-24-2013 |
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| 20080318905 | Prodrugs and methods of making and using the same - Prodrugs of parent drugs and methods of making and using the same are described. The prodrugs comprise an amine-containing parent drug moiety and a prodrug moiety, such as methoxyphosphonic acid or ethoxyphosphonic acid. The prodrugs may be employed in therapy for the treatment of various indications, such as pain, and in methods of decreasing the abuse potential of abuse-prone drugs and/or delaying the onset of parent drug activity and/or prolonging parent drug activity as compared to administration of a parent drug. | 12-25-2008 |
| 20100269858 | COMPOSITIONS AND KITS FOR THE REMOVAL OF IRRITATING COMPOUNDS FROM BODILY SURFACES - The invention provides compositions, methods and kits for the removal of harmful or irritating substances from bodily surfaces. Kits may include a composition containing capsaicin and a capsaicin-cleansing composition, e.g., a composition in which capsaicin is soluble. | 10-28-2010 |
| 20110184069 | METHODS AND COMPOSITIONS FOR ADMINISTRATION OF TRPV1 AGONISTS - Compositions are provided that contain a TRPV1 agonist, such as capsaicin, and a solvent system. Topical application of the composition results in rapid delivery of agonist to the dermis and epidermis. Method of using the compositions for reducing nociceptive nerve fiber function in subjects, and for treatment of capsaicin-responsive conditions are also provided. | 07-28-2011 |
| 20110196043 | METHODS AND COMPOSITIONS FOR ADMINISTRATION OF TRPV1 AGONISTS - Compositions are provided that contain a TRPV1 agonist, such as capsaicin, and a solvent system. Topical application of the composition results in rapid delivery of agonist to the dermis and epidermis. Method of using the compositions for reducing nociceptive nerve fiber function in subjects, and for treatment of capsaicin-responsive conditions are also provided. | 08-11-2011 |
| 20110212926 | WATER-SOLUBLE ACETAMINOPHEN ANALOGS - The present invention provides water-soluble acetaminophen prodrugs and formulations which may be suitable for parenteral administration. Methods of treating a disease or condition responsive to acetaminophen (such as fever and/or pain) using the acetaminophen prodrugs, as well as kits, unit dosages, and combinations with additional pharmaceutical agent(s) are also provided. | 09-01-2011 |
| 20110212927 | CARBONATE PRODRUGS AND METHODS OF USING THE SAME - The present invention provides carbonate prodrugs which comprise a carbonic phosphoric anhydride prodrug moiety attached to the hydroxyl or carboxyl group of a parent drug moiety. The prodrugs may provide improved physicochemical properties over the parent drug. Also provided are methods of treating a disease or condition that is responsive to the parent drug using the carbonate prodrugs, as well as kits and unit dosages. | 09-01-2011 |
| 20110263545 | HEPATOPROTECTANT ACETAMINOPHEN MUTUAL PRODRUGS - The present invention provides hepatoprotectant acetaminophen mutual prodrugs, which have an acetaminophen moiety covalently linked to a second moiety that may act as a hepatoprotectant against acetaminophen hepatotoxicity. Additionally, acetaminophen mutual prodrugs may have improved water solubility which may provide better suitability for parenteral and other dosage forms relative to administration of acetaminophen. Also provided are methods of treating a disease or condition that is responsive to acetaminophen (such as fever, pain and ischemic injury) using hepatoprotectant acetaminophen mutual prodrugs, as well as kits and unit dosages. | 10-27-2011 |
| 20120309836 | METHODS AND COMPOSITIONS FOR ADMINISTRATION OF TRPV1 AGONISTS - Compositions are provided that contain a TRPV1 agonist, such as capsaicin, and a solvent system. Topical application of the composition results in rapid delivery of agonist to the dermis and epidermis. Method of using the compositions for reducing nociceptive nerve fiber function in subjects, and for treatment of capsaicin-responsive conditions are also provided. | 12-06-2012 |
| 20120323258 | COMPOSITIONS AND KITS FOR THE REMOVAL OF IRRITATING COMPOUNDS FROM BODILY SURFACES - The invention provides compositions, methods and kits for the removal of harmful or irritating substances from bodily surfaces. Kits may include a composition containing capsaicin and a capsaicin-cleansing composition, e.g., a composition in which capsaicin is soluble. | 12-20-2012 |
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| 20090306666 | INTRAMEDULLARY NAIL WITH OBLIQUE OPENINGS - An intramedullary nail for use in a medullary canal of a long bone is provided. The nail includes a body defining a longitudinal axis of the body and an external periphery of the body for fitting in the medullary canal of the long bone. The body has a first internal wall thereof defining a first opening through the body. The first opening defines a first opening centerline. The body has a second internal wall of the body defining a second opening through the body. The second opening defines a second opening centerline. The first opening centerline and the second opening centerline are oblique with respect to each other. The longitudinal axis of the body and the first opening centerline form an acute angle between the longitudinal axis of the body and the first opening centerline. The longitudinal axis of the body and the second opening centerline forming an acute angle between the longitudinal axis of the body and the second opening centerline. | 12-10-2009 |
| 20120259420 | PROXIMAL TRIAL INSTRUMENT FOR USE DURING AN ORTHOPAEDIC SURGICAL PROCEDURE TO IMPLANT A REVISION HIP PROSTHESIS - A modular femoral prosthesis for use during performance of a hip revision procedure includes a proximal body component, a distal stem component, and a locking bolt. Surgical instruments and methods for use in implanting such a modular femoral prosthesis are disclosed. | 10-11-2012 |
| 20120259421 | VERSION-REPLICATING INSTRUMENT AND ORTHOPAEDIC SURGICAL PROCEDURE FOR USING THE SAME TO IMPLANT A REVISION HIP PROSTHESIS - A modular femoral prosthesis for use during performance of a hip revision procedure includes a proximal body component, a distal stem component, and a locking bolt. Surgical instruments and methods for use in implanting such a modular femoral prosthesis are disclosed. | 10-11-2012 |
| 20120259423 | ORTHOPAEDIC SURGICAL PROCEDURE FOR IMPLANTING A REVISION HIP PROSTHESIS - A modular femoral prosthesis for use during performance of a hip revision procedure includes a proximal body component, a distal stem component, and a locking bolt. Surgical instruments and methods for use in implanting such a modular femoral prosthesis are disclosed. | 10-11-2012 |
| 20120259424 | REVISION HIP PROSTHESIS HAVING AN IMPLANTABLE DISTAL STEM COMPONENT - A modular femoral prosthesis for use during performance of a hip revision procedure includes a proximal body component, a distal stem component, and a locking bolt. Surgical instruments and methods for use in implanting such a modular femoral prosthesis are disclosed. | 10-11-2012 |
