Patent application number | Description | Published |
20100050177 | Method and apparatus for content based searching - The scheduling of multiple request to be processed by a number of deterministic finite automata-based graph thread engine (DTE) workstations is processed by a novel scheduler. The scheduler may select an entry from an instruction in a content search apparatus. Using attribute information from the selected entry, the scheduler may thereafter analyze a dynamic scheduling table to obtain placement information. The scheduler may determine an assignment of the entry, using the placement information, that may limit cache thrashing and head of line blocking occurrences. Each DTE workstation may including normalization capabilities. Additionally, the content searching apparatus may employ an address memory scheme that may prevent memory bottle neck issues. | 02-25-2010 |
20110271277 | METHOD AND APPARATUS FOR A VIRTUAL SYSTEM ON CHIP - A virtual system on chip (VSoC) is an implementation of a machine that allows for sharing of underlying physical machine resources between different virtual systems. A method or corresponding apparatus of the present invention relates to a device that includes a plurality of virtual systems on chip and a configuring unit. The configuring unit is arranged to configure resources on the device for the plurality of virtual systems on chip as a function of an identification tag assigned to each virtual system on chip. | 11-03-2011 |
20130019105 | SECURE SOFTWARE AND HARDWARE ASSOCIATION TECHNIQUEAANM Hussain; Muhammad RaghibAACI SaratogaAAST CAAACO USAAGP Hussain; Muhammad Raghib Saratoga CA US - Authenticated hardware and authenticated software are cryptographically associated using symmetric and asymmetric cryptography. Cryptographically binding the hardware and software ensures that original equipment manufacturer (OEM) hardware will only run OEM software. Cryptographically binding the hardware and software protects the OEM binary code so it will only run on the OEM hardware and cannot be replicated or altered to operate on unauthorized hardware. In one embodiment, critical security information associated with the equipment is loaded from a memory at startup time. The critical security information is stored in the memory, in encrypted form, using a unique secret value. The secret value is used to retrieve a chip encryption key and one or more image authentication keys that can be used to associate program code with an original equipment manufacturer. These keys are used to authenticate the program code. | 01-17-2013 |
20130254906 | Hardware and Software Association and Authentication - Authentication and association of hardware and software is accomplished by loading a secure code from an external memory at startup time and authenticating the program code using an authentication key. Access to full hardware and software functionality may be obtained upon authentication of the secure code. However, if the authentication of the secure code fails, an unsecure code that provides limited functionality to hardware and software resources is executed. | 09-26-2013 |
20140269281 | Apparatus and Method for Providing Sort Offload - An apparatus includes a core processor and a hardware based sort coprocessor. In one embodiment, the core processor is able to generate an input array. The hardware based sort coprocessor is configured to sort the input array in accordance with a metric and flag of each element to be sorted in the input array and generate a sorted array. | 09-18-2014 |
20140269529 | Apparatus and Method for Media Access Control Scheduling with a Sort Hardware Coprocessor - An apparatus includes a Media Access Control (MAC) scheduler to generate a sort request. A hardware based sort coprocessor services the sort request in accordance with specified packet processing priority parameters to generate a sorted array. | 09-18-2014 |
20140269530 | Apparatus and Method for Media Access Control Scheduling with a Priority Calculation Hardware Coprocessor - An apparatus includes a Media Access Control (MAC) scheduler to generate a priority value calculation request with a specified formula and a list of metrics. A hardware based priority value calculation coprocessor services the priority value calculation request in accordance with the specified formula and the list of metrics. | 09-18-2014 |
20140324900 | Intelligent Graph Walking - An apparatus, and corresponding method, for performing a search for a match of at least one expression in an input stream is presented. A graph including a number of interconnected nodes is generated. A compiler may assign at least one starting node and at least one ending node. The starting node includes a location table with node position information of an ending node and a sub-string value associated with the ending node. Using the node position information and a string comparison function, intermediate nodes located between the starting and ending nodes may be bypassed. The node bypassing may reduce the number of memory accesses required to read the graph. | 10-30-2014 |
20140344585 | Secure Software And Hardware Association Technique - Authenticated hardware and authenticated software are cryptographically associated using symmetric and asymmetric cryptography. Cryptographically binding the hardware and software ensures that original equipment manufacturer (OEM) hardware will only run OEM software. Cryptographically binding the hardware and software protects the OEM binary code so it will only run on the OEM hardware and cannot be replicated or altered to operate on unauthorized hardware. In one embodiment, critical security information associated with the equipment is loaded from a memory at startup time. The critical security information is stored in the memory, in encrypted form, using a unique secret value. The secret value is used to retrieve a chip encryption key and one or more image authentication keys that can be used to associate program code with an original equipment manufacturer. These keys are used to authenticate the program code. | 11-20-2014 |
20140359621 | Method and Apparatus for a Virtual System on Chip - A virtual system on chip (VSoC) is an implementation of a machine that allows for sharing of underlying physical machine resources between different virtual systems. A method or corresponding apparatus of the present invention relates to a device that includes a plurality of virtual systems on chip and a configuring unit. The configuring unit is arranged to configure resources on the device for the plurality of virtual systems on chip as a function of an identification tag assigned to each virtual system on chip. | 12-04-2014 |
20140359622 | Method and Apparatus for a Virtual System on Chip - A virtual system on chip (VSoC) is an implementation of a machine that allows for sharing of underlying physical machine resources between different virtual systems. A method or corresponding apparatus of the present invention relates to a method that includes a plurality of virtual systems on chip and a configuring unit. The configuring unit is arranged to configure resources on the method for the plurality of virtual systems on chip as a function of an identification tag assigned to each virtual system on chip. | 12-04-2014 |
20150033222 | Network Interface Card with Virtual Switch and Traffic Flow Policy Enforcement - A system includes a host computer executing virtual machines under the control of a hypervisor. A network interface card is coupled to the host machine. The network interface card implements a virtual switch with virtual ports. Each (one or more) virtual port is associated with a virtual machine. The network interface card may operate as a co-processor for the host computer by managing selected traffic flow policies, such as QoS and bandwidth provisioning on a per virtual machine basis. | 01-29-2015 |
20150085868 | Semiconductor with Virtualized Computation and Switch Resources - A semiconductor substrate has a processor configurable to support execution of a hypervisor controlling a set of virtual machines and a physical switch configurable to establish virtual ports to the set of virtual machines. | 03-26-2015 |