Patent application number | Description | Published |
20100041275 | Matched-Impedance Connector Footprints - Disclosed are methodologies for defining matched-impedance footprints on a substrate such as a printed circuit board, for example, that is adapted to receive an electrical component having an arrangement of terminal leads. Such a footprint may include an arrangement of electrically-conductive pads and an arrangement of electrically-conductive vias. The via arrangement may differ from the pad arrangement. The vias may be arranged to increase routing density, while limiting cross-talk and providing for matched impedance between the component and the substrate. The via arrangement may be altered to achieve a desired routing density on a layer of the board. Increasing the routing density may decrease the number of board layers, which tends to decrease capacitance and thereby increase impedance. Ground vias and signal vias may be arranged with respect to one another in such a manner as to affect impedance. Thus, the via arrangement may be altered to achieve an impedance that matches the impedance of the component. The via arrangement may be also be altered to limit cross-talk among neighboring signal conductors. Thus, the via arrangement may be defined to balance the impedance, cross-talk, and routing density requirements of the system. | 02-18-2010 |
20100048043 | Matched-Impedance Connector Footprints - Disclosed are methodologies for defining matched-impedance footprints on a substrate such as a printed circuit board, for example, that is adapted to receive an electrical component having an arrangement of terminal leads. Such a footprint may include an arrangement of electrically-conductive pads and an arrangement of electrically-conductive vias. The via arrangement may differ from the pad arrangement. The vias may be arranged to increase routing density, while limiting cross-talk and providing for matched impedance between the component and the substrate. The via arrangement may be altered to achieve a desired routing density on a layer of the board. Increasing the routing density may decrease the number of board layers, which tends to decrease capacitance and thereby increase impedance. Ground vias and signal vias may be arranged with respect to one another in such a manner as to affect impedance. Thus, the via arrangement may be altered to achieve an impedance that matches the impedance of the component. The via arrangement may be also be altered to limit cross-talk among neighboring signal conductors. Thus, the via arrangement may be defined to balance the impedance, cross-talk, and routing density requirements of the system. | 02-25-2010 |
Patent application number | Description | Published |
20090124101 | ELECTRICAL CONNECTOR SYSTEM WITH JOGGED CONTACT TAILS - Connector systems include electrical connectors orthogonally connected to each other through shared through-holes in a midplane. An orthogonal vertical connector includes jogged contacts to offset for or equalize the different length contacts in the right-angle connector to which the vertical connector is connected. A first contact in the right angle connector may mate with a first contact in the vertical connector. A second contact in the right angle connector may mate with a second contact in the vertical connector. The first contact in the right angle connector may be greater in length than the adjacent second contact of the right angle connector. Thus, the second contact of the vertical connector may be jogged by the distance to increase the length of the second contact by the distance. | 05-14-2009 |
20090149041 | Orthogonal Backplane Connector - An orthogonal backplane connector systems having midplane footprints that provide for continuity of impedance and signal integrity through the midplane and allow for the same connector to be coupled to either side of the midplane. This design creates an orthogonal interconnect without taking up unnecessary PCB real estate. The midplane circuit board may include a first differential signal pair of electrically conductive vias disposed in a first direction, and a second differential signal pair of electrically conductive vias disposed in a second direction that is generally orthogonal to the first direction. The first and second differential signal pair of electrically conductive vias are electrically connected through the midplane circuit board. Each pair may be associated with and be located in between ground vias. A ground via that is large relative to the signal vias may be provided. The second signal vias may comprise a shared signal via, receiving a contact from respective connectors connected to each side of the midplane circuit board. The second signal vias may comprise partial signal vias, extending from one or more sides partially into the midplane circuit board. The signal pairs may be offset from a via array centerline formed by the ground vias to correspond with mating ends of signal contacts of an electrical connector that likewise jog away from a centerline of a respective contact column of the connector. | 06-11-2009 |
20100041256 | Matched-Impedance Connector Footprints - Disclosed are methodologies for defining matched-impedance footprints on a substrate such as a printed circuit board, for example, that is adapted to receive an electrical component having an arrangement of terminal leads. Such a footprint may include an arrangement of electrically-conductive pads and an arrangement of electrically-conductive vias. The via arrangement may differ from the pad arrangement. The vias may be arranged to increase routing density, while limiting cross-talk and providing for matched impedance between the component and the substrate. The via arrangement may be altered to achieve a desired routing density on a layer of the board. Increasing the routing density may decrease the number of board layers, which tends to decrease capacitance and thereby increase impedance. Ground vias and signal vias may be arranged with respect to one another in such a manner as to affect impedance. Thus, the via arrangement may be altered to achieve an impedance that matches the impedance of the component. The via arrangement may be also be altered to limit cross-talk among neighboring signal conductors. Thus, the via arrangement may be defined to balance the impedance, cross-talk, and routing density requirements of the system. | 02-18-2010 |