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Morifuji, JP

Eiji Morifuji, Yokohama-Shi JP

Patent application numberDescriptionPublished
20090146310SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor device subjected to an optical annealing process by radiation light whose principal wavelength is 1.5 μm or less includes a circuit pattern region formed on a semiconductor substrate, and a dummy pattern region formed separately from the circuit pattern region on the semiconductor substrate. The circuit pattern region has an integrated circuit pattern containing a gate pattern related to a circuit operation. The dummy pattern region has dummy gate patterns that have the same structure as that of a gate pattern used in the integrated circuit pattern and the dummy gate patterns are repeatedly arranged with a pitch 0.4 times or less the principal wavelength.06-11-2009

Eiji Morifuji, Kanagawa JP

Patent application numberDescriptionPublished
20090289302SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device 11-26-2009

Masashi Morifuji, Saitama JP

Patent application numberDescriptionPublished
20090124560Composition Containing Peptide as Active Ingredient - The invention provides a composition used for promoting glucose uptake, which comprises a peptide having an effect of promoting glucose uptake as the active ingredient, as well as a composition comprising a dipeptide containing leucine and/or isoleucine as the active ingredient. The composition is effective in preventing or treating diabetes mellitus or an elevation of blood glucose level, in promoting glycogen storage, or in enhancing physical strength, enhancing athletic ability, improving endurance performance or relieving fatigue.05-14-2009

Masato Morifuji, Hyogo JP

Nobuhiko Morifuji, Okazaki-Shi JP

Patent application numberDescriptionPublished
20110098896AUTOMATIC TRANSMISSION AND PROTECTION METHOD THEREOF - When temperature increase promotion processing (for example, prohibiting lockup application and prohibiting shifts to a high gear position) is started while an initial value of an ATF temperature is in a low temperature region, an ATCU determines whether to terminate the temperature increase promotion processing on the basis of a current ATF temperature, and when the temperature increase promotion processing is started while the initial value of the ATF temperature is in an extremely low temperature region, the ATCU determines whether to terminate the temperature increase promotion processing on the basis of a duration of the temperature increase promotion processing. When the temperature increase promotion processing is determined to be complete, the ATCU terminates the temperature increase promotion processing.04-28-2011

Tadahiro Morifuji, Kyoto JP

Patent application numberDescriptionPublished
20090127705Semiconductor chip, method of manufacturing semiconductor chip, and semiconductor device - There are provided a semiconductor device capable of accurately determining whether a semiconductor chip is bonded to a solid-state device such as the other semiconductor chip parallelly with each other, a semiconductor chip used for the semiconductor device, and a method of manufacturing the semiconductor chip. The semiconductor chip includes a functional bump projected with a first projection amount from the surface of the semiconductor chip and electrically connecting the semiconductor chip to the solid-state device, and a connection confirmation bump projected with a second projection amount, which is smaller than the first projection amount, from the surface of the semiconductor chip and used for confirming the state of the electrical connection by the functional bump.05-21-2009
20100187685SEMICONDUCTOR DEVICE - Disclosed is a semiconductor device suppressed in decrease of reliability. The semiconductor device comprises an electrode pad portion (07-29-2010
20110074017METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE AND MULTILAYER WAFER STRUCTURE - Grooves are formed on the front surfaces of first and second semiconductor wafers each including an aggregate of a plurality of semiconductor chips. The grooves each extend on a dicing line set between the semiconductor chips and to have a larger width than the dicing line. Thereafter the first and second semiconductor wafers are arranged so that the front surfaces thereof are opposed to each other, and the space between the first semiconductor wafer and the second semiconductor wafer is sealed with underfill. Thereafter the rear surfaces of the first and second semiconductor wafers are polished until at least the grooves are exposed, and a structure including the first and second semiconductor wafers and the underfill is cut on the dicing line.03-31-2011

Patent applications by Tadahiro Morifuji, Kyoto JP

Takafumi Morifuji, Tokyo JP

Patent application numberDescriptionPublished
20090136146IMAGE PROCESSING DEVICE AND METHOD, PROGRAM, AND RECORDING MEDIUM - The present invention relates to an image processing device and method, a program, and a recording medium whereby the detection precision of a motion vector by the gradient method can be further improved. A counter value computing unit 05-28-2009
20090167959IMAGE PROCESSING DEVICE AND METHOD, PROGRAM, AND RECORDING MEDIUM - The present invention relates to an image processing device and method, a program, and a recording medium whereby the evaluation regarding the reliability of a motion vector can be performed even in the case of an average brightness level between frames changing greatly. On a frame t+1, a block B07-02-2009
20090213937Image processing apparatus and method, program, and recording medium - A compensation allocation unit performs allocation compensation of a motion vector to a pixel to which a motion vector is not allocated by a victor allocation unit. A C/UC area determination unit compares magnitudes of a present DFD, a past DFD, and a future DFD based on a background vector and a DFD based on a compensation allocation vector by an evaluation value calculation unit to determine an area of a target pixel. Regarding the target pixel determined as the pixel in a covered area or an uncovered area, an interpolation method decision unit decides a computation method for a pixel value through which one of a double-sided interpolation and a one-sided interpolation. An interpolation frame generation unit computes the target pixel of the pixel value of the interpolation frame through the method decided by the interpolation method decision unit.08-27-2009
20100128171SIGNAL PROCESSING APPARATUS AND METHOD, PROGRAM, AND RECORDING MEDIUM - The present invention relates to a signal processing device and method, a program, and a recording medium configured so as to be able to detect 2-3 pulldown sequences, from various types of input, in a precise manner. A state estimation unit 05-27-2010

Patent applications by Takafumi Morifuji, Tokyo JP

Togo Morifuji, Tottori-Shi JP

Patent application numberDescriptionPublished
20090046230LIQUID CRYSTAL DISPLAY DEVICE - A liquid crystal display device includes a pair of substrates opposing each other, a liquid crystal layer disposed between the pair of substrates, and a pair of electrodes separated by an insulating layer, disposed on one of the substrates The pair of electrodes drives the liquid crystal layer. The insulating layer has a compressive stress in the range of 0 to 5×1002-19-2009