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Moosung Kim

Moosung Kim, Yongin-Si KR

Patent application numberDescriptionPublished
20090316491NON-VOLATILE MEMORY DEVICES AND METHODS OF ERASING NON-VOLATILE MEMORY DEVICES - In one embodiment, an erase method for a memory including a memory array having at least first and second programmable transistors connected in series, includes restricting flow of electrons from the first programmable transistor into the second programmable transistor during an erase operation.12-24-2009
20100097863Method of programming non-volatile memory device and non-volatile memory device using the same - A program method of a nonvolatile memory device according to example embodiments includes a operation (a) of detecting a level of a program voltage; and a operation (b) of providing a unselected word line voltage and a bit line precharge voltage having a variable level respectively according to the detected level of the program voltage.04-22-2010
20110051520NONVOLATILE MEMORY DEVICE, DRIVING METHOD THEREOF, AND MEMORY SYSTEM HAVING THE SAME - A nonvolatile memory device (NVM), memory system and apparatus include control logic configured to perform a method of applying negative voltage on a selected wordline of the NVM. During a first time a first high voltage level is applied to the channel of a transistor of a address decoder and a ground voltage is applied to the well of the transistor. And, during a second time a second high voltage level is applied to the channel of the transistor, and within the second time interval a first negative voltage is applied to the well of the transistor. The first high voltage level is higher than the second high voltage level, and a voltage applied on the selected wordline is negative within the second time interval.03-03-2011
20110096602NONVOLATILE MEMORY DEVICES OPERABLE USING NEGATIVE BIAS VOLTAGES AND RELATED METHODS OF OPERATION - A nonvolatile memory device includes a first address decoder and a second address decoder. The first address decoder includes a plurality of transistors disposed in a first well, and the second address decoder includes a plurality of transistors disposed in a second well that is electrically isolated from the first well. The first and second address decoders are associated with first and second memory blocks, respectively. A switch circuit is configured to provide a negative voltage to one of the first address decoder and the second address decoder on the basis of block address information that specifies an address included in one of the first memory block and the second memory block. Related methods of operation are also discussed.04-28-2011

Patent applications by Moosung Kim, Yongin-Si KR

Moosung Kim, Gyeonggi-Do KR

Patent application numberDescriptionPublished
20100110793Flash Memory Device and Memory System Including the Same - Provided is a flash memory device. The flash memory device includes a memory cell array, and a voltage generator. The memory cell array is connected to a plurality of word lines. The voltage generator generates a program voltage which is supplied to a selected word line of the word lines and a pass voltage which is supplied to a non-selected word line of the word lines, in a program operation. The voltage generator varies a level of the pass voltage with a temperature.05-06-2010

Moosung Kim, Seoul KR

Patent application numberDescriptionPublished
20100058211MOBILE TERMINAL AND METHOD OF PROVIDING USER INTERFACE USING THE SAME - A mobile terminal including a display configured to display a graphical user interface, a user identification unit configured to connect at least first and second user identification modules to the mobile terminal, in which the first and second user identification modules include first and second telephone numbers, respectively, a memory configured to store at least first and second user interface information respectively corresponding to the first and second user identification modules, respectively, and a controller configured to control the display to display the graphical user interface using the first user interface information when the first user identification module is used and to display the graphical user interface using the second user interface information when the second user identification module is used.03-04-2010
20100060595MOBILE TERMINAL AND METHOD OF SWITCHING IDENTITY MODULE THEREIN - A mobile terminal includes a plurality of identity modules, a touch screen configured to display a list including a plurality of service items, the list indicating an assigned identity module, of the plurality of identity modules, for each of the plurality of service items, and a controller configured to switch the assigned identity module of a first service item of the plurality of service items to a different one of the plurality of identity modules responsive to a first touch input that is associated with the first service item.03-11-2010
20100069003MOBILE TERMINAL AND METHOD OF SWITCHING IDENTITY MODULES - A mobile terminal includes a first and a second identity module in which user information is stored. A first controller for controlling wireless communication based on user information is connected to either the first or the second identity module. A second controller for controlling wireless communication through a second wireless communication unit is connected to the other identity module. An switch connects one of the first or second identity modules to one of the first or second controllers, and optionally, connects the other identity module to the other controller responsive to a manual command or a service event such as a multimedia message, a short-range communication, a wireless Internet connection, a broadcast reception, or receipt of position information.03-18-2010

Moosung Kim, Emeryville, CA US

Patent application numberDescriptionPublished
20090221141METHOD FOR PATTERNING CRYSTALLINE INDIUM TIN OXIDE USING FEMTOSECOND LASER - A method for patterning crystalline indium tin oxide (ITO) using femtosecond laser is disclosed, which comprises steps of: (a) providing a substrate with an amorphous ITO layer thereon; (b) transferring the amorphous ITO layer in a predetermined area into a crystalline ITO layer by emitting a femtosecond laser beam to the amorphous ITO layer in the predetermined area; and (c) removing the amorphous ITO layer on the substrate using an etching solution.09-03-2009