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| 20110261925 | GRID APPARATUS AND X-RAY DETECTING APPARATUS - A grid apparatus of an X-ray detecting apparatus is provided. The grid apparatus includes an X-ray absorbing material for absorbing X-rays that are scattered from an object, and an X-ray passing material formed between the X-ray absorbing materials to allow X-rays to pass therethrough. The X-ray absorbing material and the X-ray passing material form a line pattern forming a predetermined angle with a line pattern of pixels of an X-ray detector. The grid apparatus enables simpler implementation of a grid noise reduction algorithm and reduces the time and labor for reducing grid noise. | 10-27-2011 |
| 20120080601 | APPARATUS AND METHOD FOR DETECTING RADIATION - An apparatus and method for detecting radiation, which can improve the resolution of a radiation image and contribute to the simplification of the manufacture of the apparatus, are provided. The apparatus includes an upper electrode layer transmitting radiation; a first photoconductive layer becoming photoconductive upon exposure to the radiation and thus generating charges therein; a charge trapping layer trapping therein the charges generated in the first photoconductive layer; a second photoconductive layer becoming photoconductive upon exposure to rear light for reading out a radiation image; a lower transparent electrode layer charged with the charges trapped in the charge trapping layer; a micro lens layer disposed between the lower transparent electrode layer and a rear light emission unit and including a plurality of micro lenses respectively corresponding to a plurality of pixels; and the rear light emission unit applying the rear light to the second photoconductive layer via the micro lens layer and the lower transparent electrode layer in units of the pixels. | 04-05-2012 |
| 20120080603 | APPARATUS AND METHOD FOR DETECTING RADIATION - An apparatus and method for detecting radiation, which can improve the resolution of a radiation image and contribute to the simplification of the manufacture of the apparatus, are provided. The apparatus includes an upper electrode layer transmitting radiation; a first photoconductive layer becoming photoconductive upon exposure to the radiation and thus generating charges therein; a charge trapping layer trapping therein the charges generated in the first photoconductive layer and serving as a floating electrode; a second photoconductive layer becoming photoconductive upon exposure to rear light for reading out a radiation image; a lower transparent electrode layer charged with the charges trapped in the charge trapping layer; a rear light emission unit applying the rear light to the second photoconductive layer via the lower transparent electrode layer in units of pixels; and a data processing unit reading out a signal corresponding to the charges trapped in the charge trapping layer from the lower transparent electrode layer and generating a radiation image based on the read-out signal. | 04-05-2012 |
| 20120080604 | APPARATUS AND METHOD FOR DETECTING RADIATION - An apparatus and method for detecting radiation are provided. The apparatus includes an upper electrode layer transmitting radiation; a first insulating layer blocking charges from the upper electrode layer; a photoconductive layer becoming photoconductive upon exposure to the radiation; a second insulating layer protecting the photoconductive layer from a plasma discharge; a lower substrate facing the second insulating layer; a plurality of barrier ribs defining a cell structure between the second insulating layer and the lower substrate; a gas layer included in an inner chamber inside the cell structure and generating a plasma discharge; a bottom electrode formed on the lower substrate; a first radio frequency (RF) electrode formed over the bottom electrode and connected to a ground source; a second RF electrode to which RF power for generating plasma is applied; and a third insulating layer surrounding the first and second RF electrodes and thus insulating the first and second RF electrodes from the gas layer and the bottom electrode. | 04-05-2012 |
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| 20090009499 | Plasma display, controller therefor and driving method thereof - A plasma display, a controller therefor and a method of driving determines a screen load ratio from a plurality of video signals input during one frame, and determines a total number of sustain pulses according to the screen load ratio. A ratio of overlap sustain pulses to non-overlap sustain pulses is determined according to a first load ratio, and the overlap and non-overlap sustain pulses are arranged according to the determined ratio. The first load ratio may be the screen load ratio or a display load ratio. The arranged sustain pulses are applied to a plurality of first and second electrodes that perform a display operation during a sustain period. | 01-08-2009 |
| 20090085841 | Plasma display, controller therefor and driving method thereof - A plasma display, a controller therefor and a method of driving determines a total number of sustain pulses according to a screen load ratio, and allocates sustain pulses to each subfield according to a weight value of that subfield. A ratio of overlap sustain pulses to non-overlap sustain pulses is determined according to the weight value of each subfield, and the overlap and non-overlap sustain pulses are arranged according to the determined ratio. The arranged sustain pulses are applied to a plurality of first and second electrodes that perform a display operation during a sustain period. | 04-02-2009 |
| 20090115764 | Plasma display and driving method thereof - A method of driving a plasma display using a frame having a plurality of weighted subfields includes applying overlapping sustain pulses to first and second electrodes of the display during a sustain period of at least one subfield in the frame, and applying at least one non-overlapping sustain pulse to the first and second electrodes during the sustain period. | 05-07-2009 |
| 20090121976 | Plasma display device and driving method thereof - Wall charges of a turn-off cell selected from among a plurality of discharge cells are erased by applying an address voltage to a third electrode corresponding to the turn-off cell in an address period, and first and second pulse strings are respectively applied to first electrodes and second electrodes in a sustain period, where the first pulse string alternates between a first voltage and a second voltage higher than the first voltage, and the second pulse string has the same pattern as, but a different alternating timing from, the first pulse string. The sustain period includes an overlapping duration in which voltages of the first and second pulse strings are simultaneously higher than the first voltage. | 05-14-2009 |
| 20100134465 | Plasma display device and driving method thereof - A driving system and method for use with a plasma display device, which includes a plurality of first electrodes and a plurality of second electrodes that perform display operation with the plurality of first electrodes, selectively applies a first voltage to the plurality of first electrodes and applies a second voltage that is higher than the first voltage to first electrodes to which the first voltage is not applied during an address period of a first subfield having the lowest weight value among the plurality of subfields, applies a third voltage that corresponds to a voltage difference between the first voltage and the second voltage to the plurality of first electrodes during a first period of a sustain period, and applies a fourth voltage that is lower than the third voltage to the plurality of second electrodes during the first period. | 06-03-2010 |
| 20100134478 | PLASMA DISPLAY AND DRIVING METHOD THEREOF - A plasma display device includes a controller for generating and outputting scan data corresponding to a scan electrode to which a scan pulse is applied during an address period, and outputting the same to a scan integrated circuit having a plurality of output terminals coupled to the scan electrodes for driving the scan electrodes. During an address period, the scan integrated circuit applies a first voltage through an output terminal corresponding to the scan data, and applies a second voltage that is greater than the first voltage through another output terminal. The configuration enables the plasma display device to freely control the order of the scan electrodes to which the first voltage is applied according to the scan data. | 06-03-2010 |
| 20100165594 | Mounting structure of semiconductor package and plasma display device having the same - A mounting structure of a semiconductor package includes a semiconductor package, a chassis having a coupling boss protruding at a position corresponding to the coupling hole, a coupling member penetrating the coupling hole and coupled to the coupling boss, and an insulation member covering around the coupling hole of the reinforcing plate and making insulation contact with the coupling member and the coupling boss. The semiconductor package includes a film substrate for interfacing transmission of signals between a circuit board and a display panel, a semiconductor chip forming an electrical contact point with the film substrate, and a reinforcing plate to which the film substrate and the semiconductor chip are directly attached. The reinforcing plate has a coupling hole. | 07-01-2010 |
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| 20090205862 | Printed circuit board and manufacturing method thereof - A printed circuit board and a method of manufacturing the printed circuit board are disclosed. The printed circuit board can include a first insulation layer, a second insulation layer stacked over the first insulation layer, a circuit pattern and a via land buried in the second insulation layer, and a via made of a conductive material penetrating the first insulation layer and integrated with the via land. The circuit pattern and via land can be buried in the insulation material, and the circuit pattern, via land, and via can be formed simultaneously as an integrated structure. Thus, the electrical reliability between the wiring pattern and the via can be increased, the heat-releasing effect of the via can be improved, and the procedure for forming the circuit patterns, via lands, and vias can be simplified, allowing greater productivity in manufacturing the substrate. | 08-20-2009 |
| 20120031550 | Method for forming a plating layer and method for manufacturing a circuit board using the same - A method for forming a plating layer and a method for forming a printed circuit board using the same are disclosed. The method for forming a plating layer in accordance with an embodiment of the present invention can include: providing a metal foil coated with a primer resin layer on one surface thereof, roughness formed the one surface of the primer resin layer; transcribing the primer resin layer, on which roughness is formed, to an insulation layer; reducing the primer resin layer so that an anticorrosive material of the metal foil that remains on the primer resin layer is removed; and plating the primer resin layer, on which roughness is formed. | 02-09-2012 |
| 20120123574 | Plating method of substrate and manufacturing method of circuit board using the same - A method of plating a substrate and a method of manufacturing a circuit board using the method of plating a substrate. The method of manufacturing a circuit board may include: providing a panel substrate, the panel substrate divided into a circuit board area and a dummy area; calculating a ratio of an area of a circuit pattern to be formed by plating in the circuit board area; determining a ratio of an area being plated in the dummy area by considering the ratio of the area being plated in the circuit board area; setting a plating part in the circuit board area and the dummy area; and forming the circuit pattern by electroplating the panel substrate. Accordingly, deviation in thickness of plating between circuit patterns can be improved. | 05-17-2012 |
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| 20110122809 | METHOD AND APPARATUS FOR INTERWORKING OF 3GPP LTE AND 3GPP2 LEGACY WIRELESS COMMUNICATION SYSTEMS - A terminal and an advanced Base Station (BS), and methods for their operation in a wireless communication system including an advanced network that provides a data service and a legacy network that provides a Circuit Switched (CS) voice service, are provided. The method for operating the terminal includes monitoring a paging channel of the advanced network for a data paging message and a paging channel of the legacy network for a CS paging message, when the terminal is in an idle state, receiving one of the CS paging message and data paging message, and establishing a connection with the one of the advanced network and the legacy network corresponding to the received one of the CS paging message and data paging message. | 05-26-2011 |
| 20110122862 | TERMINAL, METHOD FOR OPERATING THE TERMINAL, AND METHOD FOR INTERWORKING IN WIRELESS COMMUNICATION SYSTEM INCLUDING 3GPP LTE NETWORK AND 3GPP LEGACY NETWORK - A terminal, a method for operation of the terminal, and a method of interworking in a wireless communication system including an advanced network and a legacy network are provided. The method for operating the terminal includes monitoring a paging channel of the legacy network for a data paging message and a Circuit Switched (CS) paging message, when the terminal is in an idle state, receiving one of the CS paging message and data paging message, establishing a connection with the legacy network corresponding to the received one of the CS paging message and data paging message, wherein a CS voice connection is established with the legacy network if the CS paging message is received and a Packet Switched (PS) data connection is established with the legacy network if the data paging message is received, and performing a handover to the advanced network from the legacy network, if the PS data connection is established with the legacy network. | 05-26-2011 |
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| 20080292363 | DEVELOPING UNIT AND IMAGE FORMING APPARATUS HAVING THE SAME - A developing unit of an image forming apparatus includes a developer cartridge detachably mounted on the developing unit, a developing case in which a developing member and a first supply member are provided, a developer supply passage to supply a developer stored in the developer cartridge to the developing case, and a developer supplement unit mounted in a portion connecting the developing case and the developer supply passage, to agitate the developer supplied through the developer supply passage and to supply the agitated developer to the developing case. | 11-27-2008 |
| 20080317507 | DEVELOPER CARTRIDGE GUIDE UNIT AND IMAGE FORMING APPARATUS HAVING THE SAME - A developing unit of an image forming apparatus includes a developing member to develop an electrostatic latent image on a photosensitive medium with a developer, a first feed member to feed the developer to the developing member, and a reset member disposed above the developing member to reset the developing member. Accordingly, expenditure for consumables is reduced, because a developer cartridge is separately provided. Additionally, efficient developer agitation is provided. Furthermore, a consistent image quality is achieved, because a plurality of augers move vertically and horizontally to circulate the developer inside the developing unit. | 12-25-2008 |
| 20110076064 | DEVELOPING UNIT AND IMAGE FORMING APPARATUS HAVING THE SAME - A developing unit of an image forming apparatus includes a developer cartridge detachably mounted on the developing unit, a developing case in which a developing member and a first supply member are provided, a developer supply passage to supply a developer stored in the developer cartridge to the developing case, and a developer supplement unit mounted in a portion connecting the developing case and the developer supply passage, to agitate the developer supplied through the developer supply passage and to supply the agitated developer to the developing case. | 03-31-2011 |
| 20120039636 | DEVELOPING UNIT AND IMAGE FORMING APPARATUS HAVING THE SAME - A developing unit of an image forming apparatus includes a developer cartridge detachably mounted on the developing unit, a developing case in which a developing member and a first supply member are provided, a developer supply passage to supply a developer stored in the developer cartridge to the developing case, and a developer supplement unit mounted in a portion connecting the developing case and the developer supply passage, to agitate the developer supplied through the developer supply passage and to supply the agitated developer to the developing case. | 02-16-2012 |
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| 20110141012 | DISPLAYING DEVICE AND CONTROL METHOD THEREOF AND DISPLAY SYSTEM AND CONTROL METHOD THEREOF - Disclosed are a display device and a control method thereof, and a display system and a control method, the display device including: a signal processor which processes an image signal; a display unit which displays on a screen an image based on the image signal processed by the signal processor; and a controller which receives an input from at least one touch pad mapped to the screen of the display unit and displays a shape of the pointer corresponding to a touch state of the touch pad. | 06-16-2011 |
| 20110310021 | USER INPUT DEVICE, DISPLAY APPARATUS COMPRISING THE SAME AND CONTROL METHOD THEREOF - Provided herein are a user input device, a display apparatus and a control method thereof. The user input device includes at least one touch sense pad which is divided into a plurality of areas which are separated by a boundary; and at least one switch to receive a user's input by pushing the touch sense pad. | 12-22-2011 |
| 20110314428 | DISPLAY APPARATUS AND CONTROL METHOD THEREOF - A display apparatus includes: a display unit; a user interface (UI) generator which generates UI information to be displayed on the display unit; a user input unit which includes a touch pad; and a controller which controls the UI generator to display a plurality of selective items per item page on the display unit, to move a focus in accordance with a touch motion of the user, and to stop moving the focus if the focus is located at an outermost selective item positioned at an edge of the item page. | 12-22-2011 |
| 20120019459 | INPUT DEVICE AND CONTROL METHOD THEREOF - A control method includes: receiving a user's input through a touch area of the input device; and recognizing the user's touch input to the touch area through a recognition area of the input device corresponding to the touch area and changing and assigning a range of the recognition area corresponding to the touch area according to a predetermined standard. | 01-26-2012 |
| 20120131518 | APPARATUS AND METHOD FOR SELECTING ITEM USING MOVEMENT OF OBJECT - An item selecting apparatus includes a movement detecting unit detecting a movement of a user, a screen displaying image information, a display image storage unit storing data to generate an image to be displayed on the screen, a display image generating unit generating an image to be displayed on the screen, and a control unit controlling so that a plurality of items is displayed on the screen in one of one-, two- and three-dimensional arrangements, in which the control unit receives a signal from the movement detecting unit to measure a movement of the object in at least one of x-, y- and z-axis directions and issues a command to select at least one from among the plurality of items or provides visual feedback thereto, in response to the measured movement of the user and in accordance with the arrangement of the plurality of items on the screen. | 05-24-2012 |
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| 20110052978 | Secondary battery - A secondary battery including an electrode assembly, a can accommodating the electrode assembly, a cap plate coupled to the can, an electrolyte injection unit including an injection hole penetrating the cap plate and an injection ring protruding from the injection hole, and a stopper to seal the electrolyte injection unit. | 03-03-2011 |
| 20110183167 | Secondary battery - A secondary battery including an electrode assembly including a first electrode plate, a second electrode plate, and a separator disposed between the first electrode plate and the second electrode plate; a case accommodating the electrode assembly; a cap plate sealing the case; a first electrode terminal electrically connected to the first electrode plate and penetrating through the cap plate; and a safety valve coupled to the first electrode terminal, the safety valve including a bimetal element. | 07-28-2011 |
| 20110183171 | Secondary battery and method of manufacturing secondary battery - A secondary battery includes first and second collecting plates branching out from an electrode terminal, and first and second electrode assemblies rolled up in a jelly-roll type unit, the first electrode assembly having a first non-coating portion adhered to the first collecting plate, the second electrode assembly having a second non-coating portion adhered to the second collecting plate, and the first and second collecting plates being on facing surfaces of respective first and second non-coating portions. The first non-coating portion is spaced apart from a roll center of the first electrode assembly by a first predetermined distance along a direction directed away from the second non-coating portion, and the second non-coating portion is spaced apart from a roll center of the second electrode assembly by a second predetermined distance along a direction directed away from the first non-coating portion. | 07-28-2011 |
| 20110244314 | SECONDARY BATTERY - A secondary battery includes: a case; an electrode assembly housed in the case and including a first electrode, a second electrode, and a separator between the first electrode and the second electrode, the first electrode having a coating portion coated with a first active material and a non-coating portion absent the first active material; and a collector plate including first and second collector plates enmeshed together with the non-coating portion therebetween. | 10-06-2011 |
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| 20100227215 | RECHARGEABLE BATTERY - A battery including: a case having a case region extendable along a first direction; an electrode assembly housed within the case and including a first electrode, a second electrode, and a separator between the first electrode and the second electrode, the first electrode including a first uncoated region at a first end of the electrode assembly, and the second electrode including a second uncoated region at a second end of the electrode assembly, the second end facing oppositely away from the first end, and the first uncoated region being spatially separated from the second uncoated region along the first direction; and a terminal electrically coupled to at least one of the first uncoated region or the second uncoated region, the case region being between the first uncoated region and the second uncoated region along the first direction. | 09-09-2010 |
| 20100233519 | RECHARGEABLE BATTERY - A rechargeable battery configured to stably and easily interrupt a current includes: an electrode assembly including a positive electrode, a negative electrode, and a separator between the positive electrode and the negative electrode; a case containing the electrode assembly therein and having a first opening at one end thereof; and a first plate coupled to the case and sealing the first opening, the first plate electrically connected to the electrode assembly, wherein the first plate includes a wrinkle portion configured to deform for disconnecting the first plate from the electrode assembly when an internal pressure of the case is greater than a reference pressure. | 09-16-2010 |
| 20110151318 | Secondary battery - A secondary battery including an electrode assembly, the electrode assembly including electrode plates and a separator interposed between the electrode plates, at least one of the electrode plates including a coated part, the coated part including a metallic plate having an active material coated thereon, and an uncoated part, the uncoated part including a metallic plate without active material coated thereon, the uncoated part including a folding line in the uncoated part, and a folding part with an end portion folded with respect to the folding line; and a current collector electrically contacting the folding part. | 06-23-2011 |
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| 20110195569 | Semiconductor Device and Method for Forming the Same - Methods of forming field effect transistors include forming a metal alloy gate electrode (e.g., aluminum alloy) containing about 0.5 to about 1.0 atomic percent silicon, on a substrate, and electroless plating an electrically conductive gate protection layer directly on at least a portion of an upper surface of the metal alloy gate electrode. A gate dielectric layer may be formed on the substrate. This gate dielectric layer may have a dielectric constant greater than a dielectric constant of silicon dioxide. The forming of the metal alloy gate electrode may include forming a metal alloy gate electrode directly on an upper surface of the gate dielectric layer. | 08-11-2011 |
| 20120039564 | Photoelectric Integrated Circuit Devices And Methods Of Forming The Same - A photoelectric integrated circuit device may include a substrate including an electronic device region and an on die optical input/output device region, the substrate having a trench in the on die optical input/output device region; a lower clad layer provided in the trench, the lower clad layer having an upper surface lower than a surface of the substrate; a core provided on the lower clad layer; an insulating pattern provided on the core; an optical detection pattern provided on the insulating pattern, the optical detection pattern having at least a portion provided in the trench; and at least one transistor provided on the substrate of the electronic device region. | 02-16-2012 |
| 20120119376 | SEMICONDUCTOR CHIPS AND METHODS OF FORMING THE SAME - Provided are a semiconductor chip and a method of manufacturing the same. The semiconductor chip includes a substrate having a first side and a second side facing each other, and a through electrode being disposed in a hole penetrating the substrate, wherein an opening surrounded by the through electrode is disposed in the hole, wherein the opening comprises a first end adjacent to the first side of the substrate and a second end adjacent to the second side of the substrate | 05-17-2012 |
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| 20100240184 | METHOD OF FORMING BURIED GATE ELECTRODE - A method of forming a buried gate electrode prevents voids from being formed in a silicide layer of the gate electrode. The method begins by forming a trench in a semiconductor substrate, forming a conformal gate oxide layer on the semiconductor in which the trench has been formed, forming a first gate electrode layer on the gate oxide layer, forming a silicon layer on the first gate electrode layer to fill the trench. Then, a portion of the first gate electrode layer is removed to form a recess which exposed a portion of a lateral surface of the silicon layer. A metal layer is then formed on the semiconductor substrate including on the silicon layer. Next, the semiconductor substrate is annealed while the lateral surface of the silicon layer is exposed to form a metal silicide layer on the silicon layer. | 09-23-2010 |
| 20100240185 | Semiconductor device and method of manufacturing the same - A method of manufacturing a semiconductor device includes: forming a trench for forming buried type wires by etching a substrate; forming first and second oxidation layers on a bottom of the trench and a wall of the trench, respectively; removing a part of the first oxidation layer and the entire second oxidation layer; and forming the buried type wires on the wall of the trench by performing a silicide process on the wall of the trench from which the second oxidation layer is removed. As a result, the buried type wires are insulated from each other. | 09-23-2010 |
| 20110316168 | Semiconductor Device and Method of Fabricating the Same - A semiconductor device includes a via structure and a conductive structure. The via structure has a surface with a planar portion and a protrusion portion. The conductive structure is formed over at least part of the planar portion and not over at least part of the protrusion portion of the via structure. For example, the conductive structure is formed only onto the planar portion and not onto any of the protrusion portion for forming high quality connection between the conductive structure and the via structure. | 12-29-2011 |
| 20110318922 | METHOD OF FORMING SEMICONDUCTOR DEVICE - The methods include forming a semiconductor substrate pattern by etching a semiconductor substrate. The semiconductor pattern has a first via hole that exposes side walls of the semiconductor substrate pattern, and the side walls of the semiconductor substrate pattern exposed by the first via hole have an impurity layer pattern. The methods further include treating upper surfaces of the semiconductor substrate pattern, the treated upper surfaces of the semiconductor substrate pattern being hydrophobic; removing the impurity layer pattern from the side walls of the semiconductor substrate pattern exposed by the first via hole; forming a first insulating layer pattern on the side walls of the semiconductor substrate pattern exposed by the first via hole; and filling a first conductive layer pattern into the first via hole and over the first insulating layer pattern. | 12-29-2011 |
| 20110318923 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME INCLUDING A CONDUCTIVE STRUCTURE IS FORMED THROUGH AT LEAST ONE DIELECTRIC LAYER AFTER FORMING A VIA STRUCTURE - For forming a semiconductor device, a via structure is formed through at least one dielectric layer and at least a portion of a substrate. In addition, a protective buffer layer is formed onto the via structure. Furthermore, a conductive structure for an integrated circuit is formed over the substrate after forming the via structure and the protective buffer layer, with the conductive structure not being formed over the via structure. Thus, deterioration of the conductive and via structures is minimized. | 12-29-2011 |
| 20120043666 | Semiconductor Device and Method of Fabricating the Same - For forming a semiconductor device, a via structure is formed through at least one dielectric layer and at least a portion of a substrate. In addition, a protective buffer layer is formed onto the via structure. Furthermore, a conductive structure for an integrated circuit is formed over the substrate after forming the via structure and the protective buffer layer, with the conductive structure not being formed over the via structure. Thus, deterioration of the conductive and via structures is minimized. | 02-23-2012 |
| 20120088323 | METHOD FOR FORMING LIGHT GUIDE LAYER IN SEMICONDUCTOR SUBSTRATE - A method for forming a light guide layer with improved transmission reliability in a semiconductor substrate, the method including forming a trench in the semiconductor substrate, forming a cladding layer and a preliminary light guide layer in the trench such that only one of opposite side end portions of the preliminary light guide layer is in contact with an inner sidewall of the trench, and performing a thermal treatment on the substrate to change the preliminary light guide layer into the light guide layer. | 04-12-2012 |
| 20120132986 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME - A semiconductor device includes a substrate having a plurality of horizontal channel transistors formed thereon, an insulation layer structure on the substrate and covering the horizontal transistors, and a plurality of vertical channel transistors on the insulation layer structure. | 05-31-2012 |
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| 20110091229 | FUSING UNIT, CONTROL METHOD THEREOF, AND IMAGE FORMING APPARATUS HAVING THE SAME - A fusing unit includes a driving source, a fusing part which includes a heat source and is driven by the driving source to heat and press a transported printing medium to fuse an image transferred to the printing medium, an electric power supplying unit which supplies an electric power to the heat source, and a control unit which senses the torque of the driving source or a property value corresponding to the torque, and restricts or blocks electric power supplied to the heat source from the electric power supplying unit during a predetermined time if a change rate of the torque or the property value deviates from a reference value. | 04-21-2011 |
| 20110142504 | Image forming apparatus and method thereof - Disclosed herein is an image forming apparatus and method thereof. The image forming apparatus includes a rotating member provided close to a distal end of a guide surface used to guide a printing medium to be introduced into a fusing unit. The rotating member comes into rolling contact with the printing medium to prevent jamming of the printing medium due to matter adhered to the distal end of the guide surface. | 06-16-2011 |
| 20120107029 | Fusing device and image forming apparatus having the same - An image forming apparatus including a fusing belt, a pressure roller disposed to face the fusing belt so as to press a recording medium onto the fusing belt, a nip forming member to support an inner surface of the fusing belt so as to form a fusing nip along with the pressure roller, and a heat source disposed inside the fusing belt to simultaneously apply radiant heat to the fusing belt and the nip forming member. The nip forming member includes a hill portion, which is located to one side thereof farther downstream in a movement direction of the recording medium and protrudes toward the hill portion. The hill portion causes the recording medium, which has curled in a given direction, to be bent in an opposite direction immediately prior to exiting from between the nip forming member and the pressure roller, thereby reducing curling of the recording medium. | 05-03-2012 |
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| 20110050742 | BACKLIGHT UNIT, DISPLAY APPARATUS AND METHOD OF CONTROLLING BACKLIGHT UNIT - A backlight unit, a display apparatus, and a method of controlling the backlight unit are provided. The backlight unit includes an image depth information extraction unit configured to extract image depth information from an image signal and a brightness calculator configured to calculate brightnesses corresponding to the image depth information. The backlight unitimproves three-dimensional effects on an image by controlling the brightnesses of light emitting devices according to the brightnesses calculated to correspond to image depth. | 03-03-2011 |
| 20110050849 | METHOD AND APPARATUS FOR RECEIVING SYNCHRONIZATION SIGNAL AND METHOD AND APPARATUS FOR CONTROLLING OF 3D SHUTTER GLASSES USING THE SAME - An apparatus for receiving a sync signal and an apparatus for controlling a three-dimensional (3D) shutter glass using the same. The apparatus for receiving the synchronization signal includes: a synchronization signal receiver which receives a synchronization signal from a source unit; and a controller which analyzes a period of the received synchronization signal and generates a mode signal according to the analyzed period of the received synchronization to control the synchronization signal receiver, wherein the synchronization signal receiver can be selectively operable to receive the synchronization signal according to the mode signal | 03-03-2011 |
| 20110102426 | METHOD OF GENERATING SYNC SIGNAL FOR CONTROLLING 3D GLASSES OF 3D IMAGE SYSTEM, AND METHOD AND APPARATUS FOR TRANSMITTING AND RECEIVING THE SYNC SIGNAL - A method of generating a sync signal for controlling three-dimensional (3D) glasses in a 3D image system, methods of transmitting and receiving a 3D glasses control sync signal, and apparatuses for transmitting and receiving the 3D glasses control sync signal are provided. The method of generating a 3D glasses control sync signal includes: generating sync signal start indicator information notifying a start of a 3D glasses control sync signal, state sequence mode information indicating an operating state of the 3D glasses with regard to whether a left glass or a right glass is opened or closed, and sequence duty information indicating a retaining time period of the operating state of the 3D glasses; and generating the 3D glasses controlling signal by combining the generated sync signal start indicator information, the generated state sequence mode information, and the generated sequence duty information according to a set order. | 05-05-2011 |
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| 20100060139 | MATERIAL FOR FORMING PROTECTIVE LAYER, METHOD OF PREPARING THE MATERIAL, AND PDP COMPRISING THE PROTECTIVE LAYER - Disclosed is a material for forming a protective layer, a protective layer employing the material and a PDP with the protective layer. Unlike conventional protective layers which employ MgO created in conditions of pressurized artificial gas, the instant protective layer uses MgO created by heating Mg and allowing it to oxidize naturally in air. The result is MgO with fewer defects that is more effective as a protective layer in many uses, such as in a PDP. The instant MgO also shows many specific spectral characteristics and contains impurities in amounts of less than about 2 ppm each. Also disclosed is a PDP which takes advantage of the advantages of the inventive protective layer. | 03-11-2010 |
| 20100164361 | PLASMA DISPLAY PANEL PROTECTIVE LAYER - A plasma display panel (PDP) protective layer including a ternary compound in the form of BaXO, wherein X is selected from the group consisting of Sc, Y, Gd, La, Er, Ho, Nd, Sm, and Ce. Such protective layer has excellent electron emission characteristics and phase stability. | 07-01-2010 |
| 20100308710 | MATERIAL FOR PREPARING PROTECTIVE LAYER AND PLASMA DISPLAY PANEL COMPRISING THE PROTECTIVE LAYER - A plasma display panel (PDP) including a protective layer and a material for preparing the protective layer that can be easily fabricated and has little defects, includes a magnesium oxide (MgO) powder including a cathode rays emission spectrum having a first emission peak in a wavelength in the range of 300 to 450 nm, a second emission peak in a wavelength in the range of 650 to 750 nm, and an intensity ratio between 1:0.15 and 0.40 as an intensity ratio of the second emission peak with respect to the first emission peak. | 12-09-2010 |
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| 20080198567 | MULTILAYER PRINTED CIRCUIT BOARD - Disclosed is a multilayer printed circuit board. The multilayer printed circuit board includes a power source surface to provide power to each component disposed on the power source surface, a ground surface having a reference voltage, a strip line which passes through the power source surface and/or the ground surface so as to transmit signals between components, an antenna installed in proximity to a sectional region of the power source surface and the ground surface, and an electromagnetic wave reduction member which is provided between the power source surface and the ground surface to effectively reduce an electromagnetic wave generated from the strip line. | 08-21-2008 |
| 20090059498 | Electronic appliance and method for manufacturing the same - An electronic appliance to achieve an increased rigidity thereof with a simplified manner without any change in design and configuration and a method for manufacturing the same. The electronic appliance includes a case defining the outer appearance of the electronic appliance, and a printed circuit board disposed in the case and having electronic elements mounted thereon. A resin is filled between the case and the printed circuit board. | 03-05-2009 |
| 20090139758 | Printed circuit board assembly and manufacturing method for the same - A printed circuit board (PCB) assembly is disclosed, which includes a first PCB on which a plurality of first electrode terminals are arranged at intervals from one another; a second PCB on which a plurality of second electrode terminals respectively connected with the first electrode terminals are arranged at intervals from one another; and separation preventing member which prevents the first and the second electrode terminals from deviating from their correct positions when the first and the second electrode terminals are ultrasonically-welded to each other. Accordingly, lateral movement of the first and the second PCBs relative to each other is restricted owing to the separation preventing member, the plurality of first electrode terminals and second electrode terminals can be bonded to each other without deviating from their correct positions. | 06-04-2009 |
| Patent application number | Description | Published |
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| 20090097306 | Phase-change random access memory device, system having the same, and associated methods - A phase-change random access memory (PRAM) device includes a PRAM cell array including a first sector and a second sector, a first global bit line coupled to a first local bit line of the first sector and a first local bit line of the second sector, and a first plurality of global bit line discharge units coupled to the first global bit line, the first plurality of global bit line discharge units configured to discharge the first global bit line in response to a first global discharge signal. | 04-16-2009 |
| 20090097307 | Phase-change random access memory device, system having the same, and associated methods - A phase-change random access memory (PRAM) device includes a PRAM cell array having a first bank that includes first to m | 04-16-2009 |
| 20100118593 | VARIABLE RESISTANCE MEMORY DEVICE AND SYSTEM THEREOF - A phase-change random access memory device is provided. The phase-change random access memory device includes a global bit line connected to a write circuit and a read circuit, multiple local bit lines, each being connected to multiple phase-change memory cells, and multiple column select transistors selectively connecting the global bit line with each of the multiple local bit lines, each column select transistor having a resistance that varies depending on its distance from the write circuit and the read circuit. | 05-13-2010 |
| 20100124103 | Resistance-change random access memory device - A resistance-change random access memory device includes a resistance-change memory cell array having a plurality of resistance-change memory cells, where a plurality of word lines are connected to respective first terminals of the plurality of resistance-change memory cells. A plurality of bit lines are disposed perpendicular to the word lines and connected to respective second terminals of the plurality of resistance-change memory cells. The device also includes a plurality of discharge elements that are capable of connecting or disconnecting respective bit lines from a discharge voltage, where the discharge elements connect the respective bit lines to the discharge voltage before write and read operations. | 05-20-2010 |
| 20100125716 | RESISTANCE VARIABLE MEMORY DEVICE - A resistance variable memory device includes a resistance variable memory cell array, a data register that prefetches read data of the resistance variable memory cell array, a data output unit that receives the prefetched read data from the data register and outputs the received data, and a page mode setting unit that sets one of a first page mode and a second page mode as a page mode. In the first page mode, the data output unit sequentially reads the read data prefetched in the data register as page addresses are sequentially received, and in the second page mode, the data output unit sequentially reads the read data prefetched in the data register after a start page address among a plurality of page addresses has been received | 05-20-2010 |
| 20110305100 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device including a plurality of layers each including a memory cell array and which are stacked over each other; and at least one power plane for supplying power to the layers. The power plane includes a region to which a power voltage is applied and a region to which a ground voltage is applied. The region to which a power voltage is applied is located adjacent to the region to which a ground voltage is applied, and forms a decoupling capacitor therebetween to decouple an influx of power noise to the layers or generation of power noise in the layers | 12-15-2011 |
| 20120047317 | SEMICONDUCTOR STORAGE DEVICE AND METHOD OF THROTTLING PERFORMANCE OF THE SAME - A semiconductor storage device and a method of throttling performance of the same are provided. The semiconductor storage device includes a non-volatile memory device configured to store data in a non-volatile state; and a controller configured to control the non-volatile memory device. The controller calculates a new performance level, compares the calculated performance level with a predetermined reference, and determines the calculated performance level as an updated performance level according to the comparison result. | 02-23-2012 |
| 20120047319 | SEMICONDUCTOR STORAGE DEVICE AND METHOD OF THROTTLING PERFORMANCE OF THE SAME - A semiconductor storage device (SSD) and a method of throttling performance of the SSD. The method can include gathering at least two workload data items related with a workload of the semiconductor storage device, estimating the workload using the at least two workload data items, and throttling the performance of the semiconductor storage device according to the estimated workload. Accordingly, a workload that the semiconductor storage device will undergo can be estimated. | 02-23-2012 |
