| Patent application number | Description | Published |
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| 20090251181 | Method and apparatus for tuning phase of clock signal - A method and apparatus for tuning a phase of a data clock signal having a different frequency than a main clock signal. The method of tuning includes coarse tuning by receiving the data clock signal, dividing the data clock signal to generate a frequency-divided clock signal having a same frequency as the main clock signal, repeatedly shifting the frequency-divided clock signal to generate multiphase frequency-divided clock signals at a predetermined phase interval, comparing a phase of each of the multiphase frequency-divided clock signals with a phase of the main clock signal, and determining a phase shift amount based on a comparison result, and fine tuning by comparing a phase of a multiphase frequency-divided clock signal corresponding to the phase shift amount with the phase of the main clock signal and adjusting the phase of the data clock signal by a predetermined phase step based on the comparison result. | 10-08-2009 |
| 20100148819 | Majority voter circuits and semiconductor device including the same - A majority voter circuit is configured to generate a selecting signal based on first input data and inverted first input data. The first input data and the inverted first input data each include an odd-number of bits, and the odd-number of bits include bits of a first type and bits of a second type. The generated selecting signal is indicative of which of the first type and the second type of bits in the first input data are in the majority. | 06-17-2010 |
| 20110158030 | METHOD AND APPARATUS FOR TUNING PHASE OF CLOCK SIGNAL - A method and apparatus for tuning a phase of a data clock signal having a different frequency than a main clock signal. The method of tuning includes coarse tuning by receiving the data clock signal, dividing the data clock signal to generate a frequency-divided clock signal having a same frequency as the main clock signal, repeatedly shifting the frequency-divided clock signal to generate multiphase frequency-divided clock signals at a predetermined phase interval, comparing a phase of each of the multiphase frequency-divided clock signals with a phase of the main clock signal, and determining a phase shift amount based on a comparison result, and fine tuning by comparing a phase of a multiphase frequency-divided clock signal corresponding to the phase shift amount with the phase of the main clock signal and adjusting the phase of the data clock signal by a predetermined phase step based on the comparison result. | 06-30-2011 |
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| 20080203507 | Image sensors for zoom lenses and fabricating methods thereof - An image sensor includes a semiconductor substrate on which a plurality of photo diodes are formed. A plurality of interlayer dielectrics are formed above the semiconductor substrate, and a plurality of metal lines are formed on each of the interlayer dielectrics. A plurality of micro lenses are formed above the uppermost one of the interlayer dielectrics. The light passing through the zoom lenses is incident on the respective micro lenses. The plurality metal lines formed on at least one of the plurality of interlayer dielectrics have the same width. | 08-28-2008 |
| 20090072281 | CMOS image sensor layout capable of removing difference between Gr and Gb sensitivities and method of laying out the CMOS image sensor - Provided is a layout of a CMOS image sensor having an asymmetrical pixel structure in which a plurality of photodiodes may share a transistor block. The layout may include a first region in which a plurality of photodiodes are arranged asymmetrically on a semiconductor substrate, a second region including a metal shield layer arranged on an upper surface of the first region, and a third region arranged on an upper surface of the second region. The metal shield layer may be arranged asymmetrically according to the layout of the photodiodes. | 03-19-2009 |
| 20090200627 | Image sensor with high conversion efficiency - An image sensor includes a photoelectric converter, a reflector, and a charge carrier guiding region. The reflector is disposed under the photoelectric converter, and the charge carrier guiding region is disposed between the photoelectric converter and the reflector. The reflector reflects incident light passed by the photoelectric converter back through the photoelectric converter for increasing photoelectric conversion efficiency and reduced crosstalk. The charge carrier guiding region dissipates undesired charge carriers for further increasing photoelectric conversion efficiency. | 08-13-2009 |
| 20090219266 | Pixel circuit arrays - A pixel circuit array may include pixel circuits and/or a global reset transistor that has a first end connected to a second end of a reset transistor and is turned on or off in response a global reset signal. Each pixel circuit may include: a transmission transistor that may receive and/or transmit photocharges through ends of the transmission transistor in response to a transmission control signal; the reset transistor that may have a first end connected to the second end of the transmission transistor and may be turned on or off in response a reset control signal; a source-follower transistor that may receive a signal from the second end of the reset transistor and/or may be turned on or off in response the received signal; and/or a selection transistor that may be connected to the source-follower transistor and/or may be turned on or off in response a selection control signal. | 09-03-2009 |
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| 20100243309 | Connecting structure for circuit board and connecting method using the same - Disclosed is a connection structure for a circuit board using a solder bump to arrange circuit boards. The circuit board connection structure includes a solder bump prepared on one of two circuit boards and a perforated part formed at the other of the circuit boards to receive the solder bump. Facing both circuit boards towards each other and inserting the solder bump into the perforated part, the circuit boards are desirably arranged. | 09-30-2010 |
| 20100248505 | Printed circuit board assembly and connecting method thereof - Disclosed herein is a printed circuit board and a connecting method thereof. The connecting method of the circuit board assembly may include molding the printed circuit board assembly by applying a resin to the printed circuit board assembly, exposing ends of the electrode terminals of a connector mounted on a printed circuit board by partially removing the molded printed circuit board assembly, and connecting a connection member to the exposed ends of the electrode terminals of the connector. Therefore, even if the whole of the printed circuit board assembly is molded, the connection member may be freely connected to the connector of the printed circuit board assembly. | 09-30-2010 |
| 20110026233 | Apparatus and method for manufacturing elastic cable and electronic device using the same - Disclosed herein is an apparatus for manufacturing an elastic cable including conductor tracks arranged in a zigzag shape between elastic films. The apparatus may include a conductor track supplying unit to supply at least one conductor track, an aligning unit to align the at least one conductor track supplied from the conductor track supplying unit, a film supplying unit to supply elastic films such that the at least one conductor track is surrounded by the elastic films, and a thermal lamination roller unit to thermally laminate the at least one conductor track arranged between the elastic films, wherein the aligning unit is reciprocally movable to arrange the at least one conductor track in a zigzag shape between the elastic films when the at least one conductor track is supplied to the thermal lamination roller unit. | 02-03-2011 |
| 20110154661 | Method of fabricating printed circuit board assembly - Disclosed herein is a method for fabricating a printed circuit board assembly by adhering an element to a printed circuit board without using any solder. The printed circuit board may be fabricated by sequentially applying a conductor-containing first ink and an insulator-containing second ink onto a base substrate by ink-jet printing to form a printed circuit board, mounting an element on the printed circuit board such that an electrode of the element contacts a conductive layer and curing the conductive layer at a high temperature. | 06-30-2011 |
| 20110272181 | Multilayer Stretchable Cable - According to an example embodiment, the multilayer stretchable cable includes a multilayer stretchable film and a plurality of conductive lines in the stretchable film. The conductive lines are in at least two different layers of the multilayer stretchable film in a thickness direction of the stretchable film, at least one conductive line is a signal line and at least one other conductive line in a layer adjacent to the signal line is a ground line. The signal line and the ground line are in zigzag patterns and are parallel to a width direction of the multilayer stretchable film. | 11-10-2011 |
