| Patent application number | Description | Published |
|---|
| 20080198663 | FLASH MEMORY DEVICE AND PROGRAM METHOD THEREOF - A flash memory device which comprises a memory cell array having memory cells arranged in rows and columns; a word line voltage generator circuit configured to generate a program voltage, a dielectric breakdown prevention voltage, and a pass voltage at a program operation; and a row selector circuit that receives the program voltage, the dielectric breakdown prevention voltage, and the pass voltage and selecting one of the rows in response to a row address. The dielectric breakdown prevention voltage is lower than the program voltage and higher than the pass voltage; and the row selector circuit drives the selected row with the program voltage, drives at least one row just adjacent to, or neighboring, the selected row with the dielectric breakdown prevention voltage and drives remaining rows with the pass voltage. | 08-21-2008 |
| 20080205160 | Non-volatile memory devices and operating methods thereof - Non-volatile memory devices and operating methods thereof are provided. In an operating method, a first operation is performed by applying a first voltage to at least one word line. The first operation includes one of a programming or erasing operation. The first operation is verified by applying a verify voltage to each of the at least one word lines. The voltage level of each verify voltage is determined according to position information of a corresponding one of the at least one word lines. | 08-28-2008 |
| 20080253182 | NAND FLASH MEMORY DEVICE AND PROGRAMMING METHOD - A NAND flash memory device and a programming method thereof capable of improving a program speed during a multi-level cell programming operation are provided. The device performs a programming operation using an ISPP method. Additionally, the device includes a memory cell storing multi-bit data; a program voltage generating circuit generating a program voltage to be supplied to the memory cell; and a program voltage controller controlling a start level of the program voltage. The device supplies an LSB start voltage to a selected word line during an LSB program, and an MSB start voltage higher than the LSB start voltage to the selected word line during an MSB program. | 10-16-2008 |
| 20090010066 | FLASH MEMORY DEVICE AND METHOD IN WHICH TRIM INFORMATION IS STORED IN MEMORY CELL ARRAY - A flash memory device which includes a memory cell array which stores data and trim information, and control logic which controls programming, erasing, and reading modes of the memory cell array. The control logic is operative to receive the trim information from the memory cell array in a power-up mode, and to optimize operational time periods of the programming, erasing, and reading modes in accordance with the trim information. | 01-08-2009 |
| 20090016104 | Nonvolatile semiconductor memory device and programming method thereof - A programming method of a multi-bit flash memory device includes programming multi-bit data into selected memory cells through pluralities of programming loops. In each programming loop, an increment of a programming voltage applied to the selected memory cells is varied in accordance with a result of program-verification for each data state of the multi-bit data and reading-verification for a data state is skipped when the program-verification indicates that data state has passed. | 01-15-2009 |
| 20090016111 | Flash memory device and program recovery method thereof - A method of programming a flash memory includes programming memory cells connected to a selected word line by applying a first voltage to the selected word line and a second voltage to non-selected word lines, the second voltage being lower than the first voltage, lowering the first voltage of the selected word line to a third voltage after programming the memory cells connected to the selected word line, the third voltage being lower than the first voltage, and recovering a fourth voltage of the selected word line and the non-selected word lines, the fourth voltage being lower than the second and third voltages. | 01-15-2009 |
| 20090031075 | Non-volatile memory device and a method of programming the same - Provided are a non-volatile memory device and a method of programming the same. The method includes: performing a program operation; performing a program verify read operation; and performing a pass/fail determine operation simultaneously with one of a verify recovery operation and a bit line setup operation, after the performing of the program verify read operation. | 01-29-2009 |
| 20090207664 | Flash Memory Device for Variably Controlling Program Voltage and Method of Programming the Same - Provided is a method of programming the flash memory device including setting increments of program voltages according to data states expressed as threshold voltage distributions of multi-level memory cells. An Increment Step Pulse Programming (ISPP) clock signal corresponds to a loop clock signal and the increments of the program voltages and is generated in response to program pass/fail information. A default level enable signal is generated by performing a counting operation until reaching the increments of the program voltages, in response to the loop clock signal. An additional level enable signal is generated by performing a counting operation until reaching the increments of the program voltages, in response to the ISPP clock signal. The program voltage is increased by 1 increment, in response to the default level enable signal. The program voltage is increased by 2 increments, in response to the additional level enable signal. | 08-20-2009 |
| 20090244967 | FLASH MEMORY DEVICE HAVING DUMMY CELLS AND METHOD OF OPERATING THE SAME - Disclosed is a flash memory device having multiple strings, where each string includes first memory cells and second memory cells. One second memory cell of the second memory cells in each string is set to a programmed state, and remaining second memory cells are set to an erased state. | 10-01-2009 |
| 20100002518 | Flash memory device and programming method thereof - The flash memory device includes a memory cell array having a plurality of memory cells, a high voltage generator configured to generate a plurality of pass voltages, with a first pass voltage of the plurality of pass voltages supplied to the memory cell array during a programming operation; and a main controller including a voltage controller configured to shift the first pass voltage at a plurality of time intervals during the programming operation. | 01-07-2010 |
| 20100002519 | Flash memory device and programming method thereof - A flash memory device including a controller to determine higher, M, and lower, N, word-line address bits based on an input word-line address, to determine a selected area of a memory array based on the higher and lower word-line address bits, and an unselected area of the memory array based on the selected area; and a high voltage generator to provide a first pass voltage to a word line of the selected area, and to provide a second pass voltage to a word line of the unselected area. The pass voltages are discriminately applied to the programmed and non-programmed memory cells, enlarging the pass voltage window. The memory array is divided into pluralities of zones to which local voltages are each applied in different levels. | 01-07-2010 |
| 20100149869 | MULTI-LEVEL CELL FLASH MEMORY DEVICE AND READ METHOD - A method of reading data of a multi-level cell (MLC) flash memory device is disclosed. The method includes reading a least significant bit (LSB) and a most significant bit (MSB) of the data programmed to a plurality of memory cells. Reading each of the LSB and MSB includes; reading a MSB flag indicating whether or not the MSB for memory cells in a page of memory cells has been programmed, performing a first read with respect to a plurality of first bit lines, setting a target voltage in view of the read value of the MSB flag, applying the target voltage to a plurality of second bit lines, and performing a second read with respect to the plurality of second bit lines. | 06-17-2010 |
| 20110002174 | FLASH MEMORY DEVICE AND PROGRAM RECOVERY METHOD THEREOF - A method of programming a flash memory includes programming memory cells connected to a selected word line by applying a first voltage to the selected word line and a second voltage to non-selected word lines, the second voltage being lower than the first voltage, lowering the first voltage of the selected word line to a third voltage after programming the memory cells connected to the selected word line, the third voltage being lower than the first voltage, and recovering a fourth voltage of the selected word line and the non-selected word lines, the fourth voltage being lower than the second and third voltages. | 01-06-2011 |
| 20110085379 | NONVOLATILE MEMORY DEVICE AND SYSTEM AND RELATED METHOD OF OPERATION - A nonvolatile memory device detects a first memory cell to be successfully programmed in a program operation for multiple memory cells connected to a wordline, and then detects a number of program loops required to successfully program the remaining memory cells connected to the wordline. An initial program voltage of subsequent program operations is then adjusted based on the detected number of loops. | 04-14-2011 |
| 20110138111 | FLASH MEMORY DEVICE AND METHOD OF PROGRAMMING SAME - A flash memory device comprises a memory cell array comprising memory cells arranged in rows and columns. A first page of data is programmed in selected memory cells of the memory cell array, and a second page of data is subsequently programmed in the selected memory cells. The first page of data is programmed using a program voltage having a first start value, and the second page of data is programmed using a program voltage having a second start value determined by a programming characteristic of the selected memory cells. | 06-09-2011 |
