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Montoye
Robert Kevin Montoye, Rochester, MN US
| Patent application number | Description | Published |
|---|---|---|
| 20100266081 | System and Method for Double Rate Clocking Pulse Generation With Mistrack Cancellation - A method for generating a dual rate clock circuit the method including coupling the output terminal of a first local clock buffer to the input of a second local clock buffer through at least one inverter circuit and driving the first local clock buffer with a base signal. The method also includes generating an early clock signal with the first local clock buffer based on the base signal and generating a delayed early clock signal by delaying the first local clock signal with the at least one inverter. The method also includes generating a later clock signal by driving the second local clock buffer with the delayed early clock signal wherein the second local clock buffer and the late clock signal generated by the second local clock buffer are synchronized and correlated with the first local clock buffer and the early clock signal generated by the first local clock buffer. | 10-21-2010 |
Robert Kevin Montoye, New York, NY US
| Patent application number | Description | Published |
|---|---|---|
| 20080215856 | METHODS FOR GENERATING CODE FOR AN ARCHITECTURE ENCODING AN EXTENDED REGISTER SPECIFICATION - There are provided methods and computer program products for generating code for an architecture encoding an extended register specification. A method for generating code for a fixed-width instruction set includes identifying a non-contiguous register specifier. The method further includes generating a fixed-width instruction word that includes the non-contiguous register specifier. | 09-04-2008 |
| 20090300331 | IMPLEMENTING INSTRUCTION SET ARCHITECTURES WITH NON-CONTIGUOUS REGISTER FILE SPECIFIERS - There are provided methods and computer program products for implementing instruction set architectures with non-contiguous register file specifiers. A method for processing instruction code includes processing a fixed-width instruction of a fixed-width instruction set using a non-contiguous register specifier of a non-contiguous register specification. The fixed-width instruction includes the non-contiguous register specifier. | 12-03-2009 |
Robert Kevin Montoye, Austin, TX US
| Patent application number | Description | Published |
|---|---|---|
| 20090019341 | DYNAMIC MEMORY ARCHITECTURE EMPLOYING PASSIVE EXPIRATION OF DATA - Apparatus for passively tracking expired data in a dynamic memory includes a time stamp memory configurable for storing information relating to a refresh status of one or more corresponding data entries in the dynamic memory. The apparatus further includes a timer configurable for defining a desired window of time in which a refresh operation of data in the dynamic memory is to occur in order to ensure that the data is valid. Control circuitry is coupled to the time stamp memory and to the timer. The control circuitry is operative to manage the information stored in the time stamp memory relating to the refresh status of the one or more corresponding data entries in the dynamic memory. | 01-15-2009 |
Tony Montoye, Drongen BE
| Patent application number | Description | Published |
|---|---|---|
| 20120031176 | SAMPLE STORAGE IN MICROFLUIDICS DEVICES - The present invention relates to a microfluidics device ( | 02-09-2012 |