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Mok, CA
Hoyin Mok, Redwood City, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090162395 | VACCINE FOR RSV AND MPV - The present invention is directed to alphavirus vectored vaccine contructs encoding paramyxovirus proteins that find use in the prevention of respiratory syncytial virus or human metapneumovirus infections. In particular, these vaccines induce cellular and humoral immune responses that inhibit RSV. Also disclosed are improved methods for producing alphavirus vectored paramyxovirus vaccines. | 06-25-2009 |
| 20100040650 | Virus-Like paramyxovirus particles and vaccines - The present invention is directed to alphavirus virus-like particles produced by synthesizing in cell, including in vivo, structural proteins in the absence of other alphavirus proteins. In particular, these virus-like particules vaccines induce cellular and humoral immune responses that can block or inhibit alphavirus infections. Also disclosed are methods of vaccinating subjects with virus-like particles and vectors encoding the same. | 02-18-2010 |
James Leung Mok, San Diego, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20120180679 | PYROTECHNIC TRAINING SYSTEM - A pyrotechnic training system includes a firing block assembly housed in a first container, a pressure-armed trigger module having two triggers housed in a second container, and a power pack/switch system that connects the firing block assembly and triggers. The first and second containers are remote from each other, and may be made from common objects that might be found in combat zones. Quick-release pins inserted through components of the firing block prevents their separation by exploding ordinance within the firing block, maintaining close electrical contacts within the firing block. The pressure-armed triggers employ a mechanical system that energizes an electrical circuit when pressure is released. Such triggers are arranged such that opening or moving the container triggers an explosion at the remote firing block assembly. | 07-19-2012 |
Janine A. Mok, Palo Alto, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20110312518 | MICROFLUIDIC DEVICES FOR MEASUREMENT OR DETECTION INVOLVING CELLS OR BIOMOLECULES - Embodiments of the invention are related to microfluidic devices for detecting or determining the concentration of biomolecules in an analyte comprising: a channel, wherein a surface of said channel is fabricated to be functionalized with at least one molecule selected to interact with a biomolecule, said channel being configured to interact with a microsphere, wherein a surface of said microsphere is fabricated to be functionalized with at least one same or different molecule selected to interact with said biomolecule; a second channel in fluid communication with said first channel; a system to move fluid containing said microsphere through said first and second channels; and a system to measure a change in electrical impedance or optical microscopy across said second channel as said microsphere moves through said second channel. Other embodiments concern related devices, and methods of making and using. | 12-22-2011 |
Kai Yau Mok, Cupertino, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20120044375 | IMAGING SYSTEMS WITH FIXED OUTPUT SIZES AND FRAME RATES - An imaging system may include an image sensor and an image encoder that encodes images from the image sensor with fixed output sizes and frame rates. The image encoder may encode images from the image sensor into an image format such as a Joint Photographic Experts Group (JPEG) format. The image encoder may insert padding data between image blocks in the encoded data to compensate in real time for variations in the encoded size of an image. The amount of padding data inserted by the encoder may be calculated to ensure the encoded image has a file size close to, but not greater than, the required fixed output size. If needed, the encoder may add additional padding data after the image blocks are encoded in a blanking period before a subsequent image is encoded so that the final size of the encoded image is equal to the required output size. | 02-23-2012 |
Ken Mok, Los Angeles, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20080268961 | METHOD OF CREATING VIDEO IN A VIRTUAL WORLD AND METHOD OF DISTRIBUTING AND USING SAME - A video of a virtual world is created utilizing stored gameplay data and game states. The gameplay data is used to re-create a given gameplay sequence in order to create video of the gameplay sequence. The gameplay sequence may be re-created using enhanced graphics to create new video files from any number of visual perspectives. | 10-30-2008 |
Ken Tsz Kin Mok, San Diego, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090079401 | SWITCH MODE POWER SUPPLY (SMPS) AND METHODS THEREOF - Embodiments of the present invention are directed to switched-mode power supply (SMPS) circuits and methods thereof. The SMPS circuit receives information related to a future load change. For example, the information may be received at a decoder (e.g., a serial bus interface (SBI) decoder) from a microprocessor or microcontroller, such as a mobile station modem (MSM). The SMPS circuit may include an analog-to-digital converter configured to sample an output volgatle of the SMPS circuit to determine a time when the future load change occurs. The SMPS circuit may further include a transient recovery circuit (TRC) for stabilizing the output voltage based on the received information when the future load change occurs. For example, the TRC calculates a duty cycle used to transition states of switches of the SMPS circuit to compensate for the future load change. | 03-26-2009 |
| 20090160251 | REDUCING CROSS-REGULATION INTERFERENCES BETWEEN VOLTAGE REGULATORS - Exemplary embodiment of a device is disclosed comprising a processor to provide instructions, a first voltage regulator in communication with the processor to receive provided instructions received from the processor and to dynamically modulate an output voltage based on the received instructions, and a plurality of second voltage regulators to receive the output voltage from the first regulator; the output voltage to reduce a cross-regulation interference between the second regulators due to a change in a load of at least one of the second voltage regulators. | 06-25-2009 |
| 20090237854 | VOLTAGE REGULATOR WITH TRANSIENT RECOVERY CIRCUIT - A power controller having good transient performance and including a voltage regulator and one or more (K) transient recovery circuits is described. The voltage regulator receives a supply voltage and generates a regulator output signal used to generate K output voltages for K loads. Each transient recovery circuit detects for transients in a respective output voltage and corrects the detected transients. In one design, the transient recovery circuit compares the output voltage against a low threshold voltage, detects a low transient when the output voltage is below the low threshold voltage, and couples the output voltage to a high voltage to correct the low transient. Alternatively or additionally, the transient recovery circuit compares the output voltage against a high threshold voltage, detects a high transient when the output voltage is above the high threshold voltage, and couples the output voltage to a low voltage to correct the high transient. | 09-24-2009 |
| 20090298415 | METHODS AND APPARATUS FOR POWER REDUCTION IN A TRANSCEIVER - An integrated circuit for achieving power reduction in a transceiver may include a jammer detector that determines an interference level corresponding to a received signal, and a transmit power detector that determines a required transmit power level for a transmitted signal. The integrated circuit may also include at least one of the following: a process monitor that determines process corners of components within the receiver and/or the transmitter, and a temperature monitor that determines a temperature of the receiver and/or the transmitter. The integrated circuit may also include a state machine. The state machine may transition the receiver from a high linearity mode to a low linearity mode if a set of operating conditions is satisfied. Similarly, the state machine may transition the transmitter from a high power mode to a low power mode if a set of operating conditions is satisfied. | 12-03-2009 |
Lawrence Mok, San Leandro, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20100177598 | Methods and Apparatuses for a Network Enabled Alarm Clock - An electronic alarm clock connected to one or more networks comprises: a network communications device, wherein the network device receives content from the networks; a touch screen; one or more speakers; and a local storage device, wherein a clock function is provided, wherein an alarm function is provided that plays user specified content at a user specified time on said screen and the speakers, and wherein a physical button is disposed on the clock to manage the alarm function during an alarm. | 07-15-2010 |
Martin S. Mok, Menlo Park, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20100262744 | MULTI-INTERFACE MULTI-CHANNEL MODULAR HOT PLUG I/O EXPANSION - A device includes a connector having first and second signal pins adapted to, when the connector is being connected to a mating connector of another device, make a first connection using the first signal pin prior to making a second connection using the second signal pin, a first circuit operatively coupled to the first signal pin and configured to identify at least three pre-determined signal patterns receivable from the another device using the first connection, wherein each of the at least three pre-determined signal patterns corresponds to one of at least three pre-determined interface protocols, and a second circuit operatively coupled to the first circuit and the second signal pin, wherein the second circuit is configured, responsive to the first circuit identifying a pre-determined signal pattern of the at least three pre-determined signal patterns, to interface with the another device using at least the second signal pin, wherein to interface with the another device is according to a pre-determined interface protocol corresponding to the pre-determined signal pattern, wherein configuring the second circuit responsive to the first circuit identifying the pre-determined signal pattern is prior to the second signal pin making the second connection. | 10-14-2010 |
Megan Mok, Pacifica, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090271218 | PATIENT-DIRECTED HEALTHCARE QUALITY IMPROVEMENT SYSTEM - Particular embodiments provide a quality adherence guide. In one embodiment, a plurality of medical records from a plurality of medical providers are received. A quality adherence guideline is used to determine if a standard of care is being adhered to by various medical providers. A quality adherence guideline is then generated using the selected standard of care. The quality adherence guideline includes a set of treatment steps that are defined by the selected standard of care. Information from the medical records associated with the patient is also used to populate the guide. During treatment of the patient, input may be received from a plurality of users from health care providers regarding the treatment steps. The patient-direct system automatically analyzes the information inserted in the guideline to determine the level of adherence that various users have achieved when compared with the industry standard for quality care. | 10-29-2009 |
| 20100228721 | CLASSIFYING MEDICAL INFORMATION IN DIFFERENT FORMATS FOR SEARCH AND DISPLAY IN SINGLE INTERFACE AND VIEW - In one embodiment, a method receives a plurality of documents. The documents may be received from different medical providers. Also, the documents may be medical record documents generated or captured in a first format and a second format. The first format may be an unstructured data format and the second format may be a structured data format. The first and second documents are then converted to a common format. For example, a common format may emerge as the most restrictive or constrained denominator of the first format and the second format. A schema is determined that provides an organizational structure with categories that can be used to index the content of the first and second documents while they are being converted to the common format. The schema and indexing enable the different formats of documents to be combined and organized simultaneously into a single view for a comprehensive review. | 09-09-2010 |
Megan Wai-Han Mok, Pacifica, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20100094658 | PATIENT DIRECTED SYSTEM AND METHOD FOR MANAGING MEDICAL INFORMATION - A system and method is provided for the management of a patient's medical records by a central data repository under the direction of the patient and enabled by an entity managing records on behalf of the patient. Medical records from a plurality of the patient's healthcare providers, including past and present healthcare providers, are maintained in this central repository in a way that provides a centralized, comprehensive, and accessible medical history of the patient, as well as a comprehensive organizational structure across all records. An embodiment has the patient directed central repository as the hub in a hub-and-spoke arrangement, where each spoke goes to one of the patient's healthcare providers, both past and present. The patient's medical records are collected from all the patient's healthcare providers, then classified, stored, and organized for use by the patient, healthcare providers, and any other authorized individuals. The records in the repository can be sorted and/or selected in several different ways and displayed to the patient or to his designated medical care providers, and to certain patient designated third parties. | 04-15-2010 |
Michael Mok, Palo Alto, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090263835 | Genes that are Up- or Down-Regulated During Differentiation of Human Embryonic Stem Cells - Genes that are up- or down-regulated during differentiation provide important leverage by which to characterize and manipulate early-stage pluripotent stem cells. Over 35,000 unique transcripts have been amplified and sequenced from undifferentiated human embryonic stem cells, and three types of differentiated progeny. Statistical analysis of the assembled transcripts identified genes that alter expression levels as differentiation proceeds. The expression profile provides a marker system that has been used to identify particular culture components for maintaining the undifferentiated phenotype. The gene products can also be used to promote differentiation; to assess other relatively undifferentiated cells (such as cancer cells); to control gene expression; or to separate cells having desirable characteristics. Manipulation of particular genes can be used to forestall or focus the differentiation process, en route to producing a specialized homogenous cell population suitable for human therapy. | 10-22-2009 |
Peter Mok, Fremont, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20100254063 | STEP DOWN DECHUCKING - A method and an apparatus for dechucking an electrostatic chuck are disclosed. The gas escapes through an opening between a wafer and a chuck in each stage of a multi-stages process. In each stage, during at least a portion of the stage, the chucking voltage is reduced to a value less than the least threshold voltage needed for holding the wafer, so that the wafer is pushed away from the chuck by the gas. Hence, the gas can escape from an opening between the wafer and the chuck, thereby increasing the dechucking rate. By controlling the decrement and/or the duration of the reduced voltage, any potential damages due to the pushed-away wafer can be minimized. | 10-07-2010 |
| 20100310341 | METHOD AND SYSTEM FOR MOVING WAFER DURING SCANNING THE WAFER - A system and a method for moving a wafer during scanning the wafer by an ion beam. The proposed system includes an extendable/retractable arm, a holding apparatus and a driving apparatus. At least a length of the extendable/retractable arm is adjustable. The holding apparatus is capable of holding a wafer and is fixed on a specific portion of the extendable/retractable arm. Furthermore, the driving apparatus is capable of extending and/or retracting the extendable/retractable arm, such that the holding apparatus is moved together with the specific portion. In addition, the proposed method includes the following steps. First, hold the wafer by a holding apparatus fixed on a specific portion of an extendable/retractable arm. After that, adjust a length of the extendable/retractable. Therefore, the holding apparatus, i.e. the wafer, can be moved by the extension/retraction of the extendable/retractable arm. | 12-09-2010 |
Ricky Mok, Daly City, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20100153162 | On-Line Appointment System - Improved approaches for providing on-line appointments over a network are disclosed. The network is, for example, a global computer network such as the Internet. According to one aspect, users are able to schedule appointments over the network by on-line means. The users are typically individuals or service providers. Service providers are often those businesses that offer appointments to schedule their services. | 06-17-2010 |
Ron Mok, Sunnyvale, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20110119360 | Establishing a Mesh Network with Wired and Wireless Links - Embodiments of the present invention solve problems experienced by mesh networks concerning loop formation where two nodes are connected by both a wired and wireless link. The present invention prevents or ‘breaks’ a loop that that would otherwise result in continually repeating and delayed network data transmission. | 05-19-2011 |
| 20110119401 | Determining Role Assignment in a Hybrid Mesh Network - Embodiments of the present invention solve problems experienced by mesh networks concerning loop formation where two nodes are connected by both a wired and wireless link. The present invention prevents or ‘breaks’ a loop that that would otherwise result in continually repeating and delayed network data transmission. | 05-19-2011 |
Sammy Mok, Cupertino, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20080246500 | HIGH DENSITY INTERCONNECT SYSTEM HAVING RAPID FABRICATION CYCLE - An improved interconnection system and method is described, such as for connectors, socket assemblies and/or probe card systems. An exemplary system comprises a probe card interface assembly (PCIA) for establishing electrical connections to a semiconductor wafer mounted in a prober. The PCIA comprises a motherboard parallel to the semiconductor wafer having an upper surface and an opposing lower planar mounting surface, a reference plane defined by a least three points located between the lower surface of the motherboard and the wafer, at least one component located below the motherboard mounting surface, and a mechanism for adjusting the planarity of the reference plane with respect to the wafer. A probe chip having a plurality of spring probes extending there from is mountable and demountable from the PCIA, without the need for further planarity adjustment. The interconnection structures and methods preferably provide improved fabrication cycles. | 10-09-2008 |
| 20080297186 | MASSIVELY PARALLEL INTERFACE FOR ELECTRONIC CIRCUIT - Several embodiments of massively parallel interface structures are disclosed, which may be used in a wide variety of permanent or temporary applications, such as for interconnecting integrated circuits (ICs) to test and burn-in equipment, for interconnecting modules within electronic devices, for interconnecting computers and other peripheral devices within a network, or for interconnecting other electronic circuitry. Preferred embodiments of the massively parallel interface structures provide massively parallel integrated circuit test assemblies. The massively parallel interface structures preferably use one or more substrates to establish connections between one or more integrated circuits on a semiconductor wafer, and one or more test modules. One or more layers on the intermediate substrates preferably include MEMS and/or thin-film fabricated spring probes. The parallel interface assemblies provide tight signal pad pitch and compliance, and preferably enable the parallel testing or burn-in of multiple ICs, using commercial wafer probing equipment. In some preferred embodiments, the parallel interface assembly structures include separable standard electrical connector components, which reduces assembly manufacturing cost and manufacturing time. These structures and assemblies enable high speed testing in wafer form. | 12-04-2008 |
| 20090064498 | Membrane spring fabrication process - Processes are described for building low compliance MEMS type C-spring probes in a coupon form that can be used as replaceable probes in probe card applications. The coupons have plated spring structures and a plated frame that holds a thin polyimide film in tension. The film keeps the probes and their tips of the top probes aligned to the pads of an IC being tested and the probes and tips of bottom probes aligned to the pads of a probe card high density interconnect that routes to an IC tester. | 03-12-2009 |
| 20090153165 | High Density Interconnect System Having Rapid Fabrication Cycle - An improved interconnection system and method is described, such as for connectors, socket assemblies and/or probe card systems. An exemplary system comprises a probe card interface assembly (PCIA) for establishing electrical connections to a semiconductor wafer mounted in a prober. The PCIA comprises a motherboard parallel to the semiconductor wafer having an upper surface and an opposing lower planar mounting surface, a reference plane defined by a least three points located between the lower surface of the motherboard and the wafer, at least one component located below the motherboard mounting surface, and a mechanism for adjusting the planarity of the reference plane with respect to the wafer. A probe chip having a plurality of spring probes extending there from is mountable and demountable from the PCIA, without the need for further planarity adjustment. The interconnection structures and methods preferably provide improved fabrication cycles. | 06-18-2009 |
| 20100066393 | HIGH DENSITY INTERCONNECT SYSTEM FOR IC PACKAGES AND INTERCONNECT ASSEMBLIES - An improved interconnection system is described, such as for electrical contactors and connectors, electronic device or module package assemblies, socket assemblies, and/or probe card assembly systems. An exemplary connector comprises a first connector structure comprising a contactor substrate having a contact surface and a bonding surface, and one or more electrically conductive micro-fabricated spring contacts extending from the probe surface, a second connector structure comprising at least one substrate and having a set of at least one electrically conductive contact pad located on a connector surface and corresponding to the set of spring contacts, and means for movably positioning and aligning the first connector structure and the second connector structure between at least a first position and a second position, such that in at least one position, at least one electrically conductive micro-fabricated spring contact is electrically connected to at least one electrically conductive contact pad. | 03-18-2010 |
| 20100213960 | Probe Card Test Apparatus And Method - A probe card analyzer mounts on a probe card in a wafer prober and a use a fixture in the wafer probe and switch electronics in place of an ATE head. Methods of testing can confirm that probe cards are operating within their specifications over large temperature ranges and the mechanical force ranges seen in real manufacturing environments. This reduces the cost and improves the accuracy and speed of analyzing probe cards and improves diagnosing problems with probe cards. | 08-26-2010 |
Yeuk-Fai E. Mok, San Francisco, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090182454 | METHOD AND APPARATUS FOR SELF-CALIBRATION OF A SUBSTRATE HANDLING ROBOT - A substrate-handling robot which serves a processing tool such as a plating tool may be automatically controlled by a controller to perform a self-calibration procedure. As part of the procedure, an end effector of the robot is moved to interact with sensors provided on a calibration fixture that is positioned in a substrate placement location for which the calibration procedure is performed. The calibration fixture may have an opening formed therein to allow movement of the robot end effector within the calibration fixture. Sensor light beams generated by the sensors may interact with the end effector during the automatic calibration process so as to determine calibration data for the substrate placement location. | 07-16-2009 |