Patent application number | Description | Published |
20100306437 | METHOD AND APPARATUS TO SELECTIVELY EXTEND AN EMBEDDED MICROPROCESSOR BUS THROUGH A DIFFERENT EXTERNAL BUS - A method and apparatus to selectively extend an embedded microprocessor bus through a different external bus are generally presented. In this regard, an apparatus is introduced comprising a first high speed serializer/deserializer (SERDES) bus internal to an integrated circuit device to couple an embedded microprocessor with an embedded component, a second high speed SERDES bus different from the first bus to couple the embedded component with an external interface of the integrated circuit device, and extension circuitry to selectively bypass the embedded component and extend the first bus to function at the external interface over a physical layer of the second bus. Other embodiments are also described and claimed. | 12-02-2010 |
20100329254 | MULTICAST SUPPORT ON A SWITCH FOR PCIe ENDPOINT DEVICES - Devices and method with hardware configured to support phantom register programming. Where phantom register programming allows a device driver for an endpoint device to program multicast registers in the device without support of the operating system. | 12-30-2010 |
20130016720 | MULTICAST SUPPORT ON A SWITCH FOR PCIe ENDPOINT DEVICES - Devices and method with hardware configured to support phantom register programming. Where phantom register programming allows a device driver for an endpoint device to program multicast registers in the device without support of the operating system. | 01-17-2013 |
20130083794 | Aggregating Completion Messages In A Sideband Interface - In one embodiment, the present invention includes a method for receiving a request in a router from a first endpoint coupled to the router, where the request is for an aggregated completion. In turn, the router can forward the request to multiple target agents, receive a response from each of the target agents, and consolidate the responses into an aggregated completion. Then, the router can send the aggregated completion to the first endpoint. Other embodiments are described and claimed. | 04-04-2013 |
20140019654 | DYNAMIC LINK WIDTH ADJUSTMENT - Embodiments help dynamically configure the width of PCIe links and also determine how to best configure the appropriate link width. This helps avoid situations where PCIe links are almost always active even at very low traffic rates. Embodiments achieve these benefits based on, for example, run-time monitoring of bandwidth requirement for integrated and non-integrated ports located downstream for the PCIe controller. This provides power savings with little impact on performance. Other embodiments are discussed herein. | 01-16-2014 |
20140095944 | METHOD AND APPARATUS FOR OPTIMIZING POWER AND LATENCY ON A LINK - An apparatus and method are disclosed to optimize the latency and the power of a link operating inside a processor-based system. The apparatus and method include a latency meter built into a queue that does not rely on a queue-depth threshold. The apparatus and method also include feedback logic that optimizes power reduction around an increasing latency target to react to sluggish re-provisioning behavior imposed by the physical properties of the link. | 04-03-2014 |
20140258492 | AGGREGATING COMPLETION MESSAGES IN A SIDEBAND INTERFACE - In one embodiment, the present invention includes a method for receiving a request in a router from a first endpoint coupled to the router, where the request is for an aggregated completion. In turn, the router can forward the request to multiple target agents, receive a response from each of the target agents, and consolidate the responses into an aggregated completion. Then, the router can send the aggregated completion to the first endpoint. Other embodiments are described and claimed. | 09-11-2014 |