Inventors list

Assignees list

Classification tree browser

Top 100 Inventors

Top 100 Assignees

Mitani, JP

Akihiro Mitani, Higashihiroshima-Shi JP

Patent application number	Description	Published
20090088281	AUTOMATIC TRANSMISSION - An automatic transmission is provided. One embodiment of the automatic transmission may include a valve body including control valves for hydraulically controlling a friction engaging element provided within said transmission. The automatic transmission may further include an electric control unit located on said valve body for controlling gear shifting of said automatic transmission. The automatic transmission may further include a transmission case having a peripheral wall for at least partially enclosing a gear shift mechanism and an outer wall provided adjacent to said peripheral wall, wherein said electric control unit is located within a containing space surrounded by said peripheral wall, said outer wall and said valve body.	04-02-2009

Akihiro Mitani, Moriyama-Shi JP

Patent application number	Description	Published
20100231094	PIEZOELECTRIC VIBRATION COMPONENT - To obtain an inexpensive piezoelectric vibration component having vibration characteristics whose degradation resulting from deposition of moisture due to a temperature change is less likely to occur without increasing the cost of a sealing structure and the number of parts, a piezoelectric vibration component includes a piezoelectric vibrating element accommodated in a package being sealed, and when the volume of the piezoelectric vibrating element is Ve and the volume within the package obtained by subtraction of the volume Ve of the piezoelectric vibrator from the volume of the space of the package is Vp	09-16-2010

Akihiro Mitani, Yasu-Shi JP

Patent application number	Description	Published
20100314971	Piezoelectric Oscillator Part - A piezoelectric oscillator part capable of suppressing oscillation that leaks from a piezoelectric oscillator to a substrate side is obtained. The piezoelectric oscillator part has a piezoelectric oscillator held on a substrate by first and second conductive holding members. The first conductive holding member is arranged proximal to a first end of the substrate. A terminal electrode connected to the first conductive holding member is arranged proximal to a second end of the substrate opposite the first end. The first conductive holding member and the terminal electrode are electrically connected by a wiring electrode.	12-16-2010

Akira Mitani, Kanagawa JP

Patent application number	Description	Published
20110136782	NITROGEN-CONTAINING HETEROCYCLIC DERIVATIVE AND FUNGICIDE FOR AGRICULTURAL AND HORTICULTURAL USE - The present invention provides a nitrogen-containing heterocyclic compound represented by formula (I) and salt thereof (wherein, R	06-09-2011

Atsuyuki Mitani, Ube JP

Patent application number	Description	Published
20100231120	CERAMIC COMPOSITE LIGHT-CONVERTING MEMBER AND LIGHT-EMITTING DEVICE USING THE SAME - The present invention relates to a ceramic composite light-converting member which is a solidified body having a texture of at least two or more oxide phases being continuously and three-dimensionally entangled with each other, where at least one of the oxide phases is a fluorescence-emitting phase and the composition as a whole is represented by:	09-16-2010

Atsuyuki Mitani, Yamaguchi JP

Patent application number	Description	Published
20080283853	Light-Emitting Diode, Light-Emitting Diode Substrate and Production Method of Light-Emitting Diode - The light-emitting diode is a light-emitting diode including a light-converting material substrate and a semiconductor layer formed on the light-converting material substrate, wherein the light-converting material substrate includes a solidified body in which at least two or more oxide phases selected from a simple oxide and a complex oxide are formed continuously and three-dimensionally entangled with each other, at least one oxide phase in the solidified body comprises a metal element capable of emitting fluorescence, and the semiconductor layer includes a plurality of compound semiconductor layers and has at least a light-emitting layer capable of emitting visible light. A light-emitting diode substrate forms a semiconductor, ensuring that the crystal-structure matching with a semiconductor for the formation of a light-emitting diode is good, a good semiconductor layer with less defects can be formed, good-efficiency light emission can be obtained from a light-emitting layer formed in the semiconductor layer, uniform florescence can be emitted by light from the light-emitting layer in the semiconductor layer, and light can be efficiently out put; and a color unevenness-free light-emitting diode using the substrate.	11-20-2008
20090166667	Substrate for Light-Emitting Diode, and Light-Emitting Diode - A substrate for light-emitting diodes, which uses no fluorescent powder, enables formation of a good light-emitting diode element, resulting in less deterioration, transmits light of the light-emitting diode element, emits light by utilizing a part of the transmitted light, and allows the transmitted light and newly emitted light to be mixed and emitted, is provided.	07-02-2009
20100181897	CERAMIC COMPOSITE FOR PHOTOTRANSFORMATION AND LIGHT EMITTING DEVICE USING THE SAME - A light-converting ceramic composite comprising a solidified body having a texture of at least two or more oxide phases being continuously and three-dimensionally entangled together, with at least one of the oxide phases being a fluorescence-emitting crystal phase, wherein the interface length between the oxide phases per 1 mm	07-22-2010

Daisuke Mitani, Ayabe-Shi JP

Patent application number	Description	Published
20100226561	PARAMETER DETERMINATION ASSISTING DEVICE AND PARAMETER DETERMINATION ASSISTING PROGRAM - This invention provides a parameter determination assisting device and a parameter determination assisting program enabling a more rapid and easy determination of a parameter to be set in a processing device, which obtains a processing result by performing a process using a set of parameters defined in advance on image data obtained by imaging a measuring target object. A user can easily select an optimum parameter set when a determination result and a statistical output are displayed in a list for each of a plurality of trial parameter candidates. For instance, while trial numbers “2”, “4”, and “5”, in which the number of false detections is zero, can perform a stable process, the parameter set of the trial number “2” is comprehensively assumed as optimum since the trial number “2” can perform the process in the shortest processing time length.	09-09-2010
20100226563	MODEL IMAGE ACQUISITION SUPPORT APPARATUS, MODEL IMAGE ACQUISITION SUPPORT METHOD, AND MODEL IMAGE ACQUISITION SUPPORT PROGRAM - The present invention provides a model image acquisition support apparatus, a model image acquisition support method, and a model image acquisition support program that can easily and swiftly obtain an optimum model image for an image processing apparatus that performs matching processing based on a model image set in advance with respect to a measurement image that is obtained by imaging an object. A plurality of model image candidates, serving as candidates for model image, are extracted from a reference image obtained by imaging an object which can be a model. Matching processing with the plurality of extracted model images is executed on measurement images actually obtained by a visual sensor, so that trial results are obtained. A trial result is generated upon evaluating each of the trial results of the matching processing with the model image. An optimum model image is determined based on the evaluation result.	09-09-2010

Hideo Mitani, Mobara JP

Patent application number	Description	Published
20090122415	Display device - The present invention provides a display device having a large-area display region which is capable of performing an image display of high quality by making, even when two display panels abut on each other, an abutting portion becomes inconspicuous. Two optical path changing lenses LPL	05-14-2009

Hiromasa Mitani, Hiratsuka-Shi JP

Patent application number	Description	Published
20090203284	METHOD OF MANUFACTURING IMAGE DISPLAY APPARATUS - The method of manufacturing an image display apparatus of the present invention includes the steps of forming the leading wires C on the rear plate, and forming the thin film insulating layer on the leading wires C by the CVD process or the sputter process. Furthermore, the method also includes the step of seal-bonding the conductive supporting frame on the thin film insulating layer with the seal-bonding material.	08-13-2009

Hironobu Mitani, Tsukuba JP

Patent application number	Description	Published
20100173896	Organic Compounds - The present invention relates to novel benzodiazepine compounds exhibiting RXR-antagonist efficacy, to the manufacture and to the use thereof.	07-08-2010

Hiroyuki Mitani, Kobe-Shi JP

Patent application number	Description	Published
20090242825	IRON-BASED SOFT MAGNETIC POWDER FOR DUST CORE, PRODUCTION METHOD THEREOF, AND DUST CORE - An iron-based soft magnetic powder for dust core includes an iron-based soft magnetic matrix powder, and arranged thereon in the following order, a phosphate coating and a silicone resin coating. The phosphate coating contains P, Co, Na, and S in combination with at least one of Al and Cs. This iron powder for dust core has superior mechanical strength, in which effective insulation is achieved between iron powdery particles even when the amount of an insulating material is reduced for realizing high-density molding. The iron powder for dust core is also superior in thermal stability, so that electrical insulation is maintained even after a heat treatment at high temperatures.	10-01-2009
20100212455	IRON-BASED SOFT MAGNETIC POWDER FOR DUST CORE, METHOD FOR MANUFACTURING THE SAME, AND DUST CORE - An iron-based soft magnetic powder for dust core having a high magnetic flux density, maintaining high electric insulation even after annealing, and more excellent in the mechanical strength in which a coating film having a phosphate conversion coating film is formed on the surface thereof and the peak height for the absorption of hydroxyl groups formed at 3700 cm	08-26-2010

Hitoshi Mitani, Kanagawa JP

Patent application number	Description	Published
20090001497	SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A semiconductor integrated circuit device includes a substrate having a PROM formed thereon in which the data memory state of the PROM is changed by the irradiation of light, and a multilayer wiring structure formed on the same side of the substrate as the PROM is formed. The multilayer wiring structure includes a transparent area, a shield area, and a PAD portion. The transparent area is formed from transparent material at a position opposite to the PROM area where the PROM is formed, and used as a light guiding path from the outside of the multilayer wiring structure to the PROM. The shield area is formed continuously from shielding materials arranged in several layers in the periphery of the transparent area. The PAD portion is formed on the outside of the shield area in regard to the transparent area, and controls the memory state of the PROM.	01-01-2009
20090206410	Semiconductor device and method for manufacturing the same - Semiconductor devices required forming a stress control film to handle different stresses on each side when optimizing the stress on the respective P channel and N channel sections. A unique feature of the semiconductor device of this invention is that P and N channel stress are respectively optimized by making use of a stress control film jointly for the P and N channels that conveys stress in different directions by utilizing the film thickness.	08-20-2009
20110050891	IMAGING DEVICE, GPS CONTROL METHOD, AND COMPUTER PROGRAM - An imaging device includes an imaging unit configured to execute processing to capture image data, a global positioning system (GPS) device configured to execute position calculation processing based on data received from a satellite, and a main controller configured to measure an imaging frequency of the imaging unit, to determine or update a control parameter as a condition for a transition of an operation state of the GPS device based on the measured imaging frequency, and to cause a transition of the operation state of the GPS device based on the determined or updated control parameter.	03-03-2011

Ikuo Mitani, Takatsuki JP

Patent application number	Description	Published
20110077267	TRIAZOLOPYRIDINE COMPOUND, AND ACTION THEREOF AS PROLYL HYDROXYLASE INHIBITOR OR ERYTHROPOIETIN PRODUCTION-INDUCING AGENT - The present invention provides a triazolopyridine compound having a prolyl hydroxylase inhibitory action and an erythropoietin production-inducing ability. The present invention relates to a compound represented by the following formula [I]:	03-31-2011

Junichi Mitani, Kawasaki JP

Patent application number	Description	Published
20090127666	SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING THE SAME, AND PHASE SHIFT MASK - A main wall part is provided so as to surround an integrated circuit part. A sub-wall part which is in “L” shape is provided between each corner of the main wall part and the integrated circuit part. Therefore, even if the stress is concentrated due to heat treatment or the like, the stress is dispersed to the main wall part and the sub-wall part, and hence peeling between layers and a crack are unlikely to occur, as compared with the conventional art. Further, even if the crack and the like occur at the corner, moisture from the outside hardly reaches the integrated circuit part when the main wall part and the sub-wall part are coupled to each other. For this reason, it is possible to ensure an extremely high moisture resistance.	05-21-2009
20090166746	SEMICONDUCTOR DEVICE - A semiconductor device has a first and a second active regions of a first conductivity type disposed on a semiconductor substrate, a third and a fourth active regions of a second conductivity type disposed on the semiconductor substrate, the second and the fourth active regions having sizes larger than those of the first and the third active regions respectively, a first electroconductive pattern disposed adjacent to the first active region and having a first width, a second electroconductive pattern disposed adjacent to the second active region and having a second width larger than the first width, a third electroconductive pattern disposed adjacent to the third active region and having a third width; and a fourth electroconductive pattern disposed adjacent to the fourth active region and having a fourth width smaller than the third width.	07-02-2009

Junichi Mitani, Shizuoka JP

Patent application number	Description	Published
20100170467	BALANCER OF ENGINE, ENGINE, AND OUTBOARD MOTOR - A balancer of an engine includes a rod and a balancer piston. A first end portion of the rod includes a joining portion which is arranged to be joined to a crankshaft of the engine at a position that is eccentric relative to a rotation axis of the crankshaft. A second end portion of the rod is arranged to reciprocate inside a cylinder according to a rotation of the crankshaft. The balancer piston is fixed to the second end portion of the rod. The balancer piston is arranged to reciprocate inside the cylinder, while rocking between a contact state in which the balancer piston is in contact with an inner wall surface of the cylinder and a non-contact state in which the balancer piston is separated from the inner wall surface. The balancer piston includes a cylindrical outer peripheral portion that is curved so as to swell toward the inner wall surface. The outer peripheral portion is arranged such that lines of intersection with planes perpendicular or substantially perpendicular to a central axis of the balancer piston define circles. The outer peripheral portion includes a contact start portion which is arranged to come into contact first with the inner wall surface when the balancer piston switches from the non-contact state to the contact state. A distance from a center of a maximum outer diameter circle with the largest radius among the circles to the contact start portion is larger than the radius of the maximum outer diameter circle.	07-08-2010

Kazutami Mitani, Aichi JP

Patent application number	Description	Published
20080248204	PREPREG AND METHOD OF MANUFACTURING THE PREPREG - The present invention relates to a prepreg which is free from the phenomenon that air is trapped between layers to generate voids, has good handling characteristics and can produce molded articles having any complicated shape and also relates to a method of producing the prepreg. A reinforced-fiber sheet is impregnated with a matrix resin so as to form a continuous resin layer at least in the inside thereof, and then, a protective film having an irregular surface is applied to at least one surface of the reinforced-fiber sheet impregnated with the matrix resin such that the irregular surface faces the reinforced-fiber sheet. In this state, the prepreg is allowed to leave at 30 to 60° C. under the atmosphere for 12 hours or more. The resulting prepreg (	10-09-2008

Kenichi Mitani, Takahama-Shi JP

Patent application number	Description	Published
20100239468	EXHAUST GAS PURIFYING APPARATUS AND METHOD FOR MANUFACTURING EXHAUST GAS PURIFYING APPARATUS - An exhaust gas purifying apparatus includes an exhaust gas treating body, a metal casing, and a holding sealing material. The exhaust gas treating body has a longitudinal direction and includes cell walls extending along the longitudinal direction to define cells between the cells. The metal casing has an inner surface and houses the exhaust gas treating body to face the inner surface. The holding sealing material is provided between the exhaust gas treating body and the inner surface of the metal casing to hold the exhaust gas treating body in the metal casing. The holding sealing material includes an inorganic fiber aggregated body. The metal casing has a corrosion area at least on a part of the inner surface. The corrosion area includes a corroded base material of the metal casing.	09-23-2010

Kenichi Mitani, Ogaki-Shi JP

Patent application number	Description	Published
20090081455	INORGANIC FIBER MAT, HOLDING SEALER, SOUND ABSORBER, AND METHOD FOR MANUFACTURING INORGANIC FIBER MAT - An inorganic fiber mat includes an inorganic fiber aggregated body which includes inorganic fibers. At least a part of the inorganic fibers located on a surface of the inorganic fiber aggregated body is fused to each other by heat.	03-26-2009

Kinji Mitani, Higashimurayama JP

Patent application number	Description	Published
20090037767	NONVOLATILE MEMORY SYSTEM - A memory system permitting a number of alternative memory blocks to be made ready in order to extend the rewritable life and thereby contributing to enhanced reliability of information storage is to be provided. The memory system is provided with a nonvolatile memory having a plurality of data blocks in predetermined physical address units and a controller for controlling the nonvolatile memory in response to an access request from outside. Each of the data blocks has areas for holding a rewrite count and error check information regarding each data area. The controller, in a read operation on the nonvolatile memory, checks for any error in the area subject to the read according to error check information and, when there is any error, if the rewrite count is greater than a predetermined value, will replace the pertinent data block with another data block or if it is not greater, correct data in the data block pertaining to the error.	02-05-2009

Kiyoshi Mitani, Annaka JP

Patent application number	Description	Published
20110045246	SILICON SINGLE CRYSTAL WAFER AND METHOD FOR MANUFACTURING SILICON SINGLE CRYSTAL WAFER, AND METHOD FOR EVALUATING SILICON SINGLE CRYSTAL WAFER - A method for manufacturing a silicon single crystal wafer, having at least: a step of preparing a silicon single crystal ingot; a step of slicing the silicon single crystal ingot to fabricate a plurality of sliced substrates; a processing step of processing the plurality of sliced substrates into a plurality of substrates by performing at least one of lapping, etching, and polishing; a step of sampling at least one from the plurality of substrates; a step of measuring surface roughness of the substrate sampled at the sampling step by an AFM and obtaining an amplitude (an intensity) of a frequency band corresponding to a wavelength of 20 nm to 50 nm to make a judgment of acceptance; and a step of sending the substrate to the next step if a judgment result is acceptance or performing reprocessing if the judgment result is rejection.	02-24-2011

Kiyoshi Mitani, Gunma JP

Patent application number	Description	Published
20080286937	Manufacturing Method for Bonded Wafer - In a first ion implantation step (a1), a delamination-intended ion implantation layer	11-20-2008
20080299376	SILICON ON INSULATOR (SOI) WAFER AND PROCESS FOR PRODUCING SAME - Ion injection is performed to a single crystal silicon wafer to form an ion injection layer, with the ion injection surface of the single crystal silicon wafer and/or the surface of the transparent insulation substrate are/is processed using plasma and/or ozone. The ion injection surface of the single crystal silicon wafer and the surface of the transparent insulation substrate are bonded to each other by bringing them into close contact with each other at room temperature. A silicon on insulator (SOI) wafer is obtained by mechanically peeling the single crystal silicon wafer by giving an impact to the ion injection layer, to form an SOI layer on the transparent insulation substrate, and thermal processing for flattening the SOI layer surface is performed to the SOI wafer, under an atmosphere of an inert gas, a hydrogen gas, and a mixture gas of them.	12-04-2008
20080305317	SILICON ON INSULATOR (SOI) WAFER AND PROCESS FOR PRODUCING SAME - In a manufacturing method for manufacturing a silicon on insulator (SOI) wafer, an ion injection layer is formed within the wafer, by injecting a hydrogen ion or a rare gas ion from a surface of the single crystal silicon wafer, the ion injection surface of the single crystal silicon wafer and/or a surface of the transparent insulation substrate is processed using plasma and/or ozone, the ion injection surface of the single crystal silicon wafer is bonded to the surface of the transparent insulation substrate, by bringing them into close contact with each other at room temperature, with the processed surface(s) as bonding surface(s), and an SOI layer is formed on the transparent insulation substrate, by mechanically peeling the single crystal silicon wafer by giving an impact to the ion injection layer.	12-11-2008
20080305318	SILICON ON INSULATOR (SOI) WAFER AND PROCESS FOR PRODUCING SAME - In a manufacturing method of manufacturing a silicon on insulator (SOI) wafer, a single crystal silicon whose surface is an N region on an outer side of an OSF region, is grown and sliced to fabricate an N region single crystal silicon. An ion injection layer is formed within the N region single crystal silicon wafer by injecting a hydrogen ion or a rare gas ion from a surface of the N region single crystal silicon wafer; the ion injection surface of the N region single crystal silicon wafer and/or a surface of the transparent insulation substrate is processed using plasma and/or ozone. The ion injection surface is bonded to the surface of the transparent insulation substrate by bringing them into close contact with each other at room temperature. An SOI layer is formed by mechanically peeling the single crystal silicon wafer.	12-11-2008
20090203167	Method for Manufacturing Bonded Substrate - The present invention provides a method for manufacturing a bonded substrate that is a method for manufacturing a bonded substrate where an active layer wafer is bonded to a support substrate wafer, comprising: a first step of providing a groove on an inner side on a surface of the active layer wafer along an outer peripheral portion over an entire circumference; a second step of determining a surface where the groove is formed as a bonding surface and bonding the active layer wafer to the support substrate wafer; and a third step of reducing a film thickness of the active layer wafer and removing an unbonded portion on an outer side of the groove of the active layer wafer. As a result, there is provided the method for manufacturing a bonded substrate that can simplify processes, avoid breakage, cracks, or particle generation, and manage a shape of an edge portion of an active layer wafer when reducing a film thickness of the active layer wafer.	08-13-2009

Koichi Mitani, Toyokawa-Shi JP

Patent application number	Description	Published
20110148023	POST-PROCESSING DEVICE - A post-processing device includes a pair of rollers, each arranged such that an axis direction thereof is perpendicular to a transport direction of recording sheets, that forms a fold in the axis direction at a predetermined portion of both surfaces of each recording sheet, a first plate-like member, arranged opposite the pair of rollers, that moves between a feeding position allowing the predetermined portion of each recording sheet to be pinched with a nip portion of the pair of rollers and a standby position being distant from the nip portion, a transport processing unit that causes the recording sheets to be sequentially transported such that the predetermined portion of each recording sheet intervenes between the first plate-like member and the pair of rollers and to be folded by the pair of rollers, and a post-processing unit bundles the recording sheets on each of which the fold has been formed.	06-23-2011

Makoto Mitani, Chiba-Shi JP

Patent application number	Description	Published
20090201006	CONSTANT CURRENT CIRCUIT - Provided is a constant current circuit capable of supplying a stable constant current. Even when K values of NMOS transistors vary due to manufacturing fluctuations in semiconductor devices, a voltage generated across a resistor is always a threshold voltage difference between the NMOS transistors, and thus hardly varies. Even when the K values of the NMOS transistors vary due to a change in temperature, the voltage generated across the resistor is always the threshold voltage difference between the NMOS transistors, and thus hardly varies.	08-13-2009

Makoto Mitani, Kanagawa JP

Patent application number	Description	Published
20090098381	Capsular Fine Particle Comprising Olefinic Polymer - To provide capsular fine particles comprising an olefinic polymer which have a uniform particle size distribution and a uniform particle size, and which are spherical and free from the coagulation between particles. Capsular fine particles comprising the olefinic polymer, of which the ratio (L/M) of the outer diameter (L) to the inner diameter (M) is 1.1 to 6.0, and the average diameter is 0.6 to 40 μm.	04-16-2009

Makoto Mitani, Yokohama-Shi JP

Patent application number	Description	Published
20100267908	Catalyst for olefin polymerization, process for producing olefin polymer, olefin copolymer, novel transition metal compound, and process for producing transition metal compound - [Task] To provide a catalyst for olefin polymerization having an excellent olefin polymerization performance and capable of producing a polyolefin with excellent properties.	10-21-2010

Makoto Mitani, Sodegaura-Shi JP

Patent application number	Description	Published
20090118426	OLEFIN POLYMER AND PROCESS FOR PREPARING THE SAME - The present invention provides an olefin polymer having a narrow molecular weight distribution and a specific molecular weight, an olefin polymer having a functional group introduced at the terminal, a tapered polymer containing a segment wherein monomer composition continuously changes in the polymer chain, an olefin polymer having different segments which are bonded to each other, and a process for preparing these polymers. The olefin polymers of the invention are polymers of olefins of 2 to 20 carbon atoms and have a number-average molecular weight of not less than 500 and Mw/Mn of not more than 1.5. In the process for preparing an olefin polymer, an olefin of 2 to 20 carbon atoms is polymerized in the presence of an olefin polymerization catalyst comprising a transition metal compound represented by, for example, the following formula (I):	05-07-2009

Makoto Mitani, Chilba-Shi JP

Patent application number	Description	Published
20100188137	BOOSTING CIRCUIT - Provided is a boosting circuit having a small circuit scale. When a node (Vg) is reset by a reset transistor (M	07-29-2010

Masahiro Mitani, Chiba-Shi JP

Patent application number	Description	Published
20100321845	OVERHEAT PROTECTION CIRCUIT AND POWER SUPPLY INTEGRATED CIRCUIT - Provided is a power supply integrated circuit including an overheat protection circuit with high detection accuracy. The overheat protection circuit includes: a current generation circuit including: a first metal oxide semiconductor (MOS) transistor including a gate terminal and a drain terminal that are connected to each other, the first MOS transistor operating in a weak inversion region; a second MOS transistor including a gate terminal connected to the gate terminal of the first MOS transistor, the second MOS transistor having the same conductivity type as the first MOS transistor and operating in a weak inversion region; and a first resistive element connected to a source terminal of the second MOS transistor; and a comparator for comparing a reference voltage having positive temperature characteristics and a temperature voltage having negative temperature characteristics, which are obtained based on a current generated by the current generation circuit.	12-23-2010
20110169457	BATTERY PACK - Provided is a battery pack capable of implementing temperature protection with ease. Regardless of whether or not a battery protection IC (	07-14-2011

Masahiro Mitani, Kanagawa JP

Patent application number	Description	Published
20090218943	DISPLAY DEVICE AND ELECTRONIC EQUIPMENT - A display device includes: a display area having a resonator structure for resonating produced light; a protective film formed to cover the display area; a resin layer formed on the protective film; and a sealing layer attached by the resin layer, wherein the protective film includes a single silicon nitride layer, and has a refractive index between 1.65 and 1.75 at a wavelength of nm.	09-03-2009

Masanori Mitani, Higashikagawa-Shi JP

Patent application number	Description	Published
20100297371	FILM FOR FOOD PACKAGING - A film for food packaging which is excellent in workability, processability, productivity, gas-barrier properties, low-temperature heat sealability, safety, and mechanical strength. It can be a substitute for conventional cellophane/wax films, and is suitable for use as a packaging film for molten cheese, etc. The film for food packaging is composed of at least five layers, i.e., a fusion-bondable layer/adhesive layer/gas-barrier layer/adhesive layer/fusion-bondable layer, wherein the fusion-bondable layers are made of an olefin resin and melt at a temperature which is not lower than 60° C. and is lower than 90° C.	11-25-2010

Masateru Mitani, Shizuoka-Ken JP

Patent application number	Description	Published
20100007903	PRINT ATTRIBUTE SETTING APPARATUS, PRINT ATTRIBUTE SETTING METHOD, AND PRINT ATTRIBUTE SETTING PROGRAM - Print attributes are set in print type where a plurality of original paper images are arranged on at least one surface of print paper so that useless print can be prevented. A print attribute for defining a specific relationship between an original paper size and a print paper size is provided as one of the print attributes of the print type, one print attribute is selected from a plurality of options so that the specific relationship between the original paper size and the print paper size is set. As a result, a combination of the original paper size and the print paper size intended by a user can be set securely even in the above print type, so that useless print can be prevented securely.	01-14-2010
20100177347	IMAGE FORMING PROCESSING CONTROLLER AND METHOD AND COMPUTER-READABLE MEDIUM THEREOF - To provide a technique for enabling formation of a background pattern image even if a dedicated computer program corresponding to an image forming apparatus caused to execute image formation processing is not installed in an apparatus configured to instruct the image formation processing. An image-formation-processing control apparatus includes: a unit-pattern acquiring unit configured to acquire, via a network, unit patterns used for formation of a background pattern image in image forming apparatuses that are instruction targets of image formation processing; and a PDL-data generating unit configured to generate PDL data in which information used for specifying a shape of a background pattern image that should be formed and the unit patterns used for formation of a background pattern image in an image forming apparatus caused to execute the image formation processing are associated.	07-15-2010
20110063664	PRINT SETTING SUPPORT APPARATUS AND PRINT SETTING SUPPORT METHOD - A print setting support apparatus includes a content information acquisition section to acquire print content information relating to a content of a printing scheduled to be executed, a determination section to determine, based on the print content information acquired by the content information acquisition section, whether specified favorite setting is to be applied, a setting value acquisition section to acquire information relating to the specified favorite setting when it is determined that the specified favorite setting is to be applied, and a setting application section to automatically apply, as a print setting, a setting content of the specified favorite setting based on the information acquired by the setting value acquisition section.	03-17-2011

Mitsuhiro Mitani, Toyonaka-Shi JP

Patent application number	Description	Published
20110170655	TABLET FEEDER - A tablet T is divided without moving a cutter and divided tablets T	07-14-2011

Nanako Mitani, Kanagawa JP

Patent application number	Description	Published
20100041146	THREE-DIMENSIONAL CELL CULTURE CARRIER AND METHOD FOR CELL CULTURE USING THE SAME - A three-dimensional cell culture carrier of the present invention includes a fibrous structure having a three-dimensional space for cell culture. The fibrous structure is formed of a plurality of intertangled fibers. Each of the fibers used in the fibrous structure is made of a material having a visible light transmittance of 40% or more (preferably 50% or more) when it is formed into a shape having a thickness of 3 mm. Examples of such fibers include glass fibers. The fiber has an aspect ratio of 1 or more, and a fiber diameter of 100 μm to 700 μm.	02-18-2010

Naoji Mitani, Nagasaki JP

Patent application number	Description	Published
20100212588	SEMICONDUCTOR SINGLE CRYSTAL PRODUCTION APPARATUS - An apparatus designed to increase the quality of a low-resistance semiconductor single crystal doped with an N-type volatile dopant to a high concentration and increase the production yield by controlling the pressure inside the furnace with good controllability. A vacuum line, a pressure control valve, and an open valve are newly added to the conventional semiconductor single crystal production apparatus. A controller controls the pressure control valve on the basis of a detection value of pressure detection means so as to obtain the desired low resistance value of the semiconductor single crystal. The open valve is controlled so that the open valve is opened in a case where the pressure inside the furnace detected by the pressure detection means reaches an abnormal value.	08-26-2010

Naojl Mitani, Nagasaki JP

Patent application number	Description	Published
20100165321	POSITION MEASURING DEVICE AND POSITION MEASURING METHOD IN SEMICONDUCTOR SINGLE CRYSTAL MANUFACTURING DEVICE - While position measurement of an edge position of a thermal shield takes place in a short time with high working efficiency, the edge position can be measured accurately without variation. First determination takes place while a distance is measured with a first scanning interval. When a change in a measured distance which can be determined as the edge position is determined as a result, an optical scanning position is returned by a predetermined amount reversely to the scanning direction (or reversely to the scanning direction), and while laser beam is scanned again from the returned optical scanning position, second determination takes place while measuring the distance with a second scanning interval shorter than the first scanning interval. If a change in the measured distance which can be determined as the edge position is determined as a result, the laser beam is determined finally to be reflected at an edge of a rim of the thermal shield at the optical scanning position at a time point when the change is determined.	07-01-2010

Osamu Mitani, Chiba JP

Patent application number	Description	Published
20080319121	Room-Temperature Curable Organopolysiloxane Composition and Electrical or Electronic Devices - A room-temperature curable organopolysiloxane composition comprising: (A) organopolysiloxane that contains in each molecule at least two trialkoxysilyl-containing groups that are bonded to silicon atoms of the molecular chain; (B) diorganodi-alkoxysilane or product of its partial hydrolyzation; (C) organopolysiloxane that contains at least one silicon-bonded phenyl group in each molecule and is free of alkoxy groups; and (D) a titanium chelate catalyst, adheres during curing to a substrate with a sufficient strength but allows separation of a cured body of the composition from the substrate at the interface even after a long period of time.	12-25-2008
20090105441	Curable Organopolysiloxane Composition - A curable organopolysiloxane composition comprising: (A) an organopolysiloxane (a1) that contains in one molecule at least one silicon-bonded alkoxysilyl-containing group and an average of at least 0.5 alkenyl groups; or a mixture of said organopolysiloxane (a1) with an organopolysiloxane (a2) that contains in one molecule at least two alkenyl groups and that is free of the alkoxysilyl-containing groups; (B) an organopolysiloxane that contains in one molecule at least two silicon-bonded hydrogen atoms; (C) an organosilicon compound that contains in one molecule at least one silicon-bonded alkoxy group and that is free of the alkoxysilyl-containing groups; and (D) a hydrosilylation-reaction catalyst, has good adhesion to unclean aluminum die castings, PPS resins, etc., even when cured by heating at relatively low temperatures such as 100° C.	04-23-2009

Ryo Mitani, Yokosuka-Shi JP

Patent application number	Description	Published
20080212373	SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE WITH A STACKED GATE INCLUDING A FLOATING GATE AND A CONTROL GATE - A semiconductor integrated circuit device includes first and second nonvolatile semiconductor memories. The first memory has first and second select transistors and first memory cell transistors. The first memory cell transistor has a first floating gate on a first gate insulating film and a first control gate on a first inter-gate insulating film. The second memory has a third select transistor and a second memory cell transistor. The second memory cell transistor has a second floating gate on a second gate insulating film and a second control gate on a second inter-gate insulating film. The first and second gate insulating films have the same film thickness. The first and second floating gates have the same film thickness. The first and second inter-gate insulating films have the same film thickness. The first and second control gates have the same film thickness.	09-04-2008

Satoshi Mitani, Kanagawa JP

Patent application number	Description	Published
20110187899	IMAGE PROCESSING DEVICE, IMAGE PROCESSING METHOD, PROGRAM, AND ELECTRONIC DEVICE - An image processing device for detecting a skin region representing a skin of a subject from a pickup image obtained by imaging said subject, the image processing device includes: a first irradiating section; a second irradiating section; an image pickup section; an adjusting section; and a skin detecting section.	08-04-2011

Shigetomo Mitani, Kasugai JP

Patent application number	Description	Published
20080224893	OBJECT DETECTOR FOR A VEHICLE - An object detector for a vehicle transmits a beam of electromagnetic waves forward to scan a target area, receives reflected waves from an object in front, and detects the object from received signals. Received signals are cumulatively added up for each of areas into which the target area is divided. Noise is removed from obtained data by time series filtering. If the value of a peak in data is less than that of the corresponding peak obtained in the previous scan by more than a specified value, such data are considered as an after image and not detected as an object.	09-18-2008

Shigeyuki Mitani, Yokohama-Shi JP

Patent application number	Description	Published
20100251110	DOCUMENT PROCESSING APPARATUS, CONTROL METHOD THEREFOR, AND COMPUTER-READABLE STORAGE MEDIUM STORING PROGRAM FOR THE CONTROL METHOD - When editing a document having a page that contains image data and text data arranged to coexist, a document processing apparatus determines whether text data exists in each text region in the page. Then, when a user inputs a predetermined operation, among a plurality of text regions in the page, the document processing apparatus performs, on a screen thereof, enlargement display of ranges respectively containing text regions each of which is determined so that text data exists therein. Consequently, when editing a document having a page that contains image data and text data arranged to coexist, users can easily confirm input contents of text.	09-30-2010
20110173531	DIGITAL DOCUMENT EDITING METHOD, DIGITAL DOCUMENT EDITING PROGRAM AND DIGITAL DOCUMENT EDITING APPARATUS - The invention relates to an editing of a digital document containing an image, a text, a pattern and the like on pages constituting the digital document. In response to an operation for deleting an image positioned in a page, such image is not added to another page but is moved to and displayed in an evacuation area provided independently from the page area. In the evacuation area, such image is displayed together with a serial number of the page in which such image was present originally. Thus the page layout is not destructed in pages other than the page of image deletion, and the user can easily confirm later the image existed in such page.	07-14-2011

Shinichiro Mitani, Tokorozawa-Shi JP

Patent application number	Description	Published
20090140349	SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND PROCESS FOR MANUFACTURING THE SAME - A SRAM of complete CMOS type having its memory cell composed of six MISFETs, in which a pair of local wiring lines for connecting the input/output terminals of CMOS inverters are formed of a refractory metal silicide layer formed over a first conducting layer constituting the individual gate electrodes of the drive MISFETs, the transfer MISFETs and the load MISFETs of the memory cell and in which a reference voltage line formed over the local wiring lines is arranged to be superposed over the local wiring lines to form a capacity element. Moreover, the capacity element is formed between the local wiring lines and the first conducting layer by superposing the local wiring lines over the first conducting layer. Moreover, the local wiring lines are formed by using resistance lowering means such as silicification. In addition, there are made common the means for lowering the resistance of the gate electrode of the transfer MISFETs and the means for forming the local wiring lines.	06-04-2009
20110076820	SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND PROCESS FOR MANUFACTURING THE SAME - A SRAM of complete CMOS type having its memory cell composed of six MISFETs, in which a pair of local wiring lines for connecting the input/output terminals of CMOS inverters are formed of a refractory metal silicide layer formed over a first conducting layer constituting the individual gate electrodes of the drive MISFETs, the transfer MISFETs and the load MISFETs of the memory cell and in which a reference voltage line formed over the local wiring lines is arranged to be superposed over the local wiring lines to form a capacity element. Moreover, the capacity element is formed between the local wiring lines and the first conducting layer by superposing the local wiring lines over the first conducting layer. Moreover, the local wiring lines are formed by using resistance lowering means such as silicification. In addition, there are made common the means for lowering the resistance of the gate electrode of the transfer MISFETs and the means for forming the local wiring lines.	03-31-2011
20110159653	SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND PROCESS FOR MANUFACTURING THE SAME - A SRAM of complete CMOS type having its memory cell composed of six MISFETs, in which a pair of local wiring lines for connecting the input/output terminals of CMOS inverters are formed of a refractory metal silicide layer formed over a first conducting layer constituting the individual gate electrodes of the drive MISFETs, the transfer MISFETs and the load MISFETs of the memory cell and in which a reference voltage line formed over the local wiring lines is arranged to be superposed over the local wiring lines to form a capacity element. Moreover, the capacity element is formed between the local wiring lines and the first conducting layer by superposing the local wiring lines over the first conducting layer. Moreover, the local wiring lines are formed by using resistance lowering means such as silicification. In addition, there are made common the means for lowering the resistance of the gate electrode of the transfer MISFETs and the means for forming the local wiring lines.	06-30-2011

Shinichiro Mitani, Tokorazawa-Shi JP

Patent application number	Description	Published
20110156155	SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND PROCESS FOR MANUFACTURING THE SAME - A SRAM of complete CMOS type having its memory cell composed of six MISFETs, in which a pair of local wiring lines for connecting the input/output terminals of CMOS inverters are formed of a refractory metal silicide layer formed over a first conducting layer constituting the individual gate electrodes of the drive MISFETs, the transfer MISFETs and the load MISFETs of the memory cell and in which a reference voltage line formed over the local wiring lines is arranged to be superposed over the local wiring lines to form a capacity element. Moreover, the capacity element is formed between the local wiring lines and the first conducting layer by superposing the local wiring lines over the first conducting layer. Moreover, the local wiring lines are formed by using resistance lowering means such as silicification. In addition, there are made common the means for lowering the resistance of the gate electrode of the transfer MISFETs and the means for forming the local wiring lines.	06-30-2011

Shogo Mitani, Sakura-Shi JP

Patent application number	Description	Published
20090124046	METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE - A method of manufacturing a semiconductor package, including at least a step A that forms a first transforming portion by irradiating a laser beam on at least a portion of a first substrate; a step B that joins together the first substrate and a second substrate in which a functional element is disposed; a step C that removes the first transforming portion that is disposed on the first substrate by etching; and a step D that forms a conductive portion in the first substrate by filling a conductive material in a portion where the first transforming portion has been removed.	05-14-2009
20100330746	METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE - A method of manufacturing a semiconductor package, including at least a step A that forms a first transforming portion by irradiating a laser beam on at least a portion of a first substrate; a step B that joins together the first substrate and a second substrate in which a functional element is disposed; a step C that removes the first transforming portion that is disposed on the first substrate by etching; and a step D that forms a conductive portion in the first substrate by filling a conductive material in a portion where the first transforming portion has been removed.	12-30-2010

Shuhei Mitani, Kyoto JP

Patent application number	Description	Published
20110012132	Semiconductor Device - Provided is a semiconductor device which has improved withstand voltage and can be manufactured by simpler manufacturing process. The semiconductor device according to the present invention includes: a SiC-containing n-type epitaxial layer	01-20-2011

Tadaoki Mitani, Ishikawa JP

Patent application number	Description	Published
20080200329	Method for Producing Catalyst - A method for producing a catalyst, comprising the step of supporting a metal atom on a support in which a thiol group is introduced on its surface. The catalyst is useful for a catalytic electrode of fuel cells, a composite electrode of capacitors or secondary batteries, a catalyst for an organic synthesis, a catalyst for an environmental cleanup, or the like.	08-21-2008

Takashi Mitani, Mitoyo-Shi JP

Takayuki Mitani, Hitachinaka JP

Patent application number	Description	Published
20090305122	LITHIUM-ION SECONDARY BATTERY - A lithium-ion secondary battery capable of preventing an internal short-circuit due to application of possible vibrations without degradation of large-current discharge performance to ensure high reliability for a long time of use.	12-10-2009

Tateki Mitani, Chiyoda-Ku JP

Patent application number	Description	Published
20110050179	IDLE STOP CONTROL DEVICE AND IDLE STOP CONTROL METHOD - An idle stop control device for determining on the basis of a charging state of a battery whether idle stop should be executed or not includes, as a unit for detecting the charge state of the battery, an optical fiber type battery solution concentration sensor including an optical fiber which is partially immersed in battery solution to measure the refractive index of the battery solution, thereby measuring the concentration of the battery solution.	03-03-2011
20110166771	FUEL CONTROL SYSTEM - A fuel control system of the present invention is a fuel control system that controls a fuel injection quantity of an internal combustion engine by controlling combustion of a fuel at a theoretical air-fuel ratio, and is characterized in that the fuel control system estimates a volume of the fuel injection quantity from a measured refractive-index value of the fuel and controls it.	07-07-2011

Tetsuya Mitani, Kanagawa JP

Patent application number	Description	Published
20110188075	PRINTING SYSTEM AND METHOD OF CONTROLLING PRINTER DEVICE - A printing system has a printer device including a communication control portion and a print engine carrying out a print processing, and an information processing device connected to the printer device as external equipment via a USB interface, the printer device being connected to external equipment by the communication function of the communication control portion via a USB interface, and inputting the electric power of the print engine by a print request from the external equipment to perform the print processing in a printer standby state in which the electric power of the print engine is reduced while maintaining the communication function of the communication control portion.	08-04-2011

Tetsuya Mitani, Wako-Shi JP

Patent application number	Description	Published
20080230257	GROMMET AND ASSEMBLING METHOD THEREFOR	09-25-2008
20090065235	GROMMET - In a grommet (	03-12-2009

Tomohiro Mitani, Fukui JP

Patent application number	Description	Published
20110179869	ANGULAR VELOCITY SENSOR ELEMENT, ANGULAR VELOCITY SENSOR AND ANGULAR VELOCITY SENSOR UNIT BOTH USING ANGULAR VELOCITY SENSOR ELEMENT, AND SIGNAL DETECTING METHOD FOR ANGULAR VELOCITY SENSOR UNIT - The angular velocity sensor of the present invention has one end connected to holding section and the other end connected to weighting section. According to the angular velocity sensor, driving arm has a dog-leg structure of arms extending in a direction perpendicular to a connecting direction of holding section and weighting section.	07-28-2011

Toshiaki Mitani, Nagano JP

Patent application number	Description	Published
20090071325	CYLINDER DEVICE - A cup seal	03-19-2009

Yasumasa Mitani, Yokohama-Shi JP

Patent application number	Description	Published
20100221787	ISOTHERMAL AMPLIFICATION METHOD AND DNA POLYMERASE USED IN THE SAME - A DNA polymerase suitable for specific isothermal amplification methods and an isothermal amplification method using the DNA polymerase are provided. In the presence of a DNA polymerase including a protein described in the following item (a) or (b), an amplification reaction of a target nucleic acid sequence in a nucleic acid sample is carried out isothermally using a first primer shown in the following (X). By using the DNA polymerase, it becomes possible to carry out the amplification reaction using the primer within a shorter time than ever before.	09-02-2010

Yasumasa Mitani, Hiroshima JP

Patent application number	Description	Published
20090042197	METHOD FOR DETECTING AND AMPLIFYING NUCLEIC ACID - Problem to be Solved There is provided a method for detecting and/or amplifying a nucleic acid contained in a biological sample such as blood or cells conveniently, rapidly, and effectively.	02-12-2009

Yasumasa Mitani, Hiroshima-Ken JP

Patent application number	Description	Published
20110059868	PROCESS FOR AMPLIFYING NUCLEIC ACIDS - The present invention relates to a process for synthesizing or amplifying efficiently a nucleic acid comprising a target nucleic acid sequence. In the process according to the present invention, a primer comprising in its 3′-end portion a sequence (Ac′) which hybridizes a sequence (A) in the 3′-end portion of the target nucleic acid sequence, and in the 5′-side of said sequence (Ac′) a sequence (B′) which hybridizes the complementary sequence (Bc) of a sequence (B) positioned in the 5′-side of said sequence (A) on the target nucleic acid sequence, wherein {X−(Y−Y′)}/X is in the range of −1.00 to 1.00, in which X denotes the number of bases in said sequence (Ac′), Y denotes the number of bases in the region flanked by said sequences (A) and (B) in the target nucleic acid sequence, and Y′ denotes the number of bases in an intervening sequence between said sequences (Ac′) and (B′) (Y′ may be zero).	03-10-2011

Yasunori Mitani, Fukuoka JP

Patent application number	Description	Published
20090240382	METHOD AND SYSTEM FOR CONTROLLING STABILITY OF ELECTRIC POWER SYSTEM - In the present invention, at each of the plurality of points in a wide area, the phase of voltage at a power supply outlet is detected. Data including the phase information and time information are sent to a data server. With one end of the system used as a phase angle reference, the data server observes phase differences at the other end and at the center of the system. The data server then extracts an inter-system fluctuation component from an obtained fluctuation, and constructs an expanded combined vibration model for data sets obtained through first-order and second-order differentiations of the component. The expanded combined vibration model is obtained by expanding a combined vibration model to include a known model of a PSS provided for a generator of interest. Time-series data regarding the state variables of the PSS at the time of construction of the expanded combined vibration model are obtained, and PSS parameters are determined directly therefrom by use of the expanded combined vibration model, whereby stabilization of the dominant modes is achieved.	09-24-2009

Yoshifumi Mitani, Osaka-Shi JP

Patent application number	Description	Published
20100214670	LENS UNIT AND IMAGE SENSING APPARATUS INCORPORATED WITH THE SAME - In a lens unit	08-26-2010

Yoshifumi Mitani, Sakai-Shi JP

Patent application number	Description	Published
20090067070	Engaging member, lens driving mechanism, imaging apparatus, and manufacturing method of engaging member - In an engaging member	03-12-2009
20100027133	LENS UNIT AND IMAGE PICKUP APPARATUS - A simply structured zooming movement mechanism for moving a first lens group located in the object side from a bending member. Also provided are a small-sized lens unit by making it collapsible and an image pickup apparatus. The lens unit has: the bending member for bending the light entering from an object along a first optical axis, to the direction of a second optical axis substantially perpendicular to the first optical axis; and a first moving member for moving a first support member, which supports the first lens group, in the direction of the first optical axis to a storage position; a bending member moving member for moving the bending member to an evacuation position in order to create a space for storing the first supporting member; and a first zooming movement member for moving the first supporting member in the direction of the first optical axis in a variable magnification manner. The first zooming movement member, the bending member moving member and the first moving member are driven in this order.	02-04-2010

Yoshinari Mitani, Koto-Ku JP

Patent application number	Description	Published
20100093424	GAMING MACHINE WITH A PREDETERMINED NUMBER OF SYMBOLS SCROLLED FOR DISPLAY PRIOR TO WILD SYMBOL AND HAVING A PREDETERMINED BACKGROUND COLOR AND CONTROL METHOD THEREOF - A slot machine includes a display on which symbols are rearranged in partitioned regions arranged in a matrix pattern including a plurality of columns and rows. The display includes a plurality of display windows corresponding to the respective columns for each unit game. In each of the display windows, for each slot game, executed is video display in which a symbol array having a plurality of symbols arranged therein is scrolled in an arrangement direction of the symbols. By this video display, the symbols arranged in the partitioned regions are rearranged in the slot game. When a feature game trigger is established during the slot game, an additional “WILD” symbol is inserted into the symbol array. The symbols in each symbol array have background images, respectively. The background images of a predetermined number of consecutive symbols immediately upstream of the “WILD” symbol are displayed in a predetermined color, and the background images of the other symbols are displayed in a normal color.	04-15-2010

Yoshiyuki Mitani, Hachioji-Shi JP

Patent application number	Description	Published
20080258041	Light measuring apparatus - A light measuring apparatus includes a light source configured to emit light to a sample, and a light guide optics system configured to guide light generated as a result of applying the emitted light to the sample, to a photodetector, wherein the light guide optics system is provided in a lightproof unit, and includes optical elements for guiding the generated light to the photodetector, a positioning part for adjusting a position of at least one of the optical elements, and a position detecting part for detecting a position of at least one of the optical elements by an optical method, and the light measuring apparatus comprises a position adjusting part which adjusts the positions of the optical elements by controlling the positioning part and position detecting part, and a light emission control unit which controls operations of starting and stopping light emission of the position detecting part.	10-23-2008

Yuichiro Mitani, Kanagawa-Ken JP

Patent application number	Description	Published
20080305647	Method for Manufacturing a Semiconductor Device - It is made possible to restrain generation of defects at the time of insulating film formation. A method for manufacturing a semiconductor device, includes: placing a semiconductor substrate into an atmosphere, thereby forming a nitride film on a surface of the semiconductor substrate, the atmosphere containing a first nitriding gas nitriding the surface of the semiconductor substrate and a first diluent gas not actually reacting with the semiconductor substrate, the ratio of the sum of the partial pressure of the first diluent gas and the partial pressure of the first nitriding gas to the partial pressure of the first nitriding gas being 5 or higher, and the total pressure of the atmosphere being 40 Torr or lower.	12-11-2008
20100052035	NONVOLATILE SEMICONDUCTOR MEMORY APPARATUS - A nonvolatile semiconductor memory apparatus includes: a source and drain regions formed at a distance from each other in a semiconductor layer; a first insulating film formed on the semiconductor layer located between the source region and the drain region, the first insulating film including a first insulating layer and a second insulating layer formed on the first insulating layer and having a higher dielectric constant than the first insulating layer, the second insulating layer having a first site performing hole trapping and releasing, the first site being formed by adding an element different from a base material to the second insulating film, the first site being located at a lower level than a Fermi level of a material forming the semiconductor layer; a charge storage film formed on the first insulating film; a second insulating film formed on the charge storage film; and a control gate electrode formed on the second insulating film.	03-04-2010
20100244157	SEMICONDUCTOR DEVICE - A semiconductor device includes a MISFET comprising: a semiconductor layer including a semiconductor region formed therein; a gate insulating film formed above the semiconductor region, and including a metal oxide layer containing a metal and oxygen, the metal contained in the metal oxide layer being at least one selected from Hf and Zr, the metal oxide layer further including at least one element selected from the group consisting of Ru, Cr, Os, V, Tc, and Nb, the metal oxide layer having sites that capture or release charges formed by inclusion of the element, density of the element in the metal oxide layer being in the range of 1×10	09-30-2010
20110003481	Method for manufacturing a semiconductor device - It is made possible to restrain generation of defects at the time of insulating film formation. A method for manufacturing a semiconductor device, includes: placing a semiconductor substrate into an atmosphere, thereby forming a nitride film on a surface of the semiconductor substrate, the atmosphere containing a first nitriding gas nitriding the surface of the semiconductor substrate and a first diluent gas not actually reacting with the semiconductor substrate, the ratio of the sum of the partial pressure of the first diluent gas and the partial pressure of the first nitriding gas to the partial pressure of the first nitriding gas being 5 or higher, and the total pressure of the atmosphere being 40 Torr or lower.	01-06-2011

Yuichiro Mitani, Miura-Gun JP

Patent application number	Description	Published
20100041193	NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - A nonvolatile semiconductor memory device includes a floating gate electrode which is selectively formed on a main surface of a first conductivity type with a first gate insulating film interposed therebetween, a control gate electrode formed on the floating gate electrode with a second gate insulating film interposed therebetween, and source/drain regions of a second conductivity type which are formed in the main surface of the substrate in correspondence with the respective gate electrodes. The first gate electrode has a three-layer structure in which a silicon nitride film is held between silicon oxide films, and the silicon nitride film includes triple coordinate nitrogen bonds.	02-18-2010
20100052039	SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device of an embodiment can prevent nitriding of the lower-layer insulating film and oxygen diffusion from the upper-layer insulating film, so as to minimize the decrease in charge capture density. This semiconductor device includes a semiconductor layer, a first insulating film provided on the semiconductor layer, a nitrogen-added amorphous silicon layer formed on the first insulating film, a first silicon nitride layer formed on the amorphous silicon layer, and a second insulating film formed above the first silicon nitride layer.	03-04-2010
20100250223	SEMICONDUCTOR CIRCUIT DETERIORATION SIMULATION METHOD AND COMPUTER PROGRAM MEDIUM - A semiconductor circuit deterioration simulation method for a circuit including MOSFETs includes inserting a dynamic voltage source associated with a fluctuation in voltage/current characteristics into each gate terminal of a plurality of MOSFETs in series, calculating dynamic deterioration amounts of the plurality of MOSFETs by performing circuit simulation and calculating a dynamic deterioration amount, and repeating the above processing to perform the circuit deterioration simulation over the long term.	09-30-2010

Yutaka Mitani, Shizuoka JP

Patent application number	Description	Published
20090130730	YEAST FOR EXTRACTION OF LIPID-SOLUBLE COMPONENT, METHOD FOR PRODUCING THE SAME, COLOR-IMPROVING AGENT USING THE SAME AND METHOD FOR PRODUCING LIPID-SOLUBLE COMPONENT - The production process for yeast for fat-soluble component extraction according to the invention comprises a breeding step wherein yeast having fat-soluble components to be extracted are bred, in such a manner that the pH of the medium decreases as growth proceeds, until falling below the limit of the breedable pH range.	05-21-2009
20090263876	HYDROGEN FERMENTOR AND METHOD OF PRODUCING HYDROGEN - The hydrogen fermentation apparatus is the one that generates hydrogen by decomposing organic matter through hydrogen fermentation. There are arranged a hydrogen fermentor which holds the treating liquid containing organic matter, and a string-shape carrier which is positioned to immerse itself in the treating liquid in the hydrogen fermentor, and on which hydrogen-generating bacteria are fixed.	10-22-2009
20100035328	NOVEL MICROORGANISM - The present invention provides a novel microorganism suitable for production of hydrogen. The microorganism according to the present invention is a Thermoanaerobacterium thermosaccharolyticum strain with an accession number of FERM BP-10793, or its mutants.	02-11-2010

Yutaka Mitani, Yaizu-Shi JP

Patent application number	Description	Published
20090233341	PROCESS FOR PRODUCING BIOGAS - A production method of a biogas of the present invention comprises carrying out hydrogen fermentation of a subject solution containing organic matter with the use of a hydrogen fermentation microorganism, in which according to a correlation between a concentration of a predetermined substrate in a liquid to be processed containing an organic matter and a rate of consumption of the substrate by a hydrogen-fermenting microorganism a maximum tolerable concentration of the substrate consumable by the hydrogen-fermenting microorganism is determined in advance and in which in the actual hydrogen formation step, the concentration of the substrate in the liquid is maintained at one not higher than the maximum tolerable concentration. According to the production method of a biogas of the present invention, hydrogen fermentation can be performed sufficiently smoothly without any treatment of the material involving consumption of thermal energy such as heating/warming.	09-17-2009

Yuuichiro Mitani, Kanagawa-Ken JP

Patent application number	Description	Published
20090184401	SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - It is made possible to provide a method for manufacturing a semiconductor device that has a high-quality insulating film in which defects are not easily formed, and experiences less leakage current. A method for manufacturing a semiconductor device, includes: forming an amorphous silicon layer on an insulating layer; introducing oxygen into the amorphous silicon layer; and forming a silicon oxynitride layer by nitriding the amorphous silicon layer having oxygen introduced thereinto.	07-23-2009
20090267134	NONVOLATILE SEMICONDUCTOR MEMORY APPARATUS - A nonvolatile semiconductor memory apparatus includes: a memory element including: a semiconductor substrate; a source region and a drain region formed at a distance from each other in the semiconductor substrate; a first insulating film formed on a portion of the semiconductor substrate located between the source region and the drain region, having sites that perform electron trapping and releasing and are formed by adding an element different from a base material, and including insulating layers having different dielectric constants, the sites having a higher level than a Fermi level of a material forming the semiconductor substrate; a charge storage film formed on the first insulating film; a second insulating film formed on the charge storage film; and a control gate electrode formed on the second insulating film.	10-29-2009
20110089478	Semiconductor device and method for manufacturing the same - It is made possible to provide a method for manufacturing a semiconductor device that has a high-quality insulating film in which defects are not easily formed, and experiences less leakage current. A method for manufacturing a semiconductor device, includes: forming an amorphous silicon layer on an insulating layer; introducing oxygen into the amorphous silicon layer; and forming a silicon oxynitride layer by nitriding the amorphous silicon layer having oxygen introduced thereinto.	04-21-2011

Yuuichiro Mitani, Miura-Gun JP

Patent application number	Description	Published
20100171169	Nonvolatile semiconductor memory device, semiconductor device and manufactoring method of nonvolatile semiconductor memory device - A nonvolatile semiconductor memory device includes a gate portion formed by laminating a tunnel insulating film, floating gate electrode, inter-poly insulating film and control gate electrode on a semiconductor substrate, and source and drain regions formed on the substrate. The tunnel insulating film has a three-layered structure having a silicon nitride film sandwiched between silicon oxide films. The silicon nitride film is continuous in an in-plane direction and has 3-coordinate nitrogen bonds and at least one of second neighboring atoms of nitrogen is nitrogen.	07-08-2010