Patent application number | Description | Published |
20090091670 | PIXEL CIRCUIT STRUCTURE - A pixel circuit structure applied in an LCD panel, which has a common voltage and includes at least one data line, is provided. The pixel circuit structure includes a first and a second circuit. The first circuit includes a first switch and a first capacitor. The second circuit includes a second switch, a third switch and a second capacitor. One end of the first capacitor receives the common voltage. Two ends of the first switch are respectively coupled to the data line and the other end of the first capacitor. The second and the third switch are coupled serially between the data line and a voltage source. One end of the second capacitor receives the common voltage, and the other end is coupled between the second and the third switch. The potential difference between the two ends of the first capacitor is different from that of the second capacitor. | 04-09-2009 |
20100060837 | COLOR WASHOUT REDUCING LIQUID CRYSTAL DISPLAY PANEL AND LCD DEVICE USING THE SAME - A color washout reducing LCD panel including a first substrate, a second substrate and a liquid crystal layer sealed between the first and second substrates is provided. The first substrate includes several thin film transistors (TFTs) arranged in an array and several pixel electrodes each electrically connected to one TFT. Each pixel electrode has a first and a second electrode blocks. The first electrode block has several first slits, wherein a first interval of the first electrode block is perpendicular to the first slits, and a first width of the first electrode block is between any two neighboring first slits. The second electrode block has several second slits, wherein a second interval of the second electrode block is perpendicular to the second slit and not equal to the first interval, and a second width of the second electrode block is between any two neighboring second slits. | 03-11-2010 |
20100066954 | COLOR FILTER SUBSTRATE AND LIQUID CRYSTAL DISPLAY - A liquid crystal display is provided which includes a color-filter substrate, an active matrix substrate, and a liquid crystal layer interposed between them. The active matrix substrate includes a first transparent substrate and includes a plurality of switching elements and a plurality of pixel electrodes formed on the first transparent substrate. Each switching element is electrically connected one of the pixel electrodes. The color-filter substrate defines a plurality of pixel areas. Each pixel area is suitable for corresponding to one of the pixel electrodes, includes a second transparent substrate, a first and second transparent conducting layers and a dielectric layer. The first transparent conducting layer is interposed between the second transparent substrate and the second transparent conducting layer, and the dielectric layer is interposed between the first and second transparent conducting layers. The second transparent conducting layer in each pixel area defines a hole. | 03-18-2010 |
20100265445 | FLAT DISPLAY PANEL - A flat display panel includes an array substrate and a color filter substrate facing each other. Multiple first electrodes and second electrodes are formed on the array substrate. The first electrodes receive scan signals transmitted from a driving circuit, and each of the second electrodes is connected to a corresponding scan line. Multiple signal lines are formed on the color filter substrate and in an active display area. Besides, multiple third electrodes and forth electrodes are formed on the color filter substrate. Each of the third electrodes is electrically connected to a corresponding forth electrode by a corresponding signal line, each of the third electrodes is electrically connected to a corresponding first electrode, and each of the forth electrodes is electrically connected to a corresponding second electrode. | 10-21-2010 |
20110102698 | LIQUID CRYSTAL DISPLAY PANEL - A liquid crystal display panel including an active device matrix substrate, an opposite substrate, and a liquid crystal layer is provided. The active device matrix substrate includes a first substrate, an active, device array, a padding device, first connecting electrodes, and shielding electrodes. The padding device is disposed on active devices and data lines of the active device array. The first connecting electrodes are located above the active devices and electrically connected to the active devices. The shielding electrodes are located above the data lines and electrically connected to a common voltage. The opposite substrate includes a second substrate, first electrodes, an insulating layer, second electrodes having slits and opposite to the first electrodes, spacers corresponding to the active devices, and second connecting electrodes covering the spacers to directly contact with the first connecting electrodes and electrically connected to the first electrodes or the second electrodes. | 05-05-2011 |
20110157528 | DISPLAY PANEL - A display panel includes a first substrate, a conductive light-shielding pattern, color filter patterns, a second substrate, scan lines, data lines, pixel structures, third pads and fourth pads. The conductive light-shielding pattern disposed on the first substrate defines conductive matrix pattern, first pads, and second pads. Each first pad is electrically connected to one corresponding second pad through the conductive matrix pattern and insulated with other second pads. The color filter patterns are disposed on the first substrate and a portion of each color filter pattern overlaps the conductive light-shielding pattern. The third pads are one-to-one electrically to the first pads while the fourth pads are one-to-one electrically connected to the second pads. Each fourth pad is electrically connected to one of the scan lines and one of the data lines. | 06-30-2011 |
20120169576 | DISPLAY PANEL - A display panel including a first substrate, a second substrate, a liquid crystal layer, a pixel structure array, a common electrode layer, and spacers is provided. The liquid crystal layer is disposed between the first substrate and the second substrate opposite thereto. The pixel structure array disposed on the first substrate is located between the liquid crystal layer and the first substrate and includes scan lines, data lines, active devices, and pixel electrodes. Each active device is connected to one scan line and one data line intersected therewith. Each pixel electrode crosses over one data line and one active device and is electrically connected to the corresponding one active device. The common electrode layer is disposed on the second substrate. The spacers disposed between the first substrate and the second substrate are located above the scan lines. The spacers are respectively located at centers of the pixel electrodes. | 07-05-2012 |
20130242220 | THIN-FILM TRANSISTOR, METHOD OF MANUFACTURING THE SAME AND ACTIVE MATRIX DISPLAY PANEL USING THE SAME - The present invention provides a thin-film transistor disposed on a substrate. The thin-film transistor includes a gate, a first insulating layer, a metal-oxide semiconductor pattern, a source, a drain, and a second insulating layer. The gate is disposed on the substrate, and the first insulating layer covers the gate. The source and the drain are disposed on the first insulating layer. The metal-oxide semiconductor pattern is disposed on the substrate, and the second insulating layer covers the metal-oxide semiconductor pattern. | 09-19-2013 |
20130256666 | THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF - A thin film transistor and a manufacturing method thereof are provided. The thin film transistor includes a gate, an oxide channel layer, a gate insulating layer, a source, a drain and a dielectric layer. The gate is disposed on a substrate. The oxide channel layer, disposed on the substrate, is stacked with the gate. A material of the oxide channel layer includes a metal element. The metal element content shows a gradient distribution along a thickness direction of the oxide channel layer. The gate insulation layer is disposed between the gate and the oxide channel layer. The source and the drain are disposed in parallel to each other, and connected to the oxide channel layer. Sides of the source and the drain, facing away from the substrate, are covered by the dielectric layer. | 10-03-2013 |