| Patent application number | Description | Published |
|---|
| 20080298125 | SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor substrate including an element region which is surrounded by an element isolation insulation layer, a transistor including a gate electrode which is provided on the element region, and a source region and a drain region which are provided in the first element region, a first auxiliary wiring layer and a second auxiliary wiring layer which extend in a channel length direction and are provided on the element isolation insulation layer such that the first transistor is interposed between the first auxiliary wiring layer and the second auxiliary wiring layer, and a control circuit which sets, while the first transistor is in an ON state, the first auxiliary wiring layer and the second auxiliary wiring layer at a first voltage of the same polarity as a gate voltage of the first transistor that is in the ON state. | 12-04-2008 |
| 20090039408 | NONVOLATILE SEMICONDUCTOR MEMORY AND MANUFACTURING METHOD THEREOF - A nonvolatile semiconductor memory of an aspect of the present invention comprises a first element isolation insulating film containing an organic substance which surrounds a first region, a memory cell arranged in the first region, a second element isolation insulating film containing an organic substance which surrounds a second region, a peripheral transistor arranged in the second region, and a first impurity layer which is provided in the semiconductor substrate along a side surface of the second element isolation insulating film. | 02-12-2009 |
| 20090194841 | SEMICONDUCTOR DEVICE - A semiconductor device has a semiconductor substrate of a first conductivity type; first to third high-voltage insulated-gate field effect transistors formed on a principal surface of the semiconductor substrate; a first device isolation insulating film that is formed in the semiconductor substrate and isolates the first high-voltage insulated-gate field effect transistor and the second high-voltage insulated-gate field effect transistor from each other; a second device isolation insulating film that is formed in the semiconductor substrate and isolates the first high-voltage insulated-gate field effect transistor and the third high-voltage insulated-gate field effect transistor from each other; a first impurity diffusion layer of the first conductivity type that is formed below the first device isolation insulating film; and a second impurity diffusion layer of the first conductivity type that is formed below the second device isolation insulating film. | 08-06-2009 |
| 20090236672 | SEMICONDUCTOR DEVICE - A semiconductor device includes a plurality of metal-insulator-semiconductor (MIS) transistors formed on a surface portion of a semiconductor substrate; and an isolation region isolating each of element regions of the MIS transistors, the isolation region including a first isolation region formed with a coating type insulating film embedded in a first trench, the first trench surrounding each of the element regions of the MIS transistors, and a second isolation region formed with a coating type insulating film embedded in a second trench, the second trench surrounding at least one of the first isolation regions with a predetermined distance from each of the first isolation regions, wherein the semiconductor substrate exists between the first isolation region and the second isolation region. | 09-24-2009 |
| 20100237438 | SEMICONDUCTOR DEVICE - A semiconductor device has a circuit element region formed on a semiconductor substrate, and a protective pattern formed so as to surround the circuit element region. The protective pattern comprises a first element separation region formed on the semiconductor substrate, a second element separation region formed on the semiconductor substrate and having a width smaller than that of the first element separation region, a first element region formed between the first element separation region and the second element separation region, a first gate layer formed on the first element separation region, a wiring layer formed on the first gate layer, a passivation layer formed above the wiring layer, a second element region, an insulation film formed on the second element region, and a second gate layer formed on the insulation film, the first element separation region, the first element region, the second element separation region and the second element region being located in this order from the nearer side of the circuit element region. | 09-23-2010 |
| 20110163774 | PROBE CARD - In one embodiment, a probe card includes a substrate, a probe provided on the substrate, and a contact terminal. The contact terminal is provided at a position on the substrate where the contact terminal comes in contact with the probe when a shape anomaly is generated in the probe. | 07-07-2011 |
| 20110228606 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - According to one embodiment, a nonvolatile semiconductor memory device comprises a first block, a second block, a storage circuit, a controller. A first block comprises a first select gate and a first word line. A second block comprises a second select gate and a second word line. A storage circuit configures to store first data concerning a voltage to be applied to the first select gate, and second data concerning a voltage to be applied to the second select gate. A controller configures to control the voltages to be applied to the first select gate and the second select gate. The controller applies, in a write operation, a first voltage to the first select gate based on the first data, and a second voltage different from the first voltage to the second select gate based on the second data. | 09-22-2011 |
