| Patent application number | Description | Published |
| 20090009781 | COLOR PRINTING SYSTEM - In a color printing system the printer driver automatically obtains local characteristic information, such as countries, cities, languages, etc., stored in the OS of the host computer. The printer driver or the image forming apparatus color-converts the input data into output data, which reflects the color preference of the specific region where the image forming apparatus is installed, by using the look-up table corresponding to the local characteristic information obtained by the printer driver. Accordingly, the color preference of the specific region, in which the image forming apparatus is installed, is set more quickly and easily without requiring a complicated structure. The system includes a host computer to store local characteristic information of a region where an apparatus is installed, a printer driver to store look-up tables according to the local characteristic information, to select a look-up table corresponding to the local characteristic information obtained from the host computer, and to convert input data into output data representing a color corresponding to a color preference of a specific region by using the selected look-up table, and an image forming apparatus which is connected to the host computer so as to receive and print the output data, which is color-converted by the printer driver. | 01-08-2009 |
| 20110299100 | PRINT CONTROLLING TERMINAL AND COLOR CORRECTION METHOD - A color correction method includes displaying an expected print image of a test image of the image forming apparatus on a monitor, outputting the test image to the image forming apparatus, performing color matching between the output test image and an expected print image on the monitor, changing an ICC profile of the monitor according to the performed color matching, and generating a print data using the changed ICC profile. Also a print controlling terminal which performs the color correction method. | 12-08-2011 |
| Patent application number | Description | Published |
| 20090001363 | ZINC OXIDE SEMICONDUCTOR AND METHOD OF MANUFACTURING THE SAME - There are provided a method of manufacturing a zinc oxide semiconductor, and a zinc oxide semiconductor manufactured using the method. A metal catalyst layer is formed on a zinc oxide thin film that has an electrical characteristic of a n-type semiconductor, and a heat treatment is performed thereon so that the zinc oxide thin film is modified into a zinc oxide thin film having an electrical characteristic of a p-type semiconductor. Hydrogen atoms existing in the zinc oxide thin film are removed by a metal catalyst during the heat treatment. Accordingly, the hydrogen atoms existing in the zinc oxide thin film are removed by the metal catalyst and the heat treatment, and the concentration of holes serving as carriers is increased. That is, an n-type zinc oxide thin film is modified into a highly-concentrated p-type zinc oxide semiconductor. | 01-01-2009 |
| 20090256148 | ZINC OXIDE LIGHT EMITTING DIODE - Provided is a zinc oxide light emitting diode having improved optical characteristics. The zinc oxide light emitting diode includes an n-type semiconductor layer, a zinc oxide active layer formed on the n-type semiconductor layer, a p-type semiconductor layer formed on the active layer, an anode in electrical contact with the p-type semiconductor layer, a cathode in electrical contact with the n-type semiconductor layer, and a surface plasmon layer disposed between the n-type semiconductor layer and the active layer or between the active layer and the p-type semiconductor layer. Since the surface plasmon layer is formed between the n-type semiconductor layer and the active layer or between the active layer and the p-type semiconductor layer, the light emitting diode is not affected by an increase in resistance due to reduction of the thickness of the p-type semiconductor layer, and has improved optical characteristics due to a resonance phenomenon between the surface plasmon layer and the active layer. | 10-15-2009 |
| 20100019223 | NITRIDE SEMICONDUCTOR LIGHT EMITTING DEVICE - There is provided a nitride semiconductor light emitting device including an active layer of a multi quantum well structure, the nitride semiconductor light emitting device including: a substrate; and a buffer layer, an n-type nitride semiconductor layer, an active layer and a p-type nitride semiconductor layer sequentially stacked on the substrate, wherein the active layer is formed of a multi quantum well structure where a plurality of barrier layers and a plurality of well layers are arranged alternately with each other, and at least one of the plurality of barrier layers includes a first barrier layer including a p-doped barrier layer doped with a p-dopant and an undoped barrier layer. | 01-28-2010 |
| Patent application number | Description | Published |
| 20090032800 | PHOTONIC CRYSTAL LIGHT EMITTING DEVICE - There is provided a photonic crystal light emitting device including: a substrate; a plurality of nano rod light emitting structures formed on the substrate to be spaced apart from one another, each of the nano rod light emitting structures including a first conductivity type semiconductor layer, an active layer and a second conductivity type semiconductor layer; and first and second electrodes electrically connected to the first and second conductivity type semiconductor layers, respectively, wherein the nano rod light emitting structures are arranged with a predetermined size and period so as to form a photonic band gap for light emitted from the active layer, whereby the nano rod light emitting structures define a photonic crystal structure. In the photonic crystal light emitting device, the nano rod light emitting structures are arranged to define a photonic crystal to enhance light extraction efficiency. | 02-05-2009 |
| 20090184334 | PHOTONIC CRYSTAL LIGHT EMITTING DEVICE AND MANUFACTURING METHOD OF THE SAME - There is provided a photonic crystal light emitting device including: a light emitting structure including first and second conductivity type semiconductor layers and an active layer interposed therebetween; a transparent electrode layer formed on the second conductivity type semiconductor layer, the transparent electrode layer having a plurality of holes arranged with a predetermined size and period so as to form a photonic band gap for light emitted from the active layer, whereby the transparent electrode layer includes a photonic crystal structure; and first and second electrode electrically connected to the first conductivity type semiconductor layer and the transparent electrode layer, respectively. The photonic crystal light emitting device has a transparent electrode layer formed of a photonic crystal structure defined by minute holes, thereby improved in light extraction efficiency. | 07-23-2009 |
| 20100181588 | SEMICONDUCTOR LIGHT EMITTING DEVICE - Disclosed is a semiconductor light emitting device. The semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and an active layer disposed therebetween, and a surface plasmon layer disposed between the active layer and at least one of the n-type and p-type semiconductor layers, including metallic particles and an insulating material, and including a conductive via for electrical connection between the active layer and the at least one of the n-type and p-type semiconductor layers, wherein the metallic particles are enclosed by the insulating material to be insulated from the at least one of the n-type and p-type semiconductor layers. The semiconductor light emitting device can achieve enhanced emission efficiency by using surface plasmon resonance. Using the semiconductor light emitting device, the diffusion of a metal employed for surface plasmon resonance into the active layer can be minimized. | 07-22-2010 |
| Patent application number | Description | Published |
| 20100129568 | ACRYLIC PRESSURE-SENSITIVE ADHESIVE COMPOSITION FOR POLARIZING PLATE,CONTAINING A PHOTO-INITIATOR GROUP - The present invention relates to an acrylic pressure-sensitive adhesive composition which comprises a (meth)acrylic copolymer comprising an alkyl(meth)acrylic acid ester monomer, in which alkyl has 2 to 14 carbon atoms, and a (meth)acrylic acid ester monomer containing a copolymerizable photo-initiator group, wherein it has a gel fraction of 10 to 55% and a swelling ratio of 30 to 110, and a sol (uncross-linked polymer) eluted in final pressure-sensitive adhesive with a solvent (ethyl acetate) has a weight average molecular weight of 600,000 or more; and a polarizing plate and a liquid crystal display device, comprising the same. The polarizing plate according to the present invention has an excellent adhesion durability under a high temperature or a high temperature and humidity condition, has an excellent low light leakage property by effectively providing stress release property, and may greatly improve productivity for polarizing plates, by using photo-curing. | 05-27-2010 |
| 20110043737 | ACRYLIC ADHESIVE COMPOSITION - The invention relates to an acrylic adhesive composition, more particularly, to an adhesive composition which: specifies the contents of a (meth)acrylic ester-based monomer and an aromatic group-containing monomer of an acrylic copolymer as a composition having little or no difference of birefringence; has excellent durability; and can reduce light leakage due to flexure by mixing a crosslinkable functional group-containing acrylic copolymer (A) and an acrylic copolymer (B) which does not contain the crosslinkable functional group, in a ratio of 1:9 to 5:5. | 02-24-2011 |
| Patent application number | Description | Published |
| 20090157372 | METHOD AND APPARATUS FOR MODELING SOURCE-DRAIN CURRENT OF THIN FILM TRANSISTOR - Provided are a method and apparatus for modeling source-drain current of a TFT. The method includes receiving sample data, the sample data including a sample input value and a sample output value; adjusting modeling variables according to the sample data; calculating a current model value according to the adjusted modeling variables; when a difference between the calculated current model value and the sample output value is smaller than a predetermined threshold value, fitting a current model by applying the adjusted modeling variables to the current model; applying actual input data to the fitted current model; and outputting a result value corresponding to the actual input data, wherein the current model is a model for predicting the source-drain current of the TFT. | 06-18-2009 |
| 20100006837 | COMPOSITION FOR OXIDE SEMICONDUCTOR THIN FILM, FIELD EFFECT TRANSISTOR USING THE COMPOSITION AND METHOD OF FABRICATING THE TRANSISTOR - Provided are a composition for an oxide semiconductor thin film, a field effect transistor using the same and a method of fabricating the field effect transistor. The composition includes an aluminum oxide, a zinc oxide, an indium oxide and a tin oxide. The thin film formed of the composition is in amorphous phase. The field effect transistor having an active layer formed of the composition can have an improved electrical characteristic and be fabricated by a low temperature process. | 01-14-2010 |
| 20100065803 | MEMORY DEVICE AND MANUFACTURING METHOD THEREOF - Provided is a resistance variable non-volatile memory device using a trap-controlled Space Charge Limited Current (SCLC), and a manufacturing method thereof. The memory device includes a bottom electrode; an inter-electrode dielectric thin film diffusion prevention film formed on the bottom electrode; a dielectric thin film formed on the inter-electrode dielectric thin film diffusion prevention film and having a plurality of layers with different charge trap densities; and a top electrode formed on the dielectric thin film. | 03-18-2010 |
| 20100155716 | THIN FILM TRANSISTOR USING BORON-DOPED OXIDE SEMICONDUCTOR THIN FILM AND METHOD OF FABRICATING THE SAME - Provided are a thin film transistor, to which a boron-doped oxide semiconductor thin film is applied as a channel layer, and a method of fabricating the same. The thin film transistor includes source and drain electrodes, a channel layer, a gate insulating layer, and a gate electrode, which are formed on a substrate. The channel layer is an oxide semiconductor thin film doped with boron. Therefore, it is possible to remarkably improve electrical characteristics and high temperature stability of the thin film transistor. | 06-24-2010 |
| 20100155792 | TRANSPARENT TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - Provided is a transparent transistor including a substrate, source and drain electrodes formed on the substrate, each having a multi-layered structure of a lower transparent layer, a metal layer and an upper transparent layer, a channel formed between the source and drain electrodes, and a gate electrode aligned with the channel. Here, the lower transparent layer or the upper transparent layer is formed of a transparent semiconductor layer, which is the same as the channel. Thus, the use of the multi-layered transparent conductive layer can ensure transparency and conductivity, overcome a problem of contact resistance between the source and drain electrodes and a semiconductor, and improve processibility by patterning the multi-layered transparent conductive layer all at once, while deposition is performed layer by layer. | 06-24-2010 |
| 20100258437 | APPARATUS FOR REACTIVE SPUTTERING DEPOSITION - Provided is a reactive sputtering apparatus, and more particularly, a reactive sputtering apparatus capable of effectively ionizing a reactive gas using inductively coupled plasma (ICP). The reactive sputtering apparatus includes: a chamber having an inlet port for introducing a plasma gas thereinto and an outlet port for exhausting the gas used during reactive sputtering to the exterior; an ICP generator disposed on the chamber, ionizing a reactive gas, and injecting the ionized gas into the chamber; and at least one sputter gun located at a side surface of the chamber and supporting a target. Therefore, the reactive sputtering apparatus can improve an ionization rate of a reactive gas using inductively coupled plasma to reduce a process temperature and improve uniformity and step coverage of thin film deposition at low cost. | 10-14-2010 |
| 20110212612 | MEMORY DEVICES INCLUDING DIELECTRIC THIN FILM AND METHOD OF MANUFACTURING THE SAME - A memory device including a dielectric thin film having a plurality of dielectric layers and a method of manufacturing the same are provided. The memory device includes: a bottom electrode; at least one dielectric thin film disposed on the bottom electrode and having a plurality of dielectric layers with different charge trap densities from each other; and an top electrode disposed on the dielectric thin film. Therefore, a memory device, which can be readily manufactured by a simple process and can be highly integrated using its simple structure, can be provided. | 09-01-2011 |
| 20110249202 | POWER REDUCTION TELEVISION WITH PHOTO FRAME - A power reduction television with a photo frame is provided. The power reduction television includes a first display configured to display a first video image, a low power second display configured to display a second video image, and a display control unit configured to control the second display to display the second video image, when the first video image is not displayed through the first display. | 10-13-2011 |
| 20110266542 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - Provided are a semiconductor device including a dual gate transistor and a method of fabricating the same. The semiconductor device includes a lower gate electrode, an upper gate electrode on the lower gate electrode, a contact plug interposed between the lower gate electrode and the upper gate electrode, and connecting the lower gate electrode to the upper gate electrode, and a functional electrode spaced apart from the upper gate electrode and formed at the same height as the upper gate electrode. The dual gate transistor exhibiting high field effect mobility is applied to the semiconductor device, so that characteristics of the semiconductor device can be improved. In particular, since no additional mask or deposition process is necessary, a large-area high-definition semiconductor device can be mass-produced with neither an increase in process cost nor a decrease in yield. | 11-03-2011 |