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Min Hyung
Min Hyung Cho, Daejeon KR
| Patent application number | Description | Published |
|---|---|---|
| 20090121909 | DYNAMIC ELEMENT-MATCHING METHOD, MULTI-BIT DAC USING THE METHOD, AND DELTA-SIGMA MODULATOR AND DELTA-SIGMA DAC INCLUDING THE MULTI-BIT DAC - Provided are a dynamic element-matching method, a multi-bit Digital-to-Analog Converter (DAC), and a delta-sigma modulator with the multi-bit DAC and delta-sigma DAC with the multi-bit DAC. The dynamic element-matching method relates to preventing periodic signal components (in-band tones) from being generated from a delta-sigma modulator of a delta-sigma Analog-to-Digital Converter (ADC) and a multi-bit DAC used in a delta-sigma DAC. Unit elements are selected in a new sequence according to a simple algorithm every time that each of unit elements is selected once, and thus the unit elements are not periodically used. Consequently, it is possible to prevent in-band tones caused by a conventional Data Weighted Averaging (DWA) algorithm. | 05-14-2009 |
| 20100156534 | GAIN CONTROL DEVICE AND AMPLIFIER USING THE SAME - Provided are a gain control device and an amplifier using the gain control device. The gain control device includes a first input resistance unit having a first variable resistor whose resistance is linearly variable and a first fixed resistor respectively receiving a first input signal and a second input signal having a sign different from the first input signal and outputting current through a first output terminal, and a second input resistance unit having a second fixed resistor and a second variable resistor whose resistance is linearly variable respectively receiving the first input signal and the second input signal and outputting current through a second output terminal. | 06-24-2010 |
| 20100156686 | PULSE GENERATOR AND CONTINUOUS-TIME SIGMA-DELTA MODULATOR - Provided is a clock generator employed in a continuous-time sigma-delta modulator. The clock generator includes an oscillator configured to generate pulses in response to an enable signal, a counter configured to count the number of pulses generated by the oscillator and output the total pulse count, and an output circuit configured to output an inactivated output signal if the pulse count of the counter is equal to a pulse-width control bit. The oscillator includes an astable multi-vibrator. Since the astable multi-vibrator capable of generating a low-jitter pulse from a jittered clock is used as the oscillator, a signal-to-noise ratio is improved. A simple configuration using only digital circuits makes it easier to design a circuit and adjust pulse width. Moreover, according to the structure of the astable multi-vibrator, it is possible to design a circuit to optimally modulate pulse width in connection with process variations of resistors and capacitors used in the continuous-time sigma-delta modulator. | 06-24-2010 |
| 20100158277 | READ-OUT CIRCUIT WITH HIGH INPUT IMPEDANCE - Provided is a read-out circuit that is connected to a microphone and configured to linearly amplify a current signal generated by the microphone and output the amplified current signal. The read-out circuit includes an amplification unit and a feedback resistor. The amplification unit has an amplification gain between 0 and 1. The feedback resistor is connected between input and output terminals of the amplification unit. As the amplification gain of the amplification unit becomes closer to 1, an input impedance becomes higher. A preamp of the read-out circuit can have a high input impedance due to the amplification gain, and the read-out circuit can be manufactured using a CMOS process. | 06-24-2010 |
| 20110025537 | ACTIVE RESISTANCE-CAPACITOR INTEGRATOR AND CONTINUOUS-TIME SIGMA-DELTA MODULATOR WITH GAIN CONTROL FUNCTION - Provided are an active resistance-capacitance (RC) integrator and a continuous-time sigma-delta modulator, which have a gain control function. The active RC integrator includes an amplifier, a first base resistor connected between a first input node and a positive input port of the amplifier, a second base resistor connected between a second input node and a negative input port of the amplifier, a first resistor unit connected between the second input node and the positive input port of the amplifier, and a second resistor unit connected between the first input node and the negative input port of the amplifier. A resistor network including resistors and switches is configured to vary an input resistance, so that an active RC integrator may have a gain control function. | 02-03-2011 |
| 20110140940 | COEFFICIENT MULTIPLIER AND DIGITAL DELTA-SIGMA MODULATOR USING THE SAME - Provided are a coefficient multiplier and digital delta-sigma modulator using the same. The coefficient multiplier has the average of output signals of respective dependent multipliers as an effective coefficient using a coefficient averaging technique without employing an adder that has a complex structure and occupies a large chip area. Accordingly, the coefficient multiplier has a simple hardware constitution and small chip area in comparison with a canonical signed digit (CSD) coefficient multiplier, and the digital delta-sigma modulator employing the coefficient multiplier has a simple structure and small size. | 06-16-2011 |
Min Hyung Lee, Cheongjoo-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20080224138 | Image Sensor and Method of Manufacturing the Same - Disclosed is an image sensor, which includes a substrate having a transistor circuit and lower interconnections. First interconnections are formed separated from each other on the substrate and electrically connected to the CMOS circuitry through the lower interconnections. Planarized insulating layers are formed between the first interconnections to isolate unit pixels. An intrinsic layer is formed on the substrate including the insulating layers, and a second conductive layer is formed on the intrinsic layer. The first interconnections, the intrinsic layer and the second conductive layer provide a photodiode structure for the image sensor. | 09-18-2008 |
| 20080230864 | Image Sensor and Method for Manufacturing the Same - Disclosed is an image sensor which includes a plurality of pixel patterns formed on corresponding metal interconnections of an interlayer dielectric and a dummy pixel pattern formed between adjacent pixel patterns of the plurality of the pixel patterns. The dummy pixel patterns are not formed connected to the metal interconnections. The dummy pixel patterns can be formed spaced a distance apart from the plurality of pixel patterns such that air gaps form between the dummy pixel patterns and the pixel patterns in an intrinsic layer that is formed on the dummy pixel pattern and the plurality of pixel patterns. | 09-25-2008 |
| 20080283881 | Image Sensor and Method for Manufacturing the Same - An image sensor according to one embodiment of the present invention includes a semiconductor substrate having a CMOS circuit formed therein; an interlayer dielectric layer formed on the semiconductor substrate and including a trench formed therein; a metal wiring and a first conductive layer formed within the trench of the interlayer dielectric layer; an intrinsic layer formed on the semiconductor substrate including the first conductive layer and the interlayer dielectric layer; and a second conductive layer formed on the intrinsic layer. | 11-20-2008 |
Min-Hyung Hong, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20090100011 | METHOD FOR INSERTING CONTENTS PROVIDED BY EXTERNAL WEB SERVER IN COMMUMITY HOMEPAGE - Disclosed is a method for inserting contents provided by external web server in community homepage. Community manager sets up key word or search category regarding interest contents, the key word and search category information is transmitted to predetermined web server. The web server derives contents corresponding to key word and search category, the derived contents information is transmitted to community server from the web server. The community server transforms search result information into HTML format and insert in community homepage. Users of community can obtain information which is not uploaded by community members. | 04-16-2009 |
Min-Hyung Kim, Yongin-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20120045677 | APPARATUS FOR CHARGING AND DISCHARGING - An apparatus for charging and discharging includes a support portion, first and second racks, first and second vertical partition walls and a pinion. The support portion supports a secondary battery. The first and second racks are moved in a horizontal direction. The plurality of first vertical partition walls are fixed to the first rack at a constant interval. The plurality of second vertical partition walls are provided between the respective first vertical partition walls and fixed to the second rack at a constant interval. The pinion moves the first and second racks in the opposite directions. Accordingly, a charging and discharging operation, a high-temperature aging operation, and the like are performed in a formation process while limiting the expansion of a battery can through a simple operation regardless of differences for each manufacturer and for each model, thereby saving time and, cost. | 02-23-2012 |
Min-Hyung Moon, Cheonan-City KR
| Patent application number | Description | Published |
|---|---|---|
| 20100039119 | MULTIPLE TESTING BARS FOR TESTING LIQUID CRYSTAL DISPLAY AND METHOD THEREOF - A plurality of gate lines are formed on an insulating substrate in the horizontal direction, a gate shorting bar connected to the data lines is formed in the vertical direction and a gate insulating film is formed thereon. A plurality of data lines intersecting the gate lines are formed on the gate insulating film in the vertical direction, and a data shorting bar connected to the data lines is formed outside the display region. A first shorting bar is formed on the gate insulating film, located between the gate lines and the gate shorting bar, and connected to the odd gate lines. A second secondary shorting bar is formed parallel to the first shorting bar and connected to the even gate lines. | 02-18-2010 |
Min-Hyung Moon, Choongcheongnam-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20090039348 | MULTIPLE TESTING BARS FOR TESTING LIQUID CRYSTAL DISPLAY AND METHOD THEREOF - A plurality of gate lines are formed on an insulating substrate in the horizontal direction, a gate shorting bar connected to the data lines is formed in the vertical direction and a gate insulating film is formed thereon. A plurality of data lines intersecting the gate lines are formed on the gate insulating film in the vertical direction, and a data shorting bar connected to the data lines is formed outside the display region. A first shorting bar is formed on the gate insulating film, located between the gate lines and the gate shorting bar, and connected to the odd gate lines. A second secondary shorting bar is formed parallel to the first shorting bar and connected to the even gate lines. | 02-12-2009 |