| Patent application number | Description | Published |
|---|
| 20090236605 | TFT-LCD PIXEL STRUCTURE AND MANUFACTURING METHOD THEREOF - A thin film transistor liquid crystal display (TFT-LCD) pixel structure comprising: a gate line and a gate electrode formed on a substrate; a first insulating layer, a semiconductor layer, and a doped semiconductor layer formed sequentially on the gate electrode and the gate line, wherein an isolating groove is formed above the gate line which disconnects the semiconductor layer on the gate line; a second insulating layer covering the isolating groove and a portion of the substrate where the gate line and the gate are not formed; a pixel electrode formed on the second insulating layer, wherein the pixel electrode is integral with a drain electrode and is connected with the doped semiconductor layer on the gate electrode at a place where the drain electrode is formed; a source electrode, which is a portion of a data line, formed on the doped semiconductor layer; and a channel formed between the source electrode and the drain electrode. | 09-24-2009 |
| 20100093122 | THIN FILM PATTERNING METHOD AND METHOD FOR MANUFACTURING A LIQUID CRYSTAL DISPLAY DEVICE - A thin film patterning method comprising: depositing a first thin film and applying a photoresist layer on the first thin film; exposing and developing the photoresist layer to define first, second and third regions, wherein the photoresist layer in the first region is thicker than that in the second region, and no photoresist layer is left in the third region; over-etching to remove the first thin film in the third region and form an over-etched region in the peripheral region of the first region; removing a part of the photoresist layer to expose the first thin film in the second region; depositing a second thin film so that the first thin film contacts the second thin film in the second region; and lifting off the photoresist layer to remove the second thin film in the first region and exposing the substrate in the over-etched region of the first region. | 04-15-2010 |
| 20100231818 | HORIZONTAL ELECTRIC FIELD TYPE LIQUID CRYSTAL DISPLAY AND MANUFACTURING METHOD THEREOF - The embodiments of the present invention relate to a horizontal electric field type LCD and a manufacturing method thereof. The horizontal electric field type LCD comprises a first substrate, a second substrate, a liquid crystal layer sandwiched between the first substrate and the second substrate, and a spacer disposed between the first and the second substrates. Said first substrate comprises a thin film transistor, and a gate line and a data line for driving the thin film transistor. Said second substrate comprises a pixel electrode and a common electrode corresponding to and forming a horizontal electric field with the pixel electrode. Said spacer is a conductive spacer electrically connecting each pixel electrode on the second substrate to the corresponding thin film transistor on the first substrate. | 09-16-2010 |
| 20100270556 | TFT LCD ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF - A TFT LCD array substrate and a manufacturing method thereof. The TFT LCD array substrate comprises a substrate. A gate line and a gate electrode that is formed integrally with the gate line are formed on the substrate. A first insulating layer and a semiconductor layer are formed sequentially on the gate line and the gate electrode. A second insulting layer covers sidewalls of the gate line and the gate electrode, the first insulating layer, and the semiconductor layer. An etching stop layer is formed on the semiconductor layer and exposes a part of the semiconductor layer on both sides of the etching stop layer. The TFT LCD of the present invention can be manufactured with a four-mask process. | 10-28-2010 |
| 20110108849 | TFT-LCD PIXEL UNIT AND METHOD FOR MANUFACTURING THE SAME - A thin film transistor liquid crystal display (TFT-LCD) pixel unit and a method for manufacturing the same. The pixel unit comprises a gate line and a gate electrode formed on a substrate and a first gate insulating layer, an active layer, and a doped layer sequentially that are formed on the gate line and the gate electrode. An intercepting trench is formed on the gate line to cut off the doped layer and the active layer on the gate line. A second insulating layer covers the intercepting trench and the substrate where the gate line and the gate electrode are not formed. A pixel electrode is formed on the second insulating layer and is integrated with the second source/drain electrode. | 05-12-2011 |
