Miesch
Eric Miesch, Spokane, WA US
Patent application number | Description | Published |
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20150238848 | Card Shuffler - Systems, apparatuses and methods are described for shuffling a deck, group, stack or pile of cards. The cards are placed into a shuffler. The shuffler may be accessed under a lid, or via a slot or tray. Buttons, switches, or a touch screen and the like serve as an interface to access and control the shuffler. Cards are introduced into a substantially vertical shuffling chute. Cards are counted or audited. Sensors provide information as to the location of the cards. Static barriers and agitators encourage cards to remain in proper orientation and location. An elevator lifts cards from the shuffling chute. Sweeper arms or other mechanism manipulates the cards and returns the cards to a substantially horizontal orientation and exit position. Manual override is possible when errors are detected. Rubber-coated commodity rollers mountable to cantilevered axles engage and launch cards into the air when shuffled in the shuffling chute. Cards settle back into the stack of cards under the influence of gravity. The shuffler is mounted inside a simple enclosure. Maintenance and interface features provide convenience when working with the shuffler. Authentication may be employed to correlate user or dealer with operation of the shuffler. | 08-27-2015 |
Michel Miesch, Herrlisheim FR
Patent application number | Description | Published |
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20140058079 | DERIVATIVES OF ALLOPREGNANOLONE AND OF EPIALLOPREGNANOLONE AND USES THEREOF FOR TREATING A NEUROPATHOLOGICAL CONDITION - The présent invention relates to novel neurosteroids, especially derivatives of allopregnanolone and of epiallopregnanolone of formula (I) and the uses thereof as médicament for the treatment of neuropathologies, in particular neuropathies induced by the chemotherapy of a cancer. Thèse molécules according to the invention have both preventative and curative effects. The neurosteroids according to the invention may also be of use in the treatment of neurodegenerative disorders, in particular for preventing neuronal cell death. They may thus be used as neuroprotectants and/or as an agent that stimulâtes neuronal prolifération. | 02-27-2014 |
Wolfgang Miesch, Frankfurt (oder) DE
Patent application number | Description | Published |
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20080243443 | Method for the Construction of Vertical Power Transistors with Differing Powers by Combination of Pre-Defined Part Pieces - A method for designing a first vertical MOS power transistor having a specified design power level. The method comprises the steps of composing a layout of the vertical MOS power transistor as a combination of at least partly differing layout part pieces, each of the part pieces having known design data, the part pieces including at least one first layout part piece comprising a given number of single transistor cells, and adjusting the specified design power level of the first vertical MOS power transistor by using the known design data of the part pieces and based on the layout combination of the part pieces. | 10-02-2008 |
20090007046 | Layout Method for Vertical Power Transistors Having a Variable Channel Width - The invention relates to a simulation and/or layout process for vertical power transistors as DMOS or IGBT with variable channel width and variable gate drain capacity which can be drawn and/or designed by the designer with the respectively desired parameters of channel width and gate drain capacity and the parameters of volume resistance and circuit speed, which are correlated therewith, and whose electrical parameters can be described as a function of the geometrical gate electrode design. Here, both discrete and integrated vertical transistors may be concerned. | 01-01-2009 |
Wolfgang Miesch, Frankfurt DE
Patent application number | Description | Published |
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20120232855 | METHOD FOR THE CONSTRUCTION OF VERTICAL POWER TRANSISTORS WITH DIFFERING POWERS BY COMBINATION OF PRE-DEFINED PART PIECES - A method for designing a first vertical MOS power transistor having a specified design power level. The method comprises the steps of composing a layout of the vertical MOS power transistor as a combination of at least partly differing layout part pieces, each of the part pieces having known design data, the part pieces including at least one first layout part piece comprising a given number of single transistor cells, and adjusting the specified design power level of the first vertical MOS power transistor by using the known design data of the part pieces and based on the layout combination of the part pieces. | 09-13-2012 |