Patent application number | Description | Published |
20100174752 | VALIDATION AND CORRECTION IN A DISTRIBUTED NAMESPACE - A method comprising, sending an instruction from a validator member of a sysplex to a second member of a sysplex to prevent operations that alter a sysplex namespace, determining whether the validator member of the sysplex is communicative with the second member of the sysplex and whether the members of the sysplex retain current sysplex status information, sending an instruction from the validator member to the second member to send a first namespace attribute data associated with the second member to the validator member responsive to determining that the validator member of the sysplex is communicative with the second member of the sysplex and the members of the sysplex retain current sysplex status information, determining whether the first namespace attribute data associated with the second member is consistent with a second namespace attribute data, and sending an instruction to correct the first namespace attribute data. | 07-08-2010 |
20140033180 | ESTABLISHING CLOUD DEBUG BREAKPOINTS ASSIGNED TO USERS - In an embodiment, a cloud debug breakpoint, assigned to a first user, is established in a program at a first server in a cloud, wherein the first user selects the first server at which the program executes, from among servers in the cloud. The program at the servers in the cloud is executed, in response to requests from users. The program at the first server in the cloud is executed, in response to all requests from the first user to the program. If an identifier of a user that sent a request that the program was executing at a time that execution of the program at the first server reaches the cloud debug breakpoint matches an identifier of the first user assigned to the cloud debug breakpoint, the execution of the program is halted and control of a processor is given to a debugger. | 01-30-2014 |
20140089892 | DYNAMICALLY BUILDING SUBSECTIONS OF LOCALE OBJECTS AT RUN-TIME - Subsections of locale objects are dynamically built from locale source files when requested at run-time without building all subsections of the locale object. When a subsection of a locale object is dynamically built, the subsection is stored in global memory so it may be read by multiple applications. Dynamically building subsections of locale objects when requested allows software to operate with a relatively small number of locale objects instead of with hundreds or thousands of locale objects, as is known in the art, and requires fewer system resources because only the requested subsection of the locale object is built when it is requested. The result is significant savings in system-wide resources while still allowing for access to a large number of possible locales. | 03-27-2014 |
20140089893 | DYNAMICALLY BUILDING LOCALE OBJECTS OR SUBSECTIONS OF LOCALE OBJECTS BASED ON HISTORICAL DATA - During a first execution of software, historical data is logged that indicates which locale objects were used. During a second execution of the software, the historical data is read, and locale objects or subsections of locale objects are dynamically built from locale source files based on the historical data in the log that indicates which locale objects were used during the first execution. Any other locale objects or subsections that are needed that are not built initially during the second execution are dynamically built from locale source files when requested at run-time. Dynamically building locale objects or subsections based on which locale objects were used in one or more previous executions saves time that would otherwise be required to build the locale objects when they are needed at run-time. The result is significant savings in system-wide resources while still allowing for access to a large number of possible locales. | 03-27-2014 |
20140089906 | DYNAMICALLY BUILDING LOCALE OBJECTS AT RUN-TIME - Locale objects are dynamically built from locale source files when requested at run-time. When a locale object is dynamically built, it is stored in global memory so it may be read by multiple applications. Dynamically building locale objects when requested allows software to operate with a relatively small number of locale objects instead of with hundreds or thousands of locale objects, as is known in the art. The result is significant savings in system-wide resources while still allowing for access to a large number of possible locales. | 03-27-2014 |
20140089909 | DYNAMICALLY BUILDING LOCALE OBJECTS AT RUN-TIME - Locale objects are dynamically built from locale source files when requested at run-time. When a locale object is dynamically built, it is stored in global memory so it may be read by multiple applications. Dynamically building locale objects when requested allows software to operate with a relatively small number of locale objects instead of with hundreds or thousands of locale objects, as is known in the art. The result is significant savings in system-wide resources while still allowing for access to a large number of possible locales. | 03-27-2014 |
20140089910 | DYNAMICALLY BUILDING LOCALE OBJECTS OR SUBSECTIONS OF LOCALE OBJECTS BASED ON HISTORICAL DATA - During a first execution of software, historical data is logged that indicates which locale objects were used. During a second execution of the software, the historical data is read, and locale objects or subsections of locale objects are dynamically built from locale source files based on the historical data in the log that indicates which locale objects were used during the first execution. Any other locale objects or subsections that are needed that are not built initially during the second execution are dynamically built from locale source files when requested at run-time. Dynamically building locale objects or subsections based on which locale objects were used in one or more previous executions saves time that would otherwise be required to build the locale objects when they are needed at run-time. The result is significant savings in system-wide resources while still allowing for access to a large number of possible locales. | 03-27-2014 |
20140089949 | DYNAMICALLY BUILDING SUBSECTIONS OF LOCALE OBJECTS AT RUN-TIME - Subsections of locale objects are dynamically built from locale source files when requested at run-time without building all subsections of the locale object. When a subsection of a locale object is dynamically built, the subsection is stored in global memory so it may be read by multiple applications. Dynamically building subsections of locale objects when requested allows software to operate with a relatively small number of locale objects instead of with hundreds or thousands of locale objects, as is known in the art, and requires fewer system resources because only the requested subsection of the locale object is built when it is requested. The result is significant savings in system-wide resources while still allowing for access to a large number of possible locales. | 03-27-2014 |
20140344784 | CONTROLLING ACCESS TO VARIABLES PROTECTED BY AN ALIAS DURING A DEBUGGING SESSION - According to embodiments of the invention, methods, computer readable storage medium, and a computer system for controlling access to variables protected by an alias are disclosed. The method may include monitoring, during a debug session, each attempt by a debugger to apply an operator to one or more variables protected by an alias. The method may also include determining whether to allow an application of an operator to a variable protected by an alias, wherein the determination is based at least in part on one or more rules. | 11-20-2014 |
20150324173 | DYNAMICALLY BUILDING LOCALE OBJECTS OR SUBSECTIONS OF LOCALE OBJECTS BASED ON HISTORICAL DATA - During a first execution of software, historical data is logged that indicates which locale objects were used. During a second execution of the software, the historical data is read, and locale objects or subsections of locale objects are dynamically built from locale source files based on the historical data in the log that indicates which locale objects were used during the first execution. Any other locale objects or subsections that are needed that are not built initially during the second execution are dynamically built from locale source files when requested at run-time. Dynamically building locale objects or subsections based on which locale objects were used in one or more previous executions saves time that would otherwise be required to build the locale objects when they are needed at run-time. The result is significant savings in system-wide resources while still allowing for access to a large number of possible locales. | 11-12-2015 |
20150324174 | DYNAMICALLY BUILDING LOCALE OBJECTS OR SUBSECTIONS OF LOCALE OBJECTS BASED ON HISTORICAL DATA - During a first execution of software, historical data is logged that indicates which locale objects were used. During a second execution of the software, the historical data is read, and locale objects or subsections of locale objects are dynamically built from locale source files based on the historical data in the log that indicates which locale objects were used during the first execution. Any other locale objects or subsections that are needed that are not built initially during the second execution are dynamically built from locale source files when requested at run-time. Dynamically building locale objects or subsections based on which locale objects were used in one or more previous executions saves time that would otherwise be required to build the locale objects when they are needed at run-time. The result is significant savings in system-wide resources while still allowing for access to a large number of possible locales. | 11-12-2015 |
Patent application number | Description | Published |
20120146175 | INSULATING REGION FOR A SEMICONDUCTOR SUBSTRATE - An insulating region for a semiconductor wafer and a method of forming same. The insulating region can include a tri-layer structure of silicon oxide, boron nitride and silicon oxide. The insulating region may be used to insulate a semiconductor device layer from an underlying bulk semiconductor substrate. The insulating region can be formed by coating the sides of a very thin cavity with silicon oxide, and filling the remainder of the cavity between the silicon oxide regions with boron nitride. | 06-14-2012 |
20120187482 | FABRICATION OF CMOS TRANSISTORS HAVING DIFFERENTIALLY STRESSED SPACERS - CMOS transistors are formed incorporating a gate electrode having tensely stressed spacers on the gate sidewalls of an n channel field effect transistor and having compressively stressed spacers on the gate sidewalls of a p channel field effect transistor to provide differentially stressed channels in respective transistors to increase carrier mobility in the respective channels. | 07-26-2012 |
20130134523 | CMOS TRANSISTORS HAVING DIFFERENTIALLY STRESSED SPACERS - CMOS transistors are formed incorporating a gate electrode having tensely stressed spacers on the gate sidewalls of an n channel field effect transistor and having compressively stressed spacers on the gate sidewalls of a p channel field effect transistor to provide differentially stressed channels in respective transistors to increase carrier mobility in the respective channels. | 05-30-2013 |
20140110784 | REPLACEMENT METAL GATE FINFET - A method for fabricating a field effect transistor device includes depositing a hardmask over a semiconductor layer depositing a metallic alloy layer over the hardmask, defining a semiconductor fin, depositing a dummy gate stack material layer conformally on exposed portions of the fin, patterning a dummy gate stack by removing portions of the dummy gate stack material using an etching process that selectively removes exposed portions of the dummy gate stack without appreciably removing portions of the metallic alloy layer, removing exposed portions of the metallic alloy layer, forming spacers adjacent to the dummy gate stack, forming source and drain regions on exposed regions of the semiconductor fin, removing the dummy gate stack, removing exposed portions of the metallic alloy layer, and forming a gate stack conformally over exposed portions of the insulator layer and the semiconductor fin. | 04-24-2014 |
20140110785 | REPLACEMENT METAL GATE FINFET - A field effect transistor device includes a fin including a semiconductor material arranged on an insulator layer, the fin including a channel region, a hardmask layer arranged partially over the channel region of the fin, a gate stack arranged over the hardmask layer and over the channel region of the fin, a metallic alloy layer arranged on a first portion of the hardmask layer, the metallic alloy layer arranged adjacent to the gate stack, and a first spacer arranged adjacent to the gate stack and over the metallic alloy layer. | 04-24-2014 |
20140295637 | SPACER REPLACEMENT FOR REPLACEMENT METAL GATE SEMICONDUCTOR DEVICES - A method comprising steps of removing a first dielectric material, including a hard mask layer and one or more spacer material layers, from a semiconductor device having a sacrificial gate whose sidewalls being covered by said spacer material layers, and a raised source and a raised drain region with both, together with said sacrificial gate, being covered by said hard mask layer, wherein the removing is selective to the sacrificial gate, raised source region and raised drain region and creates a void between each of the raised source region, raised drain region and sacrificial gate. The method includes depositing a conformal layer of a second dielectric material to the semiconductor device, wherein the second material conforms in a uniform layer to the raised source region, raised drain region and sacrificial gate, and fills the void between each of the raised source region, raised drain region and sacrificial gate. | 10-02-2014 |
20150024568 | SPACER REPLACEMENT FOR REPLACEMENT METAL GATE SEMICONDUCTOR DEVICES - A method comprising steps of removing a first dielectric material, including a hard mask layer and one or more spacer material layers, from a semiconductor device having a sacrificial gate whose sidewalls being covered by said spacer material layers, and a raised source and a raised drain region with both, together with said sacrificial gate, being covered by said hard mask layer, wherein the removing is selective to the sacrificial gate, raised source region and raised drain region and creates a void between each of the raised source region, raised drain region and sacrificial gate. The method includes depositing a conformal layer of a second dielectric material to the semiconductor device, wherein the second material conforms in a uniform layer to the raised source region, raised drain region and sacrificial gate, and fills the void between each of the raised source region, raised drain region and sacrificial gate. | 01-22-2015 |
20150137243 | REPLACEMENT METAL GATE FINFET - A method for fabricating a field effect transistor device includes depositing a hardmask over a semiconductor layer depositing a metallic alloy layer over the hardmask, defining a semiconductor fin, depositing a dummy gate stack material layer conformally on exposed portions of the fin, patterning a dummy gate stack by removing portions of the dummy gate stack material using an etching process that selectively removes exposed portions of the dummy gate stack without appreciably removing portions of the metallic alloy layer, removing exposed portions of the metallic alloy layer, forming spacers adjacent to the dummy gate stack, forming source and drain regions on exposed regions of the semiconductor fin, removing the dummy gate stack, removing exposed portions of the metallic alloy layer, and forming a gate stack conformally over exposed portions of the insulator layer and the semiconductor fin. | 05-21-2015 |
20150137244 | REPLACEMENT METAL GATE FINFET - A field effect transistor device includes a fin including a semiconductor material arranged on an insulator layer, the fin including a channel region, a hardmask layer arranged partially over the channel region of the fin, a gate stack arranged over the hardmask layer and over the channel region of the fin, a metallic alloy layer arranged on a first portion of the hardmask layer, the metallic alloy layer arranged adjacent to the gate stack, and a first spacer arranged adjacent to the gate stack and over the metallic alloy layer. | 05-21-2015 |
20150137245 | REPLACEMENT METAL GATE FINFET - A field effect transistor device includes a fin including a semiconductor material arranged on an insulator layer, the fin including a channel region, a hardmask layer arranged partially over the channel region of the fin, a gate stack arranged over the hardmask layer and over the channel region of the fin, a metallic alloy layer arranged on a first portion of the hardmask layer, the metallic alloy layer arranged adjacent to the gate stack, and a first spacer arranged adjacent to the gate stack and over the metallic alloy layer. | 05-21-2015 |
20150214331 | REPLACEMENT METAL GATE INCLUDING DIELECTRIC GATE MATERIAL - A method of fabricating a semiconductor device includes forming at least one semiconductor fin on a semiconductor substrate. A plurality of gate formation layers is formed on an etch stop layer disposed on the fin. The plurality of gate formation layers include a dummy gate layer formed from a dielectric material. The plurality of gate formation layers is patterned to form a plurality of dummy gate elements on the etch stop layer. Each dummy gate element is formed from the dielectric material. A spacer layer formed on the dummy gate elements is etched to form a spacer on each sidewall of dummy gate elements. A portion of the etch stop layer located between each dummy gate element is etched to expose a portion the semiconductor fin. A semiconductor material is epitaxially grown from the exposed portion of the semiconductor fin to form source/drain regions. | 07-30-2015 |
20150255605 | METHOD TO ENHANCE STRAIN IN FULLY ISOLATED FINFET STRUCTURES - Methods and structures for increasing strain in fully insulated finFETs are described. The finFET structures may be formed on an insulating layer and include source, channel, and drain regions that are insulated all around. During fabrication, the source and drain regions may be formed as suspended structures. A strain-inducing material may be formed around the source and drain regions on four contiguous sides so as to impart strain to the channel region of the finFET. | 09-10-2015 |
20150287593 | HYDROGEN-FREE SILICON-BASED DEPOSITED DIELECTRIC FILMS FOR NANO DEVICE FABRICATION - Embodiments of the present invention provide hydrogen-free dielectric films and methods of fabrication. A hydrogen-free precursor, such as tetraisocyanatosilane, and hydrogen-free reactants, such as nitrogen, oxygen (O2/O3) and nitrous oxide are used with chemical vapor deposition processes (PECVD, thermal CVD, SACVD, HDP CVD, and PE and Thermal ALD) to create hydrogen-free dielectric films. In some embodiments, there are multilayer dielectric films with sublayers of various materials such as silicon oxide, silicon nitride, and silicon oxynitride. In embodiments, the hydrogen-free reactants may include Tetra Isocyanato Silane, along with a hydrogen-free gas including, but not limited to, N2, O2, O3, N2O, CO2, CO and a combination thereof of these H-Free gases. Plasma may be used to enhance the reaction between the TICS and the other H-free gasses. The plasma may be controlled during film deposition to achieve variable density within each sublayer of the films. | 10-08-2015 |
20150357434 | REPLACEMENT METAL GATE INCLUDING DIELECTRIC GATE MATERIAL - A method of fabricating a semiconductor device includes forming at least one semiconductor fin on a semiconductor substrate. A plurality of gate formation layers is formed on an etch stop layer disposed on the fin. The plurality of gate formation layers include a dummy gate layer formed from a dielectric material. The plurality of gate formation layers is patterned to form a plurality of dummy gate elements on the etch stop layer. Each dummy gate element is formed from the dielectric material. A spacer layer formed on the dummy gate elements is etched to form a spacer on each sidewall of dummy gate elements. A portion of the etch stop layer located between each dummy gate element is etched to expose a portion the semiconductor fin. A semiconductor material is epitaxially grown from the exposed portion of the semiconductor fin to form source/drain regions. | 12-10-2015 |
20160047038 | HYDROGEN-FREE SILICON-BASED DEPOSITED DIELECTRIC FILMS FOR NANO DEVICE FABRICATION - Embodiments of the present invention provide hydrogen-free dielectric films and methods of fabrication. A hydrogen-free precursor, such as tetraisocyanatosilane, and hydrogen-free reactants, such as nitrogen, oxygen (O2/O3) and nitrous oxide are used with chemical vapor deposition processes (PECVD, thermal CVD, SACVD, HDP CVD, and PE and Thermal ALD) to create hydrogen-free dielectric films. In some embodiments, there are multilayer dielectric films with sublayers of various materials such as silicon oxide, silicon nitride, and silicon oxynitride. In embodiments, the hydrogen-free reactants may include Tetra Isocyanato Silane, along with a hydrogen-free gas including, but not limited to, N2, O2, O3, N2O, CO2, CO and a combination thereof of these H-Free gases. Plasma may be used to enhance the reaction between the TICS and the other H-free gasses. The plasma may be controlled during film deposition to achieve variable density within each sublayer of the films. | 02-18-2016 |
20160049311 | WAFER BACKSIDE PARTICLE MITIGATION - A method of particle mitigation which includes obtaining a semiconductor wafer having a nonfunctional backside and a functional frontside on which semiconductor devices are formed by one or more lithography processes; coating the backside with a layer comprising silicon or amorphous carbon; planarizing the coated backside by a planarizing process; placing the semiconductor wafer onto a wafer chuck such that the wafer chuck makes direct contact with the coated backside; and while maintaining the coated backside in direct contact with the wafer chuck, performing a first lithographic process on the frontside. | 02-18-2016 |
20160056111 | HYDROGEN-FREE SILICON-BASED DEPOSITED DIELECTRIC FILMS FOR NANO DEVICE FABRICATION - Embodiments of the present invention provide hydrogen-free dielectric films and methods of fabrication. A hydrogen-free precursor, such as tetraisocyanatosilane, and hydrogen-free reactants, such as nitrogen, oxygen (O2/O3) and nitrous oxide are used with chemical vapor deposition processes (PECVD, thermal CVD, SACVD, HDP CVD, and PE and Thermal ALD) to create hydrogen-free dielectric films. In some embodiments, there are multilayer dielectric films with sublayers of various materials such as silicon oxide, silicon nitride, and silicon oxynitride. In embodiments, the hydrogen-free reactants may include Tetra Isocyanato Silane, along with a hydrogen-free gas including, but not limited to, N2, O2, O3, N2O, CO2, CO and a combination thereof of these H-Free gases. Plasma may be used to enhance the reaction between the TICS and the other H-free gasses. The plasma may be controlled during film deposition to achieve variable density within each sublayer of the films. | 02-25-2016 |
20160064509 | HYDROGEN-FREE SILICON-BASED DEPOSITED DIELECTRIC FILMS FOR NANO DEVICE FABRICATION - Embodiments of the present invention provide hydrogen-free dielectric films and methods of fabrication. A hydrogen-free precursor, such as tetraisocyanatosilane, and hydrogen-free reactants, such as nitrogen, oxygen (O2/O3) and nitrous oxide are used with chemical vapor deposition processes (PECVD, thermal CVD, SACVD, HDP CVD, and PE and Thermal ALD) to create hydrogen-free dielectric films. In some embodiments, there are multilayer dielectric films with sublayers of various materials such as silicon oxide, silicon nitride, and silicon oxynitride. In embodiments, the hydrogen-free reactants may include Tetra Isocyanato Silane, along with a hydrogen-free gas including, but not limited to, N2, O2, O3, N2O, CO2, CO and a combination thereof of these H-Free gases. Plasma may be used to enhance the reaction between the TICS and the other H-free gasses. The plasma may be controlled during film deposition to achieve variable density within each sublayer of the films. | 03-03-2016 |