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| 20100083026 | INTER-PROCESSOR COMMUNICATION CHANNEL INCLUDING POWER-DOWN FUNCTIONALITY - Apparatuses and methods are disclosed for implementing an inter-processor communication channel including power-down functionality. In one embodiment, the apparatus may comprise a first integrated circuit (IC), a second IC coupled to the first IC via a communication interface, wherein the first IC is in one or more low power states and unable to monitor the communication interface. The apparatus may further comprise an inter-processor communication (IPC) channel coupled between the first and second ICs, wherein the IPC channel is separate from the communication interface and wherein the second IC generates at least one advisory signal to the first IC via the IPC channel. | 04-01-2010 |
| 20120002890 | ALIGNMENT OF DIGITAL IMAGES AND LOCAL MOTION DETECTION FOR HIGH DYNAMIC RANGE (HDR) IMAGING - Disclosed embodiments relate to the alignment of images, particularly in HDR imaging applications. In one embodiment, image pyramids may be generated using a reference image and a source image. A difference bitmap is generated for each level of the image pyramids and is evaluated over nine possible one-pixel shift combinations in the x and y directions {−1, 0, 1 }. The difference bitmap is divided into tiles and analyzed and, for each pyramid level beginning from the top level, an optimal shift direction is determined as the shift exhibiting the fewest pixel difference counts across all tiles. The tiles are then pruned using a threshold such that only the tiles contributing up to the threshold are projected to the subsequent pyramid level. The alignment vector for each level is aggregated, and a final alignment vector is determined and used to shift the source image. This process may be repeated for another source image, and the two source images and reference image, once aligned, may be merged to generate an HDR image. | 01-05-2012 |
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| 20100315570 | PORTABLE COMPUTER DISPLAY STRUCTURES - An electronic device housing may have upper and lower portions that are attached with a hinge. At least one portion of the housing may have a rear planar surface and peripheral sidewalls having edges. A display module may be mounted in the housing. The display module may have glass layers such as a color filter glass layer and a thin-film transistor substrate. The color filter glass layer may serve as the outermost glass layer in the display module. The edges of the display module may be aligned with the edges of the peripheral housing sidewalls to create the appearance of a borderless display for the electronic device. The display module may be provided with an opening that allows a camera or other electronic components to receive light. Traces may be provided on the underside of the thin-film transistor substrate to serve as signal paths for the electrical components. | 12-16-2010 |
| 20100315769 | PORTABLE COMPUTERS WITH SPRING-MOUNTED DISPLAYS - An electronic device housing may contain a display module. The display module may contain layers of material such as a color filter layer and a thin-film transistor layer. These layers of material may be mounted in a display module chassis. A cover glass may cover the display module. The housing may have springs that mate with corresponding holes in the chassis of the display module to hold the display module in place within the housing. The springs may flex about a flex axis that is perpendicular to a planar rear housing surface and the planar layers of the display module. A disassembly tool may be inserted into a gap between the cover glass and housing sidewalls. When the disassembly tool is rotated, a fin on the tool may press against an engagement structure in the spring and may release the spring from the display module. | 12-16-2010 |
| 20110103041 | PORTABLE COMPUTER HOUSING WITH INTEGRAL DISPLAY - An electronic device such as a portable computer may have a housing with a rectangular recess in which layers of display structures such as a light guide panel layer and other light guide structures are directly mounted without intervening chassis members. Mating alignment features in the housing and display structures may be used to align the display structures relative to the housing. A display may be formed from glass layers such as a color filter glass layer and a thin-film transistor glass layer. Backlight for the display may be generated by an array of light-emitting diodes. The light guide panel may direct light from the light-emitting diodes through the glass layers. A clamp may be used to hold the light-emitting diodes and light guide structures in place in the recess. An undercut in the housing may also hold the light guide structures in place. | 05-05-2011 |
| 20110109829 | METHODS FOR FABRICATING DISPLAY STRUCTURES - An electronic device display may have a color filter layer and a thin film transistor layer. A layer of liquid crystal material may be interposed between the color filter layer and the thin film transistor layer. A layer of polarizer may be laminated onto the surface of the color filter layer. Laser trimming may ensure that the edges of the polarizer are even with the edges of the color filter layer. The thin film transistor layer may have an array of thin film transistors that control pixels of the liquid crystal material in the display. Driver circuitry may be used to control the array. The driver circuitry may be encapsulated in a planarized encapsulant on the thin film transistor layer or may be mounted to the underside of the color filter layer. Conductive structures may connect driver circuitry on the color filter layer to the thin film transistor layer. | 05-12-2011 |
| 20120020000 | PORTABLE COMPUTER DISPLAY STRUCTURES - An electronic device housing may have upper and lower portions that are attached with a hinge. At least one portion of the housing may have a rear planar surface and peripheral sidewalls having edges. A display module may be mounted in the housing. The display module may have glass layers such as a color filter glass layer and a thin-film transistor substrate. The color filter glass layer may serve as the outermost glass layer in the display module. The edges of the display module may be aligned with the edges of the peripheral housing sidewalls to create the appearance of a borderless display for the electronic device. The display module may be provided with an opening that allows a camera or other electronic components to receive light. Traces may be provided on the underside of the thin-film transistor substrate to serve as signal paths for the electrical components. | 01-26-2012 |
| 20120020001 | METHODS FOR FABRICATING DISPLAY STRUCTURES - An electronic device display may have a color filter layer and a thin film transistor layer. A layer of liquid crystal material may be interposed between the color filter layer and the thin film transistor layer. A layer of polarizer may be laminated onto the surface of the color filter layer. Laser trimming may ensure that the edges of the polarizer are even with the edges of the color filter layer. The thin film transistor layer may have an array of thin film transistors that control pixels of the liquid crystal material in the display. Driver circuitry may be used to control the array. The driver circuitry may be encapsulated in a planarized encapsulant on the thin film transistor layer or may be mounted to the underside of the color filter layer. Conductive structures may connect driver circuitry on the color filter layer to the thin film transistor layer. | 01-26-2012 |
| 20120020002 | PORTABLE COMPUTER DISPLAY STRUCTURES - An electronic device housing may have upper and lower portions that are attached with a hinge. At least one portion of the housing may have a rear planar surface and peripheral sidewalls having edges. A display module may be mounted in the housing. The display module may have glass layers such as a color filter glass layer and a thin-film transistor substrate. The color filter glass layer may serve as the outermost glass layer in the display module. The edges of the display module may be aligned with the edges of the peripheral housing sidewalls to create the appearance of a borderless display for the electronic device. The display module may be provided with an opening that allows a camera or other electronic components to receive light. Traces may be provided on the underside of the thin-film transistor substrate to serve as signal paths for the electrical components. | 01-26-2012 |
| 20120105400 | CAMERA LENS STRUCTURES AND DISPLAY STRUCTURES FOR ELECTRONIC DEVICES - A camera may be mounted under a display in an electronic device. The display may include a polarizer layer, a color filter layer, and a thin-film-transistor layer. A layer of material such as a glass insert may be attached to an edge of the display. Openings may be formed in the layers of the display and the insert to accommodate the camera. A sleeve structure may be mounted within an opening. The camera may include lens structures formed from a stack of lens elements. One or more layers of the display may be interposed within the lens structures. The glass insert may be mounted within a notch in the color filter layer and thin-film transistor layer or along a straight edge of the color filter layer and thin-film transistor layer. The edge of the color filter layer may be recessed with respect to form a mounting shelf for the insert. | 05-03-2012 |
| 20120106063 | DISPLAYS WITH POLARIZER WINDOWS AND OPAQUE MASKING LAYERS FOR ELECTRONIC DEVICES - An electronic device may have a display. Inactive portions of the display such as peripheral portions of the display may be masked using an opaque masking layer. An opening may be provided in the opaque masking layer to allow light to pass. For example, a logo may be viewed through an opening in the opaque masking layer and a camera may receive light through an opening in the opaque masking layer. The display may include upper and lower polarizers, a color filter layer, and a thin-film transistor layer. The opaque masking layer may be formed on the upper polarizer, may be interposed between the upper polarizer and the color filter layer, or may be interposed between the color filter layer and the thin-film transistor layer. The upper polarizer may have unpolarized windows for cameras, logos, or other internal structures. | 05-03-2012 |
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| 20100158390 | PARALLEL PROCESSING FOR GENERATING A THINNED IMAGE - A thinned output image is generated from an input image. Values of pixels surrounding a pixel of interest in the input image are determined, and first and second neighboring pixel patterns surrounding the pixel of interest are established based on the values of the pixels surrounding the pixel of interest. The first neighboring pixel pattern may be compared to each of a set of purge patterns to determine whether to eliminate the pixel, and the second neighboring pixel pattern may be compared to each of a set of conservation patterns to determine whether to conserve the pixel. The comparisons to the purge and conservation patterns are performed for each pixel independently, and in parallel for all pixels of the input image. | 06-24-2010 |
| 20100158404 | GENERATING A DILATION IMAGE UTILIZING PARALLEL PIXEL PROCESSING - A dilation image is generated from an original digital image utilizing a processing image (b) and a target image (T), where each pixel in the target image is processed in parallel. The process entails, for each target pixel, i) determining coordinate values for the target pixel, ii) determining a surrounding pixel area for the target pixel, iii) and processing each pixel in the surrounding pixel area to determine whether or not to updated the value of the target pixel. In processing each surrounding pixel, a determination is made whether the pixel has a value of 1. If not, then the next surrounding pixel is processed. If so, then a determination is made which pixel element of the structuring element overlays the target pixel, and whether that pixel has a value of 1. If so, then the value of the target pixel is updated. If not, then the next pixel in the surrounding pixel area is processed. Once the target pixel has been updated one time, the processing of the remaining surrounding pixels is terminates. If processing of all surrounding pixels results in no update to the target pixel, then the target pixel is not updated. After all target pixels have been processed, the resultant image is output as the dilation image. | 06-24-2010 |
| 20100177980 | GENERATING AN EROSION IMAGE UTILIZING PARALLEL PIXEL PROCESSING - An erosion image is generated from an original digital image utilizing a processing image (b) and a target image (T), where each pixel in the target image is processed in parallel. The process entails, for each target pixel, i) determining coordinate values for the target pixel, ii) determining a surrounding pixel area for the target pixel, iii) and processing each pixel in the surrounding pixel area to determine whether or not to updated the value of the target pixel. In processing each surrounding pixel, a determination is made whether the pixel has a value of 1. If not, then the next surrounding pixel is processed. If so, then a determination is made which pixel element of a structuring element overlays the target pixel, and whether that SE pixel has a value of 1. If so, then the value of the target pixel is updated. If not, then the next pixel in the surrounding pixel area is processed. Once the target pixel has been updated a set number of times to a predetermined value (e.g., 2), the processing of the remaining surrounding pixels is terminated. After all target pixels have been processed, an output image is obtained by setting target pixels having a value of 2 to a binary value of 1, and setting the other pixels to a binary value of 0. The resultant output image is an erosion image that is then output. | 07-15-2010 |
| 20110052059 | GENERATING IMAGE HISTOGRAM BY PARALLEL PROCESSING - A histogram is generated. An image is input, and a pixel value is assigned to each pixel of the input image. A set of bin indexes is defined, with each bin index representing one or more possible numerical values for a pixel. A parallel sort is applied to the pixel values in order to generate a set of sorted pixel values. A parallel search is applied to the sorted pixel values for each bin index to find the position of the bin index in the sorted pixel values. A number of pixels in a bin corresponding to each bin index is generated, based on the difference between the position of the bin index in the sorted pixel values and the position of a subsequent bin index in the sorted pixel values. The histogram is generated based on the number of pixels in the bins corresponding to each bin index. | 03-03-2011 |
| 20110142303 | IMAGE LABELING USING PARALLEL PROCESSING - Image data which includes a feature is labeled. The image data is comprised of pixel data in an N×M array. At least one pixel is designated and flagged. Asynchronous processes are executed, where each process corresponds to exactly one pixel. Each process sets a flag only for the owner pixel and only if a connected neighbor pixel in the pre-defined path is flagged. Each process inspects pixel data for all neighbor pixels of the owner pixel to determine if a neighbor pixel is a connected pixel and if the neighbor pixel is flagged, and continues until it sets the flag for the owner pixel or until all connected horizontal and vertical neighbor pixels have been inspected without encountering a connected neighbor pixel whose flag is set. The asynchronous processes are repeated until a pre-defined condition has been satisfied. All flagged pixels are labeled. | 06-16-2011 |
| 20110206249 | TRANSMISSION OF MEDICAL IMAGE DATA - Transmission of a medical image such as a DICOM-formatted image which is formatted into a plurality of data sets including a data set for the image data and a data set for embedded information which identifies the nature of the medical image. A region of interest in the medical image is identified automatically by using the embedded information. Image data for the region of interest is transmitted, and image data for a region other than the region of interest is transmitted. Transmission of the image data for the entirety of the region of interest is completed before transmission of the image data for the entirety of the region other than the region of interest. | 08-25-2011 |
| 20110274329 | PROCESSING OF MEDICAL IMAGE DATA - An anti-aliasing filter comprised by a first filter kernel is applied to the medical image data so as to obtain filtered image data. The filtered image data is downsampled so as to obtain decimated image data, and pixel resolution of the decimated image data is approximately one half of pixel resolution of the image data for the medical image. The decimated image data is upsampled and an interpolation filter is applied so as to obtain interpolated image data. The interpolation filter is comprised by a second filter kernel, and the size of the first kernel is smaller than the size of the second filter kernel. Pixel resolution of the interpolated image data is approximately equal to pixel resolution of the medical image data. Difference image data between the interpolated image data and the medical image data for the medical image is obtained, and the difference image data is displayed. | 11-10-2011 |
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| 20090267953 | CONTROLLER AND DRIVER FEATURES FOR BI-STABLE DISPLAY - The invention comprises systems and methods for partitioning displays, and in particular, displays of interferometric modulator displays. In one embodiment, a display system includes one driving circuit configured to provide signals based on video data intended for display, and a bi-stable display comprising an array having a plurality of bi-stable display elements. The array is configured to display video data using signals received from the driving circuit, and the driving circuit is configured to partition the array into two or more fields, each field including at least one bi-stable display element, and refresh each of the two or more fields in accordance with a refresh rate associated with each field. In another embodiment, a method of displaying data on a display of a client device includes partitioning a bi-stable display of the client device into two or more fields, displaying video data in the two or more fields, and refreshing each of the two or more fields in accordance with a refresh rate that is associated with each field. | 10-29-2009 |
| 20100134503 | CONTROLLER AND DRIVER FEATURES FOR BI-STABLE DISPLAY - The invention comprises systems and methods for controller and driver features for displays, and in particular, controller and driver features that relate to displays with bi-stable display elements. In one embodiment, such a display includes at least one driving circuit and an array comprising a plurality of bi-stable display elements, where the array is configured to be driven by the driving circuit, and where the driving circuit is programmed to receive video data and provide a subset of the received video data to the array based on a frame skip count. In some embodiments, the frame skip count is programmable or dynamically determined. In another embodiment, a method of displaying data on an array having a plurality of bi-stable display elements comprises receiving video data comprising a plurality of frames, displaying selected frames based upon a frame skip count, measuring the change between each selected frame and a frame previous to the selected frame, and displaying non-selected frames if the measured change is greater than or equal to a threshold. | 06-03-2010 |
| 20110148828 | METHOD AND SYSTEM FOR DRIVING A BI-STABLE DISPLAY - Methods and systems are disclosed for providing video data and display signals. In one embodiment, a system is configured to display video data on an array of bi-stable display elements, where the system includes a processor, a display comprising an array of bi-stable display elements, a driver controller connected to the processor and configured to receive video data from the processor, and an array driver configured to receive video data from the driver controller and display signals from the processor, and to display the video data on the array of bi-stable display elements using the display signals. In another embodiment, a method of displaying data on a bi-stable display includes transmitting display signals from a processor to a driver of an array of bi-stable display elements, and updating an image displayed on the array of bi-stable display elements, wherein the updating is based on signals from the driver and performed on a periodic basis that is based at least in part upon the transmitted display signals. | 06-23-2011 |
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| 20080252959 | MEMS DISPLAY - A display comprising: a plurality of MEMS elements arranged in rows, wherein the MEMS elements of each of the rows are further arranged in subrows and wherein the subrows of each row are electrically connected; and wherein the physical property of at least one MEMS element in at least one subrow is different from the physical property of at least one MEMS element in other subrows. The physical property can be a spring constant associated with a movable mirror, a film thickness, an electrode width, a damping force caused by air between a movable mirror and a fixed mirror, a mass of a movable mirror, a material or geometry of the respective MEMS element. | 10-16-2008 |
| 20090213449 | MEMS DISPLAY - A displaying apparatus that includes a plurality of electromechanical system elements arranged in rows. The electromechanical system elements of each of the rows are further arranged in subrows. The subrows of each row are electrically connected. Certain of the electromechanical system elements have a hysteresis stability window that is nested with another hysteresis stability window of certain others of the electromechanical system elements. A method of manufacturing a displaying apparatus that includes forming a plurality of electromechanical system elements arranged in rows. The electromechanical system elements of each of the rows are further arranged in subrows. The subrows of each row are electrically connected. Certain of the electromechanical system elements have a hysteresis stability window that is nested with another hysteresis stability window of certain others of the electromechanical system elements. | 08-27-2009 |
| 20110075247 | MEMS DISPLAY - A displaying apparatus that includes a plurality of electromechanical system elements arranged in rows. The electromechanical system elements of each of the rows are further arranged in subrows. The subrows of each row are electrically connected. Certain of the electromechanical system elements have a hysteresis stability window that is nested with another hysteresis stability window of certain others of the electromechanical system elements. A method of manufacturing a displaying apparatus that includes forming a plurality of electromechanical system elements arranged in rows. The electromechanical system elements of each of the rows are further arranged in subrows. The subrows of each row are electrically connected. Certain of the electromechanical system elements have a hysteresis stability window that is nested with another hysteresis stability window of certain others of the electromechanical system elements. | 03-31-2011 |
| 20110096056 | DRIVE METHOD FOR MEMS DEVICES - Embodiments of exemplary MEMS interferometric modulators are arranged at intersections of rows and columns of electrodes. In certain embodiments, the column electrode has a lower electrical resistance than the row electrode. A driving circuit applies a potential difference of a first polarity across electrodes during a first phase and then quickly transition to applying a bias voltage having a polarity opposite to the first polarity during a second phase. In certain embodiments, an absolute value of the difference between the voltages applied to the row electrode is less than an absolute value of the difference between the voltages applied to the column electrode during the first and second phases. | 04-28-2011 |
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| 20110254758 | Flex Design and Attach Method for Reducing Display Panel Periphery - Various embodiments described herein involve making connections with the display leads on more than one side of the display array, e.g., on 2 sides, 3 sides or all 4 sides of the display array. By making connections with the display leads on more than one side of the display array, the available area for bonding leads and control circuitry may be increased. The driver chip(s), discrete components, and other active components necessary for addressing the display panel may be attached to the top or the bottom of a flexible printed circuit (“FPC”) or a similar device. Some embodiments involve attaching an FPC to the display such that that the backplate is substantially encased by the FPC. | 10-20-2011 |
| 20110310980 | APPARATUS AND METHODS FOR PROCESSING FRAMES OF VIDEO DATA ACROSS A DISPLAY INTERFACE USING A BLOCK-BASED ENCODING SCHEME AND A TAG ID - Disclosed are methods, apparatus, and systems, including computer program products, implementing and using techniques for processing frames of video data sent across a display interface using a block-based encoding scheme and a tag ID. The disclosed techniques provide for optimization of the display interface situated between the graphics processor and the display controller of an electronic device. The disclosed techniques minimize the amount of signaling over the interface and reduce the power consumed at the interface. Accordingly, the battery life of some electronic devices can be extended. In one embodiment, the graphics processor is configured to receive frames of video data, where each frame includes one or more blocks of the video data. The graphics processor is configured to encode each block of video data, generate a tag ID associated with each encoded block of video data, and output each encoded block of video data and associated tag ID. The display controller is configured to receive the encoded blocks of video data and associated tag ID's from the graphics processor via the display interface. The display controller is configured to interpret the tag ID associated with a respective encoded block of video data and determine whether to decode at least part of the respective encoded block of video data according to the tag ID. A display, such as a memory-based display, is in communication with the display controller. The display is configured to receive and display decoded blocks of video data from the display controller. | 12-22-2011 |
