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Maszara
Witek Maszara, Morgan Hill, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20100015778 | METHOD OF FORMING FINNED SEMICONDUCTOR DEVICES WITH TRENCH ISOLATION - A method of manufacturing a semiconductor device structure, such as a FinFET device structure, is provided. The method begins by providing a substrate comprising a bulk semiconductor material, a first conductive fin structure formed from the bulk semiconductor material, and a second conductive fin structure formed from the bulk semiconductor material. The first conductive fin structure and the second conductive fin structure are separated by a gap. Next, spacers are formed in the gap and adjacent to the first conductive fin structure and the second conductive fin structure. Thereafter, an etching step etches the bulk semiconductor material, using the spacers as an etch mask, to form an isolation trench in the bulk semiconductor material. A dielectric material is formed in the isolation trench, over the spacers, over the first conductive fin structure, and over the second conductive fin structure. Thereafter, at least a portion of the dielectric material and at least a portion of the spacers are etched away to expose an upper section of the first conductive fin structure and an upper section of the second conductive fin structure, while preserving the dielectric material in the isolation trench. Following these steps, the fabrication of the devices is completed in a conventional manner. | 01-21-2010 |
Witold Maszara, Morgan Hill, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20100248454 | METHOD OF FORMING FIN STRUCTURES USING A SACRIFICIAL ETCH STOP LAYER ON BULK SEMICONDUCTOR MATERIAL - A method of manufacturing semiconductor fins for a semiconductor device may begin by providing a bulk semiconductor substrate. The method continues by growing a layer of first epitaxial semiconductor material on the bulk semiconductor substrate, and by growing a layer of second epitaxial semiconductor material on the layer of first epitaxial semiconductor material. The method then creates a fin pattern mask on the layer of second epitaxial semiconductor material. The fin pattern mask has features corresponding to a plurality of fins. Next, the method anisotropically etches the layer of second epitaxial semiconductor material, using the fin pattern mask as an etch mask, and using the layer of first epitaxial semiconductor material as an etch stop layer. This etching step results in a plurality of fins formed from the layer of second epitaxial semiconductor material. | 09-30-2010 |
| 20110062443 | THIN BODY SEMICONDUCTOR DEVICES HAVING IMPROVED CONTACT RESISTANCE AND METHODS FOR THE FABRICATION THEREOF - Embodiments of a method for fabricating a semiconductor device are provided. In one embodiment, the method includes the step of producing a partially-completed semiconductor device including a substrate, source/drain (S/D) regions, a channel region between the S/D regions, a gate stack over the channel region, and sidewall spacers laterally adjacent the gate stack. The method further includes the steps of amorphizing the S/D regions, depositing a silicide-forming material over the amorphized S/D regions, and heating the partially-completed semiconductor device to a predetermined temperature at which the silicide-forming material reacts with the amorphized S/D regions. | 03-17-2011 |
| 20110081764 | METHODS FOR FORMING ISOLATED FIN STRUCTURES ON BULK SEMICONDUCTOR MATERIAL - Methods are provided for fabricating a semiconductor device. A method comprises forming a layer of a first semiconductor material overlying the bulk substrate and forming a layer of a second semiconductor material overlying the layer of the first semiconductor material. The method further comprises creating a fin pattern mask on the layer of the second semiconductor material and anisotropically etching the layer of the second semiconductor material and the layer of the first semiconductor material using the fin pattern mask as an etch mask. The anisotropic etching results in a fin formed from the second semiconductor material and an exposed region of first semiconductor material underlying the fin. The method further comprises forming an isolation layer in the exposed region of first semiconductor material underlying the fin. | 04-07-2011 |
Witold P. Maszara, Morgan Hill, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20080237803 | SEMICONDUCTOR DEVICE HAVING STRUCTURE WITH FRACTIONAL DIMENSION OF THE MINIMUM DIMENSION OF A LITHOGRAPHY SYSTEM - A method for forming a semiconductor device is provided including processing a wafer having a spacer layer and a structure layer, the spacer layer is over the structure layer. The method continues including forming a first sidewall spacer from the spacer layer, forming a structure strip from the structure layer below the first sidewall spacer, forming a masking structure over and intersecting the structure strip, and forming a vertical post from the structure strip below the masking structure. | 10-02-2008 |
| 20080241574 | SEMICONDUCTOR DEVICE HAVING STRUCTURE WITH SUB-LITHOGRAPHY DIMENSIONS - A method for forming a semiconductor device is provided including processing a wafer having a first layer and a second layer, the second layer is over the first layer, forming a vertical post from a sidewall spacer formed from the second layer, forming a filler over the first layer and surrounding the vertical post, and forming a device layer having a hole by removing the vertical post in the filler. | 10-02-2008 |