| Patent application number | Description | Published |
|---|
| 20090278244 | IC DEVICE HAVING LOW RESISTANCE TSV COMPRISING GROUND CONNECTION - A semiconductor device includes an integrated circuit (IC) die including a substrate, and at least one through substrate via (TSV) that extends through the substrate to a protruding integral tip that includes sidewalls and a distal end. The protruding integral tip has a tip height between 1 and 50 μm. A metal layer is on the bottom surface of the IC die, and the sidewalls and the distal end of the protruding integral tips. A semiconductor device can include an IC die that includes TSVs and a package substrate such as a lead-frame, where the IC die includes a metal layer and an electrically conductive die attach adhesive layer, such as a solder filled polymer wherein the solder is arranged in an electrically interconnected network, between the metal layer and the die pad of the lead-frame. | 11-12-2009 |
| 20090278245 | PACKAGED ELECTRONIC DEVICES WITH FACE-UP DIE HAVING TSV CONNECTION TO LEADS AND DIE PAD - A packaged electronic device includes a leadframe including a die pad, a first, second, and third lead pin surrounding the die pad. An IC die is assembled in a face-up configuration on the lead frame. The IC die includes a substrate having an active top surface and a bottom surface, wherein the top surface includes integrated circuitry including an input pad, an output pad, a power supply pad, and a ground pad, and a plurality of through-substrate vias (TSVs) including an electrically conductive filler material and a dielectric liner. The TSVs couple the input pad to the first lead pin, the output pad to the second lead pin, the power supply pad to a third lead pin or a portion of the die pad. A fourth TSV couples pads coupled to the ground node to the die pad or a portion of the die pad for a split die pad. | 11-12-2009 |
| 20100159643 | BONDING IC DIE TO TSV WAFERS - A method for bonding IC die to TSV wafers includes bonding at least one singulated IC die to respective ones of a plurality of IC die on a TSV wafer that includes a top semiconductor surface and TSV precursors including embedded TSV tips to form a die-wafer stack. The die-wafer stack is thinned beginning from the bottom surface of the TSV wafer to form a thinned die-wafer stack. The thinning includes exposing the embedded TSV tips to provide electrical access thereto from the bottom surface of the TSV wafer. The thinned die-wafer stack can be singulated to form a plurality of thinned die stacks. | 06-24-2010 |
| Patent application number | Description | Published |
|---|
| 20080280394 | SYSTEMS AND METHODS FOR POST-CIRCUITIZATION ASSEMBLY - A method of making integrated circuit packages using a conductive plate as a substrate includes forming a partial circuit pattern on one side of the conductive plate by stamping or selectively removing a portion of the conductive plate through part of its thickness, and then electrically coupling semiconductor dies to the formed patterns on the conductive plate. The method further includes encapsulating at least a portion of the dies and the conductive plate with an encapsulant and removing a portion of the conductive plate from the side opposite the patterned side to form conductive traces based on the formed pattern. | 11-13-2008 |
| 20080283992 | Multi layer low cost cavity substrate fabrication for pop packages - In a method and system for fabricating a semiconductor device ( | 11-20-2008 |
| 20090014898 | SOLDER CAP APPLICATION PROCESS ON COPPER BUMP USING SOLDER POWDER FILM - A method used during the formation of a semiconductor device assembly can include contacting an end of a conductive bump (which can be a pillar, ball, pad, post, stud, or lead as well as other types of bumps) with a conductive powder such as a solder powder to adhere the conductive powder to the end of the bump. The powder can be flowed, for example by heating, to distribute it across the end of the bump. The flowed powder can be placed in contact with a conductive pad of a receiving substrate and can then be reflowed to facilitate electrical connection between the bump and the conductive pad. | 01-15-2009 |
| 20090297879 | Structure and Method for Reliable Solder Joints - A solder joint ( | 12-03-2009 |
| 20100062567 | Multi Layer Low Cost Cavity Substrate Fabrication for POP Packages - In a method and system for fabricating a semiconductor device ( | 03-11-2010 |
