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Masahiko Hata, Ibaraki JP

Masahiko Hata, Ibaraki JP

Patent application numberDescriptionPublished
20090136409METHOD FOR PRODUCING POLYCRYSTALLINE SILICON - The present invention provides a method for producing polycrystalline silicon. The method for producing polycrystalline silicon comprises the steps of (A), (B), and (C), 05-28-2009
20090166644MONOLITHIC LIGHT EMITTING DEVICE AND DRIVING METHOD THEREFOR - A monolithic light-emitting device and driving method therefore includes a plurality of light-emitting diodes, array-arranged monolithically on a single substrate. Thie light-emitting diodes include a pn junction-containing semiconductor material and a phosphor-containing layer passing light emitted from the semiconductor material, absorbing part, or whole of the light for conversion into light having a different wavelength. The array is constituted of a light-emitting diode group consisting of m (m≧2) pieces of the light-emitting diode, the light emitting diode group being constituted of N types (N≧2, providing N≦m) of light-emitting diodes, each having either one of preset N types of light-emitting spectrum patterns. An average light-emitting spectrum from the whole array can be changed by regulating a power supplied to the light-emitting diodes for each light-emitting diode group sorted according to the type of the light-emitting spectrum pattern.07-02-2009
20090320746METHOD FOR PRODUCING GROUP III-V COMPOUND SEMICONDUCTOR - The present invention provides a method for producing a Group III-V compound semiconductor, comprising a step of feeding a Group III raw material, a Group V raw material, a carrier gas, and if necessary, other raw materials, to a reactor to grow a Group III-V compound semiconductor on a substrate in the reactor by a metalorganic vapor phase epitaxy, wherein the Group III raw material and the Group V raw material are independently fed to the reactor, and hydrogen halide is fed to the reactor together with a raw material other than the Group V raw material, or the carrier gas.12-31-2009
20100084742Method for manufacturing semiconductor epitaxial crystal substrate - The present invention provides a method for manufacturing a gallium nitride semiconductor epitaxial crystal substrate with a dielectric film which has a low gate leak current and negligibly low gate lag, drain lag, and current collapse characteristics. The method for manufacturing a semiconductor epitaxial crystal substrate is a method for manufacturing a semiconductor epitaxial crystal substrate in which a dielectric layer of a nitride dielectric material or an oxide dielectric material in an amorphous form functioning as a passivation film or a gate insulator is provided on a surface of a nitride semiconductor crystal layer grown by metal organic chemical vapor deposition. In the method, after the nitride semiconductor crystal layer is grown in an epitaxial growth chamber, the dielectric layer is grown on the nitride semiconductor crystal layer in the epitaxial growth chamber.04-08-2010
20100117094GALLIUM NITRIDE EPITAXIAL CRYSTAL, METHOD FOR PRODUCTION THEREOF, AND FIELD EFFECT TRANSISTOR - The present invention provides a gallium nitride type epitaxial crystal, a method for producing the crystal, and a field effect transistor using the crystal. The gallium nitride type epitaxial crystal comprises a base substrate and the following (a) to (e), wherein a connection layer comprising a gallium nitride type crystal is arranged in an opening of the non-gallium nitride type insulating layer to electrically connect the first buffer layer and the p-conductive type semiconductor crystal layer. (a) a gate layer, (b) a high purity first buffer layer containing a channel layer contacting an interface on the base substrate side of the gate layer, (c) a second buffer layer arranged on the base substrate side of the first buffer layer, (d) a non-gallium nitride type insulating layer arranged on the base substrate side of the second buffer layer, and having the opening at a part thereof, and (e) a p-conductive type semiconductor crystal layer arranged on the base substrate side of the insulating layer.05-13-2010
20110012178SEMICONDUCTOR WAFER, METHOD OF MANUFACTURING A SEMICONDUCTOR WAFER, AND SEMICONDUCTOR DEVICE - Provided is a semiconductor wafer having decreased interface state density at the semiconductor-insulator interface, a method of manufacturing this semiconductor wafer, and a semiconductor device.01-20-2011
20110180903SEMICONDUCTOR SUBSTRATE, ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE - There is provided a semiconductor wafer having a base wafer, an insulating layer, and a Si07-28-2011
20110233689SEMICONDUCTOR DEVICE, PROCESS FOR PRODUCING SEMICONDUCTOR DEVICE, SEMICONDUCTOR SUBSTRATE, AND PROCESS FOR PRODUCING SEMICONDUCTOR SUBSTRATE - There is provided a semiconductor device that includes a III-V Group compound semiconductor having a zinc-blende-type crystal structure, an insulating material being in contact with the (111) plane of the III-V Group compound semiconductor, a plane of the III-V Group compound semiconductor equivalent to the (111) plane, or a plane that has an off angle with respect to the (111) plane or the plane equivalent to the (111) plane, and an MIS-type electrode being in contact with the insulating material and including a metal conductive material.09-29-2011

Patent applications by Masahiko Hata, Ibaraki JP