| Patent application number | Description | Published |
| 20090009775 | Reticle, apparatus for monitoring optical system, method for monitoring optical system, and method for manufacturing reticle - A reticle has a mask substrate, a test pattern established on the mask substrate having an asymmetrical diffraction grating so as to generate positive first order diffracting light and negative first order diffracting light in different diffraction efficiencies, and a device pattern adjacent to the test pattern established on the mask substrate. | 01-08-2009 |
| 20100166289 | FEATURE-QUANTITY EXTRACTING METHOD, DESIGNED-CIRCUIT-PATTERN VERIFYING METHOD, AND COMPUTER PROGRAM PRODUCT - Feature-quantity extraction parameters used by feature-quantity extraction functions for calculating feature quantities used as explanatory variables of a resist model for predicting a resist image are set. The feature-quantity extraction functions, for which the feature-quantity extraction parameters are set, are caused to act on optical images of a pattern of a photomask to calculate feature quantities from the optical images. | 07-01-2010 |
| 20110224934 | EVALUATING APPARATUS, EVALUATING METHOD, AND COMPUTER PROGRAM PRODUCT - According to one embodiment, an evaluating apparatus includes a resist-pattern-data acquiring unit and an evaluating unit. The resist-pattern-data acquiring unit acquires resist pattern data having a plurality of feature values including at least two among a hole diameter measured concerning a pattern for hole formation in the resist pattern, an aspect ratio of the hole diameter, and a difference of hole diameters at a plurality of signal thresholds. The evaluating unit calculates an evaluation value using an evaluation function for evaluating whether a hole pattern formed on a processing target by using the pattern for hole formation is unopened and the resist pattern data and evaluates presence or absence of a risk that the hole pattern is unopened. | 09-15-2011 |
| 20110229988 | PATTERN FORMING METHOD, PROCESSING METHOD, AND PROCESSING APPARATUS - According to the embodiments, a distribution of a recess portion shape is calculated based on a result obtained by measuring the recess portion shape of a first projection and recess pattern formed on a surface of a template. Next, a distribution of an application amount of a curing agent to a processing target layer is calculated based on the distribution of the recess portion shape, and the curing agent is applied to the processing target layer based on this distribution of the application amount of the curing agent. Next, a second projection and recess pattern is formed by transferring the first projection and recess pattern onto the curing agent by causing the curing agent to cure in a state where the first projection and recess pattern is in contact with the curing agent. | 09-22-2011 |
| 20110245956 | Method and system for managing semiconductor manufacturing device - A management system includes a variable-period setting unit that sets a variable period in which quality-control values vary. Then, a retrieving unit retrieves events sandwiching the variable period. The events can be a maintenance of the semiconductor manufacturing device and/or a change of a correction value. An analysis-period setting unit sets an analysis period for analyzing a cause of variation of the quality-control values between the events retrieved by the retrieving unit. | 10-06-2011 |
| 20110315077 | TEMPLATE, MANUFACTURING METHOD, AND PROCESSING METHOD - According to the embodiments, a template is obtain which is used for imprint of forming a second projection and recess pattern formed of a curing agent on a processing target layer by transferring a first projection and recess pattern onto the curing agent by filling the first projection and recess pattern with the curing agent and curing the curing agent. The template includes the first projection and recess pattern on one surface side of a substrate. The first projection and recess pattern is such that height positions of bottom surfaces of recess portions are approximately the same, and includes two or more types of projection portions whose height from the bottom surfaces of the recess portions is different. | 12-29-2011 |
| Patent application number | Description | Published |
| 20090192743 | SAMPLING ESTIMATING METHOD, SAMPLING INSPECTION ESTIMATING APPARATUS, AND COMPUTER READABLE MEDIUM STORING SAMPLING INSPECTION ESTIMATING PROGRAM - A sampling inspection estimating method comprises determining an acceptable range of a measured value and an acceptable range of a acceptance probability, determining a first sampling plan to be inspected and a condition of calculating a first acceptance variables of lots, obtaining a first measured value of a production lot based on the determined first sampling plan, calculating first acceptance variables of lots based on the obtained first measured value and the determined condition of calculating the first acceptance variables of lots, calculating a first acceptance probability based on the first acceptance variables of lots, determining a second sampling plan to be inspected and a condition of calculating a second acceptance variables of lots, obtaining a second measured value of a production lot based on the determined second sampling plan, calculating second acceptance variables of lots based on the obtained second measured value and the determined condition of calculating the second acceptance variables of lots, calculating a second acceptance probability based on the second acceptance variables of lots, calculating operating characteristics of the first and second sampling plans based on the first acceptance probability and the second acceptance probability, and estimating the operating characteristics by using the determined acceptable range of the acceptance probability. | 07-30-2009 |
| 20090240362 | SIMULATION MODEL CREATING METHOD, MASK DATA CREATING METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD - A simulation model creating method computes, for measurement results of a line width of a resist pattern formed with varied an exposure amount and focus value, a permissible fluctuation range of the pattern line width from a distribution of the exposure amount and a distribution of the focus value; computes difference values between the measurement results and corresponding approximation values on a fitting function which has the exposure amount and focus value as parameters; compares the difference values with the permissible fluctuation range; deletes any measurement values for which the difference value is larger than the permissible fluctuation range, and recomputes the fitting function accordingly; and deletes measurement values outside a permissible fluctuation range of a pattern line width of the mask, and creates a simulation model. | 09-24-2009 |
| 20090246654 | METHOD FOR EVALUATING LITHOGRAPHY APPARATUS AND METHOD FOR CONTROLLING LITHOGRAPHY APPARATUS - An evaluation method for lithography apparatus including a coating unit, an exposure unit, a heating unit and a development unit, the evaluation method including forming an evaluation resist pattern by using the lithography apparatus, the evaluation resist pattern including first and second evaluation patterns, the first and second evaluation patterns having different peripheral environments, measuring dimensions of the first and second evaluation patterns to obtain a dimensional difference between the first and second resist evaluation patterns, estimating an exposure dose of a resist when the resist is exposed by the exposure unit, the estimating the exposure dose being performed based on the dimensional difference between the first and second resist evaluation patterns, and estimating an effective heating temperature of the resist when the resist is heated by the heating unit, the estimating the effective heating temperature being performed based on the estimated exposure dose and the dimensional difference. | 10-01-2009 |
| 20090305148 | PATTERN DATA CREATING METHOD, PHOTOMASK FABRICATING METHOD, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A pattern data creating method according to an embodiment of the present invention creates data of a mask pattern to be arranged on a photomask. The method includes creating a test mask pattern by moving positions of plural edges in a given mask pattern according to a predetermined probability density distribution, the test mask pattern having dimension values which are different from dimension values of the given mask pattern, obtaining dimension values of a wafer pattern, which are measured by exposing a wafer with a test mask on which the test mask pattern is arranged, forming the wafer pattern on the wafer by the exposure, and measuring the dimension values of the wafer pattern on the wafer, obtaining a relationship between the dimension values of the wafer pattern and the dimension values of the test mask pattern, and creating, by using the relationship, the mask pattern having dimension values by which a wafer pattern having predetermined dimension values is formed. | 12-10-2009 |
| 20100068833 | System of testing semiconductor devices, a method for testing semiconductor devices, and a method for manufacturing semiconductor devices - A system of testing semiconductor devices includes a classification module configured to classify a plurality of lots into a plurality of groups; an apparatus assignment module configured to assign a plurality of testing apparatuses to each of the groups; and a test recipe creation module configured to create a test recipe to test defects in a second group other than a first group specified in the groups, the test recipe including a definition of testing positions in the second group defined by a rule different from the first group. | 03-18-2010 |
| 20100112485 | Reticle set, method for designing a reticle set, exposure monitoring method, inspection method for reticle set and manufacturing method for a semiconductor device - A reticle set, includes a first photomask having a circuit pattern provided with first and second openings provided adjacent to each other sandwiching a first opaque portion, and a monitor mark provided adjacent to the circuit pattern; and a second photomask having a trim pattern provided with a second opaque portion covering the first opaque portion in an area occupied by the circuit pattern and an extending portion connected to one end of the first opaque portion and extending outside the area when the second photomask is aligned with a pattern delineated on a substrate by the first photomask. | 05-06-2010 |