Patent application number | Description | Published |
20090141654 | Multi-Processor architecture for a device - Aspects of the invention provide apparatuses and methods for composing a device with different types of multi-processor subsystems based on expected latency times and processing bandwidths. An apparatus may include multi-processor subsystems with different performance characteristics that interact with each other through bridge modules and a central packet network. Different types of multi-processor subsystems include a multi-point bus network, a circuit-switched network, a packet-switch network, and a shared block device. The apparatus includes a plurality of components, where each component has at least one multi-processor subsystem. The apparatus may be partitioned into different detachable parts, which can operate in an independent manner. The detachable parts may be joined so that the detachable parts can interact. A service in one multi-processor subsystem may interact with another service in another multi-processor subsystem by sending messages between the services. | 06-04-2009 |
20110099405 | NONVOLATILE DEVICE - Apparatuses and methods may include receiving a power-down command at a first subsystem comprising a first processor, a first volatile memory, a first nonvolatile memory, a first compressor/decompressor, and a first power control circuit, the first volatile memory being configured to store state data relating to operating conditions of the first subsystem. In response to receipt of the power-down command, the apparatuses and methods may cause the first compressor/decompressor to compress the state data to generate compressed state data and to cause the compressed state data to be stored in the first nonvolatile memory. In response to storage of the compressed state data in the first nonvolatile memory, the apparatuses and methods may cause the first power control circuit to power down the first subsystem. | 04-28-2011 |
20110278545 | Manufacture of Graphene-Based Apparatus - An apparatus including: a stacked structure including a first substrate having a flat surface; a flat first graphene layer adjacent the flat surface of the first substrate; a flat second graphene layer adjacent the flat first graphene layer; and a second substrate having a flat surface adjacent the flat second graphene layer. An apparatus including: a stacked structure including a substrate having a flat upper surface; a flat lower patterned layer overlying the flat upper surface of the substrate and including at least one patterned electrode; a flat lower graphene layer overlying the flat lower patterned layer; a flat upper graphene layer overlying the flat lower graphene layer; and a flat upper patterned layer overlying the flat upper graphene layer and including at least one patterned electrode. | 11-17-2011 |
20120161731 | VOLTAGE REGULATOR AND ASSOCIATED APPARATUS AND METHODS - In one or more embodiments described herein, there is provided an apparatus comprising an input, an output, one or more voltage regulator circuit components, and one or more graphene capacitors. The voltage regulator circuit components are configured to provide for a change in the voltage level of signalling between the input and the output. The one or more graphene capacitors are configured to provide for smoothing of the signalling provided to the output. | 06-28-2012 |
20120170354 | Apparatus and a method - An apparatus including a first electrode; a second electrode including graphene; and a dielectric between the first electrode and the second electrode; input circuitry configured to change a charge state of the dielectric by causing electric charges to be trapped in the dielectric; and output circuitry configured to detect a value dependent upon a quantum capacitance of the graphene of the second electrode, wherein the quantum capacitance of the graphene is dependent upon the charge state of the dielectric. | 07-05-2012 |
20130004091 | METHODS, APPARATUSES AND COMPUTER PROGRAM PRODUCTS FOR UTILIZING WIRELESS LINKS FOR COMMUNICATION OF COMPRESSED DATA - An apparatus for compressing data and optimizing transfer of the compressed data via a wireless link(s) may include a processor and memory storing executable computer code causing the apparatus to at least perform operations including compressing one or more samples of data corresponding to at least one image based in part on generating a plurality of wavelet coefficients. The wavelet coefficients correspond to the sampled data. The computer program code may further cause the apparatus to generate one or more messages including at least one of the wavelet coefficients. Each of the messages may include content denoting that one or more detected errors below a predetermined threshold are insufficient to inhibit reconstruction of the image. The computer program code may further cause the apparatus to enable transmission of the messages to a device(s) via at least one wireless link. Corresponding methods and computer program products are also provided. | 01-03-2013 |
20130141221 | Apparatus - An apparatus comprising at least one processor and at least one memory including computer program code the at least one memory and the computer program code configured to, with the at least one processor, cause the apparatus at least to perform: receiving a radio frequency signal; determining dependent the radio frequency signal at least one characteristic of an apparatus; and displaying the characteristic of the apparatus by generating at least two audio signals, each audio signal comprising a modulated tone configured to produce an image dependent on the at least one characteristic. | 06-06-2013 |
20130194005 | GENERATION OF DIFFERENTIAL SIGNALS - The invention relates to an apparatus comprising a differential driver module configured to generate at least one differential signal having steep rise and fall times for at least partially reducing common-mode noise. The invention also relates to a method for causing the differential driver to generate the signal and a system comprising the differential driver and a conductor module for transmission of the generated differential signal. A computer program for performing the method and a computer-readable medium is also part of the invention. | 08-01-2013 |
20140208014 | OPERATING A MEMORY - For enabling an efficient storage of received compressed data, an additional lossless compression is applied to the compressed data to obtain binary digits. The lossless compression is configured to result, on an average, in a higher percentage of binary digits having a first value than binary digits having a second value. The obtained binary digits are caused to be stored in a memory, wherein the storage of binary digits of the first value require less energy than or an equal amount of energy as the storage of binary digits of the second value. | 07-24-2014 |