| Patent application number | Description | Published |
|---|
| 20090037865 | ROUTER - Configuration of reconfigurable multidimensional fields are described. Information is provided for handling feedback, among other things. | 02-05-2009 |
| 20090150725 | METHOD FOR DEBUGGING RECONFIGURABLE ARCHITECTURES - A method for debugging reconfigurable hardware is described. According to this method, all necessary debug information is written in each configuration cycle into a memory, which is then analyzed by the debugger. | 06-11-2009 |
| 20090300262 | METHODS AND DEVICES FOR TREATING AND/OR PROCESSING DATA - At the inputs and/or outputs, memories are assigned to a reconfigurable module to achieve decoupling of internal data processing and in particular decoupling of the reconfiguration cycles from the external data streams (to/from peripherals, memories, etc.). | 12-03-2009 |
| 20100039139 | RECONFIGURABLE SEQUENCER STRUCTURE - A cell element field for data processing, having function cell means for execution of algebraic and/or logic functions and memory cell means for receiving, storing and/or outputting information is described. Function cell-memory cell combinations are formed in which a control connection leads from the function cell means to the memory cell means. | 02-18-2010 |
| 20100070671 | METHOD AND DEVICE FOR PROCESSING DATA - In a system including a multidimensional field of reconfigurable elements, and a method for operating said field of reconfigurable elements, one or more groups of said elements suitable for processing a predetermined task may be determined, a particular one of the one or more groups is selected, and the selected group is configured in a predetermined manner during runtime for processing the predetermined task, and in manufacturing of said system. | 03-18-2010 |
| 20100095088 | RECONFIGURABLE ELEMENTS - A cell element field for data processing having function cells for execution of algebraic and/or logic functions and memory cells for receiving, storing and/or outputting information is described. A control connection may lead from the function cells to the memory cells. | 04-15-2010 |
| 20100095094 | METHOD FOR PROCESSING DATA - A method and device for translating a program to a system including at least one first processor and a reconfigurable unit. Code portions of the program which are suitable for the reconfigurable unit are determined. The remaining code of the program is extracted and/or separated for processing by the first processor. | 04-15-2010 |
| 20100153654 | DATA PROCESSING METHOD AND DEVICE - In a data-processing method, first result data may be obtained using a plurality of configurable coarse-granular elements, the first result data may be written into a memory that includes spatially separate first and second memory areas and that is connected via a bus to the plurality of configurable coarse-granular elements, the first result data may be subsequently read out from the memory, and the first result data may be subsequently processed using the plurality of configurable coarse-granular elements. In a first configuration, the first memory area may be configured as a write memory, and the second memory area may be configured as a read memory. Subsequent to writing to and reading from the memory in accordance with the first configuration, the first memory area may be configured as a read memory, and the second memory area may be configured as a write memory. | 06-17-2010 |
| 20100174868 | Processor device having a sequential data processing unit and an arrangement of data processing elements - Designing a coupling of a traditional processor, in particular a sequential processor, and a reconfigurable field of data processing units, in particular a runtime-reconfigurable field of data processing units is described. | 07-08-2010 |
| 20100228918 | CONFIGURABLE LOGIC INTEGRATED CIRCUIT HAVING A MULTIDIMENSIONAL STRUCTURE OF CONFIGURABLE ELEMENTS - Programming of modules which can be reprogrammed during operation is described. Partitioning of code sequences is also described. | 09-09-2010 |
| 20100287324 | CONFIGURABLE LOGIC INTEGRATED CIRCUIT HAVING A MULTIDIMENSIONAL STRUCTURE OF CONFIGURABLE ELEMENTS - Programming of modules which can be reprogrammed during operation is described. Partitioning of code sequences is also described. | 11-11-2010 |
| 20110006805 | RECONFIGURABLE SEQUENCER STRUCTURE - A cell element field for data processing, having function cell means for execution of algebraic and/or logic functions and memory cell means for receiving, storing and/or outputting information is described. Function cell-memory cell combinations are formed in which a control connection leads from the function cell means to the memory cell means. | 01-13-2011 |
| 20110012640 | CONFIGURABLE LOGIC INTEGRATED CIRCUIT HAVING A MULTIDIMENSIONAL STRUCTURE OF CONFIGURABLE ELEMENTS - Programming of modules which can be reprogrammed during operation is described. Partitioning of code sequences is also described. | 01-20-2011 |
| 20110060942 | METHODS AND DEVICES FOR TREATING AND/OR PROCESSING DATA - At the inputs and/or outputs, memories are assigned to a reconfigurable module to achieve decoupling of internal data processing and in particular decoupling of the reconfiguration cycles from the external data streams (to/from peripherals, memories, etc.). | 03-10-2011 |
| 20110145547 | RECONFIGURABLE ELEMENTS - A cell element field for data processing having function cells for execution of algebraic and/or logic functions and memory cells for receiving, storing and/or outputting information is described. A control connection may lead from the function cells to the memory cells. | 06-16-2011 |
| 20110148460 | RECONFIGURABLE SEQUENCER STRUCTURE - A cell element field for data processing, having function cell means for execution of algebraic and/or logic functions and memory cell means for receiving, storing and/or outputting information is described. Function cell-memory cell combinations are formed in which a control connection leads from the function cell means to the memory cell means. | 06-23-2011 |
| 20110161977 | METHOD AND DEVICE FOR DATA PROCESSING - Designing a coupling of a traditional processor, in particular a sequential processor, and a reconfigurable field of data processing units, in particular a runtime-reconfigurable field of data processing units is described. | 06-30-2011 |
